These are whole vector shift instructions and they shift by bytes rather
than bits.
You only get an immediate offset for the instruction.
Implements two new IR ops to account for these instructions
This also doesn't match AArch64 behaviour 100%, requires two
instructions to emulate rather than the single one on the x86-side
If the tmp space grew too large and had to resize then we would have
stale pointers.
Keep around the offset instead so we don't store invalid pointers.
Splits this pass in to three parts.
First function is to remove StoreContext-LoadContext pairs that are
redundant. Removes the Load that has occured after a store-load pair.
Second function is to remove LoadContext instructions that are redundant
due to no other stores to that location
Third function is to remove StoreContext instructions that are redundant
due to no load happening between them (Relies on previous functions)
Checks to ensure the last op in a block is EndBlock.
Checks to ensure the last instruction before that one is one of the ops
that exit correctly. So ExitFunction, Jump, CondJump, or Break.
Simple linear scan forward of instruction decoding isn't viable to do.
We need to break up the decoding at the block boundaries.
Otherwise our decoding gets in to the weeds and decodes trash.
This changes over CondJump to have a defined True and False branch path.
Additionally needing to change over everything to handle this.
This now means that a false branch condition will no longer assume
fallthrough past this instruction.
Currently the x86-64 JIT generates an additional jmp instruction on
fallthrough that isn't optimized away.
This is working towards improvements in our IR branching model and
improving IRValidation in doing so.
This is working towards the model that IRBlocks can only have 0-2
successors.
Ret/Exit - 0 successors
Jump - 2 successors
CondJump - 2 successors
TBD:
Syscall/CPUID - Breaking block?
Useful for a quick overview of the time spent in a function. It isn't
amazing for profiling since it effects the time in the function by
itself.
Only useful as a reference.
RA spill slots now have live ranges so we can reuse the spill slot.
This can reduce spill stack usage significantly in code ranges with
large live ranges.
Ryan Houdek