steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-14 01:00:43 +02:00
Code Issues Packages Projects Releases 67 Wiki Activity
5,981 Commits 11 Branches 71 Tags
ad37c19043cd3ecfd0316fed3274b6a79ea7d55c
Commit Graph
2346 Commits
Author SHA1 Message Date
Lioncache ad37c19043 ARMEmitter: Handle SVE integer compare scalar count and limit group 2023-02-27 14:09:40 -05:00
Ryan Houdek f2aa0026b5 Merge pull request #2439 from lioncash/log 
Emitter/ALUOps: Fix typos in log messages
 2023-02-23 16:44:19 -08:00
Lioncache 553efbeb29 Emitter/ALUOps: Fix typos in log messages 
Fixes a few incorrect instruction names in the logs.
 2023-02-23 19:14:45 -05:00
Lioncache 85f7f8e6c0 OpcodeDispatcher: Restrict partial XMM stores to FPRs in StoreResult_WithOpSize 
As far as I know, nothing actually uses this path. Partially resolves
the TODO of dealing with partial writes.
 2023-02-23 18:48:24 -05:00
Ryan Houdek 4d25de31de Merge pull request #2437 from lioncash/dup 
OpcodeDispatcher: Remove now unused _VDupElement path in LoadSource_WithOpSize
 2023-02-23 13:58:09 -08:00
Ryan Houdek 9e01730c6c Merge pull request #2436 from lioncash/builtin 
Arm64Emitter: Use bit utils wrapper over __builtin_ffs
 2023-02-23 13:51:24 -08:00
Lioncache fea3ee1298 OpcodeDispatcher: Remove now unused _VDupElement path in LoadSource_WithOpSize 
XMM instances can't use high indices anymore, since we've gotten rid of
the only flag that allows this scenario to occur.
 2023-02-23 16:09:03 -05:00
Lioncache e1c42315ed Arm64Emitter: Use bit utils wrapper over __builtin_ffs 
Just keeps the use of builtins contained to one place.
 2023-02-23 15:23:07 -05:00
Ryan Houdek 165db37c8d Merge pull request #2434 from lioncash/predmisc 
ARMEmitter: Finish off SVE Predicate Misc group
 2023-02-23 12:20:03 -08:00
Ryan Houdek 9b23ae9133 Merge pull request #2433 from lioncash/subsw 
OpcodeDispatcher: Handle VPHSUBSW
 2023-02-23 12:17:58 -08:00
Lioncache 497b5c0561 X86Tables: Reclaim FLAGS_SF_HIGH_XMM_REG as an unused flag 
Now that we've moved MOVHPS over to sharing the implementation of
MOVHPD, the FLAGS_SF_HIGH_XMM_REG is now unused.

Since we're supporting AVX, this flag is kind of weird in terms of
behavior, since what determines the high part of a register is now
situationally different.

Also it's much more explicit to perform the insert directly in the
implementation of instructions, than relying on a flag to do it for us.

So, instead of keeping it around, we can reclaim it as unused for use
with any necessary behavior that we would require in the future.
 2023-02-23 14:22:25 -05:00
Lioncache 95393b07fb OpcodeDispatcher: Share MOVHPD implementation with MOVHPS 
These instructions essentially have the same behavior. This also allows
us to remove the only used instance of FLAGS_SF_HIGH_XMM_REG, which,
given that we now support AVX, has ambiguous use.

While we're at it, we can expand the tests to make use of the store to
memory variant.

Also removes an erroneous copy-pasted comment about ZEXTing. This is
from the MOVQ implementation function. MOVHPS/MOVHPD don't do any
ZEXTing, they either store to memory or insert into a register.
 2023-02-23 14:07:22 -05:00
Lioncache 372da1b820 ARMEmitter: Handle PNEXT 
Now, with the helper in place, we can implement PNEXT and finish off the
SVE Predicate Misc group.
 2023-02-23 11:59:39 -05:00
Lioncache 61a59d0314 ARMEmitter: Unify SVE Predicate Misc group under single helper 
Centralizes the implementations and also gets rid of some code in the
process.
 2023-02-23 11:51:03 -05:00
Lioncache 1045e05870 OpcodeDispatcher: Handle VPHSUBSW 2023-02-23 10:55:57 -05:00
Lioncache 052872725c OpcodeDispatcher: Factor out PHSUBS implementation into helper 
This will allow it to be shared in the AVX implementation.
 2023-02-23 10:32:48 -05:00
Lioncache 78ba195b66 ARMEmitter: Handle SVE partition break condition category 2023-02-22 22:49:37 -05:00
Lioncache ae2b28716d ARMEmitter: Handle SVE propagate break to next partition category 2023-02-22 22:41:55 -05:00
Lioncache 326e5e8d57 ARMEmitter: Handle propagate break from previous partition category 2023-02-22 22:35:31 -05:00
Lioncache 552293b226 ARMEmitter: Handle SVE integer compare with wide elements category 
We can piggy-back on top of the existing SVEIntegerCompareVector to make
these trivial to implement.
 2023-02-22 21:03:35 -05:00
Lioncache 751a4c8019 ARMEmitter: Move assertion into SVEIntegerCompareVector 
Same behavior, but centralizes the assertion. While we're at it, we can
also add another assert to ensure that only predicates p0-p7 are used.
 2023-02-22 20:14:49 -05:00
Lioncache e3cac40b1b OpcodeDispatcher: Fix SSE MOVAPS variants being treated as MOVUPS 
0x10/0x11 in the two byte op table corresponds to MOVUPS
0x28/0x29 in the two byte op table corresponds to MOVAPS
 2023-02-22 15:56:15 -05:00
Ryan Houdek 9b123353b3 Merge pull request #2428 from lioncash/hsub 
OpcodeDispatcher: Handle VHSUBPD/VHSUBPS
 2023-02-22 11:43:10 -08:00
Lioncache f2c0c55b9c OpcodeDispatcher: Handle VHSUBPS 2023-02-22 14:27:51 -05:00
Lioncache 1eb722dea7 OpcodeDispatcher: Handle VHSUBPD 2023-02-22 14:12:11 -05:00
Lioncache a6746988d7 x86_64/VectorOps: Fix behavior of UnZip2 with 64-bit element 256-bit vectors 
The 256-bit variant of vshufpd uses extra immediate bits rather than the
same bits for the lower lane.
 2023-02-22 14:12:11 -05:00
Lioncache 0a1707f1bd OpcodeDispatcher: Factor HSUBP implementation into helper 
Will be used for implementing the AVX variants of the same instructions.
 2023-02-22 12:12:55 -05:00
Lioncache 23b9d8e108 ARMEmitter: Add check for registers being consecutive in constructive SPLICE 
Will catch cases where registers aren't consecutive in the constructive
variant. While we're at it, we can also amend EXT's similar but slightly wrong
consecutive check.

Also adds tests to ensure these corner-cases hold.
 2023-02-22 11:59:58 -05:00
Lioncache 3fa44604ba ARMEmitter: Make SPLICE use SVEPermuteVectorPredicated 
These are in the same instruction category, so we can use the helper to
simplify the implementation.
 2023-02-22 11:48:11 -05:00
Lioncache d3bc0c084d ARMEmitter: Make CPY (SIMD&FP) and CPY (scalar) use SVEPermuteVectorPredicated 
These fall under the same instruction category, so we can use the helper
to simplify the implementation.
 2023-02-22 11:29:07 -05:00
Lioncache e206414919 ARMEmitter: Make COMPACT use SVEPermuteVectorPredicated 
This falls under the same category of instructions, so we can use it to
simplify the implementation.
 2023-02-22 11:23:37 -05:00
Lioncache e635cc5404 ARMEmitter: Use predicated helper with revb/revh/revw/rbit 
Since these are under the same category, we can merge these and get rid
of a now unnecessary helper.
 2023-02-22 11:17:12 -05:00
Lioncache 822d67467b ARMEmitter: Handle SVE conditionally extract element to GPR/scalar categories 2023-02-22 11:10:13 -05:00
Lioncache e043d2c0f5 ARMEmitter: Handle SVE conditionally broadcast element to vector category 2023-02-22 10:55:34 -05:00
Lioncache d58c4405f7 ARMEmitter: Handle extract element to general register/scalar categories 2023-02-22 10:47:49 -05:00
Mai 66d879f387 Merge pull request #2400 from Sonicadvance1/rip_reconstruct 
Dispatcher: Support reconstructing RIP from block entry
 2023-02-22 09:48:02 -05:00
Ryan Houdek 5f574fb935 Merge pull request #2425 from lioncash/xop 
VEXTables: Remove VPERMIL2PD and VPERMIL2PS entries
 2023-02-20 18:27:32 -08:00
Lioncache b5ca5f173e VEXTables: Remove VPERMIL2PD and VPERMIL2PS entries 
These are actually XOP instructions. That, despite being so, are encoded
using a VEX prefix.
 2023-02-20 20:58:55 -05:00
Lioncache 5cf6a680bb OpcodeDispatcher: Handle register variants of VPERMILPD/VPERMILPS 2023-02-20 20:32:31 -05:00
Ryan Houdek 645f40bb96 Merge pull request #2423 from lioncash/permd 
OpcodeDispatcher: Handle VPERMD/VPERMPS
 2023-02-20 15:20:59 -08:00
Ryan Houdek 268deddd09 Merge pull request #2422 from lioncash/phadds 
OpcodeDispatcher: Handle VPHADDSW
 2023-02-20 15:20:20 -08:00
Lioncache 65b9dcd20b OpcodeDispatcher: Handle VPERMPS 
With the VPERMD work in place, this is trivial to support.
 2023-02-20 17:00:39 -05:00
Lioncache b2c333c383 OpcodeDispatcher: Handle VPERMD 2023-02-20 17:00:35 -05:00
Lioncache 1ea53c65ab x86_64/VectorOps: Handle 8-bit VShlI IR op 
Useful for handling VPERMD.
 2023-02-20 16:45:13 -05:00
Lioncache 8beae0fce4 OpcodeDispatcher: Add VTrn/VTrn2 IR opcodes 
Provides a convenient way to propogate indices at given intervals in
vectors. This makes permutation instructions a little less annoying to
implement.
 2023-02-20 16:44:14 -05:00
Lioncache add775c5cd OpcodeDispatcher: Handle VPHADDSW 2023-02-20 12:25:28 -05:00
Lioncache f3e6f62356 OpcodeDispatcher: Factor PHADDS implementation into helper 
This will be used to also handle the VEX variant of PHADDSW
 2023-02-20 12:00:38 -05:00
Lioncache 59ab10f155 ARMEmitter: Move SVE instruction helpers into privare section 
Moves some instruction helpers that existed outside of the private
section of the class back into them, so that we're not exposing
unnecessary things in the interface.
 2023-02-20 11:39:21 -05:00
Lioncache 2e1bd4b32b ARMEmitter: Handle SVE index generation category 2023-02-20 11:30:09 -05:00
Mai f71f2445db Merge pull request #2389 from Sonicadvance1/remove_context_c_interface 
FEXCore: Removes C wrapper interface
 2023-02-20 10:08:07 -05:00