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Code Issues Packages Projects Releases 67 Wiki Activity
1,357 Commits 11 Branches 71 Tags
a11aed2f47d044c221cecacedb62d07fa7fc353b
Commit Graph
501 Commits
Author SHA1 Message Date
Ryan Houdek a11aed2f47 Removes some undefined behaviour in the interpreter VExtr implementation 2020-09-26 12:52:26 -07:00
Ryan Houdek ec06806244 Implements support for SSSE3 PABS{B,W,D} 
For both MMX and XMM registers
 2020-09-26 12:47:01 -07:00
Stefanos Kornilios Mitsis Poiitidis 83db01f505 Merge pull request #429 from Sonicadvance1/psign 
Implements support for SSSE3 PSIGN{B,W,D}
 2020-09-26 20:20:06 +03:00
Stefanos Kornilios Mitsis Poiitidis de62124b95 Merge pull request #428 from Sonicadvance1/lzcnt 
Implements ABM's LZCNT instruction
 2020-09-26 20:11:47 +03:00
Stefanos Kornilios Mitsis Poiitidis ca676e324d Merge pull request #427 from Sonicadvance1/duplicated_ops 
Implements the couple of duplicated ops
 2020-09-26 20:09:58 +03:00
Stefanos Kornilios Mitsis Poiitidis 5cb3a9df9d Merge pull request #426 from Sonicadvance1/addsub 
Implements ADDSUB{PS, PD}
 2020-09-26 20:09:48 +03:00
Stefanos Kornilios Mitsis Poiitidis cf6b07fc16 Merge pull request #425 from Sonicadvance1/remove_direct_widening_use 
Removes some direct usage of widening flag
 2020-09-26 20:09:35 +03:00
Stefanos Kornilios Mitsis Poiitidis 8662fb0db7 Merge pull request #424 from Sonicadvance1/mmx_cvt 
Implements missing mmx conversion ops
 2020-09-25 18:21:16 +03:00
Stefanos Kornilios Mitsis Poiitidis e145876898 Merge pull request #404 from Sonicadvance1/x87_bcd 
Adds support for BCD x87 intructions
 2020-09-25 18:07:49 +03:00
Ryan Houdek faa06771ef Implements support for SSSE3 PSIGN{B,W,D} 
For both MMX and XMM registers
 2020-09-24 19:45:39 -07:00
Ryan Houdek 7c73920a2c Implements the new IR ops in the x86-64 JIT 2020-09-24 19:44:55 -07:00
Ryan Houdek 6254d15f02 Implements the new IR ops in the ARM64 JIT 2020-09-24 19:36:15 -07:00
Ryan Houdek 2079e3ca31 Implements the new IR ops in the interpreter 2020-09-24 19:35:18 -07:00
Ryan Houdek 84936e6297 Implements ABM's LZCNT instruction 
This overlaps the previous BSR instruction which is why the table had to
be changed.

We were accidently claiming support for ABM in CPUID before so that
didn't need to be changed.

We now implement both LZCNT and TZCNT so we fully support ABM now.
 2020-09-23 22:35:32 -07:00
Ryan Houdek 697df88314 Implements the new CLZ IR op in the x86 JIT 2020-09-23 22:14:56 -07:00
Ryan Houdek 47c3fdafd7 Implements the new CLZ op in the ARM64 JIT 2020-09-23 22:14:36 -07:00
Ryan Houdek 935deb0167 Implements new CLZ op in the interpreter 2020-09-23 22:14:15 -07:00
Ryan Houdek c72d50a9c6 Implements the couple of duplicated ops 
SAL is exactly the same as SHL
TEST is exactly the same as the previous TESTs
Bit silly of encodings since compilers will never actually generate
these

No unit tests on these since getting nasm to emit it is a PITA
 2020-09-23 18:56:26 -07:00
Ryan Houdek ae3c38e9e5 Implements ADDSUB{PS, PD} in the OpDispatcher 2020-09-23 18:08:19 -07:00
Ryan Houdek e238afe2fb Removes some direct usage of widening flag 
Instead use our helpers to determine the sizes to stay consistent
 2020-09-23 17:30:43 -07:00
Ryan Houdek 35798c8d9d Implements missing mmx conversion ops 2020-09-23 17:21:01 -07:00
Ryan Houdek f5a7a3deec Fixes move with mem offset 
Move with mem offset defaults to 64bit offset and the literal size is
changed based on address size override rather than operand size
override.

Operand size override still works in this case, but only for the
register being passed in.
 2020-09-23 10:43:12 -07:00
Stefanos Kornilios Mitsis Poiitidis 6f58e1e1c5 Merge pull request #419 from Sonicadvance1/x87_fixes 
x87 fixes
 2020-09-23 20:19:29 +03:00
Ryan Houdek e395c37de6 Fixes flags calculation in CMPSB 
The order of these ops were flipped
 2020-09-23 10:00:18 -07:00
Ryan Houdek 57021e5e11 Fixes x87 FCMOV 
One flag type was having inverted results
 2020-09-23 09:41:32 -07:00
Ryan Houdek 12dc4ad0c4 Fixes x87 FYL2X 2020-09-23 09:41:00 -07:00
Ryan Houdek 2983e4c421 Implements OpDispatcher ops for host flag conversion ops 
These rely on the host flag being correct. Which will match what is set
through the regular host flag setting routines
 2020-09-23 09:04:44 -07:00
Stefanos Kornilios Mitsis Poiitidis d8b5ae3fdf Merge pull request #414 from Sonicadvance1/fix_eflag_state 
Ensures eflags matches real state
 2020-09-23 14:21:04 +03:00
Stefanos Kornilios Mitsis Poiitidis 437d6e984d Merge pull request #418 from Sonicadvance1/hsub 
Fixes the HSUB ops
 2020-09-23 14:17:48 +03:00
Ryan Houdek d425aa4f49 Fixes the HSUB ops 
These were swizzling in the wrong direction.
Confirmed by host runner
 2020-09-23 00:31:39 -07:00
Ryan Houdek a69b700afb Support setting emulator host rounding mode with ldmxcsr/stmxcsr 2020-09-23 00:21:52 -07:00
Ryan Houdek aef0f81a23 Ensures eflags matches real state 
0x2 is the default state for hardware boot, but it isn't the state we
boot applications in.

When an application boots under Linux it is actually set to 0x202
because interrupts have been enabled.
Since we can't disable interrupts we will just always have at least
0x202 in the eflags.

This modifies the unit tests to first clear the full eflags state then
loads it so we hit "default". Once we hit the unit test runner we won't
have known the eflags state at that point, so we need to clear it
initially.
 2020-09-23 00:09:35 -07:00
Ryan Houdek 6c37a4dea6 Adds support for BCD x87 intructions 2020-09-22 23:56:03 -07:00
Stefanos Kornilios Mitsis Poiitidis e168e5053a Merge pull request #410 from Sonicadvance1/pmovmskb 
Implements MMX PMOVMSKB
 2020-09-23 09:51:48 +03:00
Stefanos Kornilios Mitsis Poiitidis 91bea781f4 Merge pull request #408 from Sonicadvance1/rounding_mode_host 
Adds new IR ops for supporting host rounding mode conversion
 2020-09-23 09:50:37 +03:00
Ryan Houdek 74e2f189f1 Implements MASKMOVQ and MASKMOVDQU 
Without supporting phis this entire loop needs to be unrolled.

I just found out while reading the x86 documentation that this
instruction is explicitly a weakly ordered memory operation.
So this operation can be changed over to a couple vector conditional
loadstores soon after merging
 2020-09-22 23:23:51 -07:00
Ryan Houdek 88a545cea5 Implements MMX PMOVMSKB 
Only pulls out 8 bits of data then zero extends the result to 32bits for
the GPR
 2020-09-22 23:23:06 -07:00
Ryan Houdek 394f20d2c8 Implements the new IR ops in the x86 JIT 2020-09-22 18:46:04 -07:00
Ryan Houdek 6da5071433 Implements the new IR ops in the Arm64 JIT 2020-09-22 18:45:16 -07:00
Ryan Houdek e84e65d246 Implements new IR ops in the interpreter 2020-09-22 18:43:40 -07:00
Stefanos Kornilios Mitsis Poiitidis 98909af0f7 Merge pull request #402 from Sonicadvance1/fix_bt_tests 
Fixes incorrect assuming BT tests
 2020-09-23 01:56:30 +03:00
Stefanos Kornilios Mitsis Poiitidis 43dfb6c363 Merge pull request #401 from Sonicadvance1/frontend_signal_handler 
Adds ability for the frontend to register a signal handler
 2020-09-23 01:45:15 +03:00
Ryan Houdek fe3028d5b5 Merge pull request #323 from FEX-Emu/skmp/callbacks 
Thunks: Initial Callback support
 2020-09-22 14:18:12 -07:00
Ryan Houdek 78ad2e4781 Fixes incorrect assuming BT tests 
66 prefix /does/ change behaviour because that is the operand size
prefix.

Additionally the immediate variant will also modulo the result.
So that needs to be checked for

Confirmed with manual on upcoming host-side unit test runner
 2020-09-22 14:05:26 -07:00
Ryan Houdek de2a165a7d Adds ability for the frontend to register a signal handler 
This will come to be useful for our host code execution and wine in the
future
 2020-09-22 13:19:41 -07:00
Ryan Houdek 15b5eae875 Merge pull request #397 from FEX-Emu/skmp/add-iret 
x86-64: Implement IRET for wine
 2020-09-22 13:00:54 -07:00
Stefanos Kornilios Mitsis Poiitidis 2425ab994b Thunks: Generation script refactor, generic callbacks 2020-09-22 14:35:38 +03:00
Stefanos Kornilios Mitsis Poiitidis 23a4e83ba2 x86-64: Implement IRET for wine 2020-09-21 13:42:07 +03:00
Ryan Houdek 5bd02fb003 Fixes CASP IR op on interpreter when unified memory is enabled 
Noticed by Stef on 09/09/2020 as a curious code block that was failing
Forgot about it until now since we couldn't see exactly where it was
wrong

Code block was mixing x87 (Which forces a fallback to Interpreter) and
cmpxchg8b, which caused that code block to fail.

Since this op was broken with Unified Memory + Interpreter it wasn't
picked up by unit tests since those don't run in unified memory
 2020-09-17 15:35:56 -07:00
Stefanos Kornilios Mitsis Poiitidis 2cb8db0abb Merge pull request #394 from Sonicadvance1/fix_addr_size_override 
Fixes address size override prefix
 2020-09-17 10:00:36 +03:00