Commit Graph
405 Commits
Author SHA1 Message Date
Scott Mansell 0a78651cce Fix ListBegin usages that got missed.
There are still a few in interpeter and IR compaction
which are harder to fix.
2020-09-11 21:50:30 +12:00
Scott Mansell e756b46189 Allow AllNodes to iterate in reverse
We replace Dummy with the old unused BeginBlock
and pointing it at block header like EndBlock
2020-09-11 21:50:30 +12:00
Scott Mansell 6b26290b42 Switch most passes to use the new interface. 2020-09-11 21:50:27 +12:00
Scott Mansell 36afd5b1c6 Block Iterator: Use structured bindings 2020-09-11 21:48:03 +12:00
Scott Mansell 446b261f24 Iterator for blocks 2020-09-11 21:48:03 +12:00
Stefanos Kornilios Mitsis Poiitidis ad13c82918 Merge pull request #371 from Sonicadvance1/sigaction_gt64
Don't allow an application to try and set a signal past 64
2020-09-11 10:45:00 +03:00
Stefanos Kornilios Mitsis Poiitidis 87dbefd0a3 Merge pull request #367 from Sonicadvance1/sigsuspend
Implements sigsuspend
2020-09-11 10:43:50 +03:00
Ryan Houdek e08972b06a Don't allow an application to try and set a signal past 64
We only have 64, this is invalid!
2020-09-11 00:35:39 -07:00
Scott Mansell abd98be5f1 Make Interpreter Reentrant; alloca SSAs on Stack 2020-09-11 19:31:31 +12:00
Stefanos Kornilios Mitsis Poiitidis 27dbc66e2e Merge pull request #361 from Sonicadvance1/cvtpd2dq
Implements missing CVTPD2DQ
2020-09-11 09:20:48 +03:00
Ryan Houdek a3ee4dff45 Implements sigsuspend
This helps out Mono's garbage collector specifically. There is a minor
race that can currently occur with signal 63 but that technically should
only occur on a pause or stop condition.

Might need to change this behaviour if it becomes a problem
2020-09-10 21:50:29 -07:00
Ryan Houdek 8aeb6718ac Merge pull request #362 from Sonicadvance1/fix_guest_signal_dfl
Fixes guest default signal handling and pending signals
2020-09-10 19:00:29 -07:00
Ryan Houdek 98aef5ee19 Merge pull request #355 from Sonicadvance1/initial_32bit_unittest
Adds initial 32bit unit tests
2020-09-10 18:50:06 -07:00
Ryan Houdek 290e2b55c4 Fixes guest default signal handling and pending signals
glibc raise() actually disables all signals, raises the signal that the
user wants, then reenables the previous signal mask.

On the reenabling of the previous signal mask, that is when the pending
signal fires.
This needs to be accurately handled, so check for pending signals
getting unmasked in sigprocmask

This also then needs to be further fixed to handle default signal
handling, where if a signal was sent that is default ignored (NOT set to
ignore!) then it would just exit the application before.
Now something likg SIGCHLD with the default handler (aka ignore) won't
kill the process
2020-09-10 18:16:24 -07:00
Ryan Houdek 7a80f2bcbb Implements missing CVTPD2DQ
Without impementing MXCSR still, this matches the already implemented
CVTTPD2DQ
2020-09-10 16:50:05 -07:00
Ryan Houdek 5b0386ad83 Ensures the RIP only gets stored as 32bit in 32bit mode 2020-09-07 00:04:30 -07:00
Stefanos Kornilios Mitsis Poiitidis e2fc0f03c9 loopOp: Constant takes size in bits, not bytes 2020-09-07 00:51:38 +03:00
Ryan Houdek 4b17521ab9 Merge pull request #343 from Sonicadvance1/cpuid_improvements
Has /proc/cpuinfo generated from CPUID
2020-09-06 12:40:03 -07:00
Ryan Houdek 6e28fd68c3 Merge pull request #344 from Sonicadvance1/rcpc
Adds support for RCPC load instructions
2020-09-06 12:31:28 -07:00
Stefanos Kornilios Mitsis Poiitidis 54bf7a095a Merge pull request #349 from Sonicadvance1/fix_altstack_disable
Fixes guest disabling sigaltstack.
2020-09-06 17:40:26 +03:00
Ryan Houdek 50227ba379 Fixes guest disabling sigaltstack.
Previously we never checked for SS_DISABLE.
We were also only ever checking for ss_sp being a valid memory range
when we should have been checking for the absense of SS_DISABLE.

Fixes #326
2020-09-05 21:59:52 -07:00
Ryan Houdek c12847cbcb Cleans up CPUID
Instead of saying we support the world, actually go through each
individual flag and say that we support the correct things.
Puts FEX plus the git hash in to the model name for now.
Once we have a tagged release in the future we can change this to have
its version tag inside of it.
2020-09-05 16:59:10 -07:00
Ryan Houdek 2175e9d9c8 Adds support for RCPC load instructions
If the host CPU supports RCPC instructions then it'll use those
instruction of atomics for LoadMemTSO ops.

This pushed my worst case FTL test from 16FPS to 17FPS .

There is another extension to RCPC to add short immediate offset support
which the c630 doesn't support any way. For future optimization on
hardware we can use that.
2020-09-05 16:58:50 -07:00
Ryan Houdek 5fe7466d92 Adds check for RCPC support 2020-09-05 16:58:50 -07:00
Ryan Houdek ee8dfc96fa Adds support for the AArch64 JIT to disable TSO
AArch64 is the only backend that currently needs to do something
different for TSO
2020-09-05 16:58:03 -07:00
Stefanos Kornilios Mitsis Poiitidis 0e0fddafec arm64: Return DebugData if passed 2020-09-03 07:06:18 +03:00
Stefanos Kornilios Mitsis Poiitidis dd5c3a5e44 Merge pull request #333 from Sonicadvance1/more_signals
Moves our entire execution model over to signal execution
2020-09-03 02:12:21 +03:00
Ryan Houdek cf5afbcd8d Some minor optimizations in the AArch64 ASM dispatcher
Ensures the top of the loop is 16byte aligned to give Cortex's
prefetcher the best chance of loading the code.

If the address size is a power of two (We always do 64GB or 32GB VM atm)
then do the address size masking in one instruction instead of loading a
64bit constant first

Move some accessed constants to a literal pool at the end of the ASM
dispatcher.
2020-09-02 16:00:17 -07:00
Ryan Houdek a75a7b3dcd Fixes a crash in the AArch64 JIT from the previous signal work
Was accidently setting the buffer size then unmapping at that new size.
Make sure to unmap then resize.
Also cleans up which buffer is actually being touched here, only the
initial buffer ever changes here.
2020-09-02 16:00:17 -07:00
Ryan Houdek 50349db4c6 Moves our entire execution model over to signal execution
This requires implementing custom ASM dispatchers for the interpreter
side of things so it works correctly.
Allows all of our CPU backends to safely support signaling.
This is a bit of a nightmare change and requires rethinking logic about
debugging in some instances.
2020-09-02 16:00:17 -07:00
Ryan Houdek dbdc7e6b54 Merge pull request #340 from FEX-Emu/skmp/avoid-tzcnt
JIT/x86: Don't use tzcnt
2020-09-02 13:07:12 -07:00
Stefanos Kornilios Mitsis Poiitidis 273db52545 JIT/x86: Don't use tzcnt 2020-09-02 22:57:34 +03:00
Stefanos Kornilios Mitsis Poiitidis 15da415ac6 arm64: Add movn to LoadConstant 2020-09-02 19:48:49 +03:00
Stefanos Kornilios Mitsis Poiitidis a4c677bcbf Interpreter: Fix Mask calculation for OP_NOT 2020-08-28 18:24:04 +03:00
Ryan Houdek ab2020fe62 Merge pull request #309 from phire/ir_cleanup
Misc Optimisation and IR cleanup
2020-08-27 23:07:35 -07:00
Ryan Houdek 092f5249c6 Removes NO_REPLY packet from gdbserver 2020-08-27 13:36:57 -07:00
Ryan Houdek 95a8aba433 Extends gdbstub functionality
There are a significant number of changes here that I don't really
expect much review on.
Adds a bunch of new features and allows us to support GDB, IDA, and
Binja through their remote GDB debugging facilities.
Ghidra may also work but I haven't tried.

This work isn't quite yet complete to do correct thread stepping yet. We
need to add support for stopping threads using signals since threads may
be stuck inside of a syscall.

I have a hack locally that tries pausing all threads and times out after
a few seconds which works well enough for local testing.
2020-08-27 13:34:42 -07:00
Ryan Houdek 2ecd103aed Fixes thread stepping
This doesn't yet work around the problem of threads stalled in a syscall
2020-08-27 13:34:42 -07:00
Ryan Houdek 8ea871729c Moves RunningMode to the config struct 2020-08-27 13:34:42 -07:00
Stefanos Kornilios Mitsis Poiitidis 240806ba67 Merge pull request #307 from Sonicadvance1/implement_sigpending
Implements rt_sigpending
2020-08-25 16:14:57 +03:00
Scott Mansell fd06b594d9 Remove BFE's ablitly to handle FPRs
All instances have already been moved to other IR_OPs
It's just useless code

Also, an optimisation for X86's BFEs might have crept in
2020-08-26 00:59:28 +12:00
Scott Mansell 6dadf81001 x64jit: FPR 8/16bit Load Context/Mem should zext
Fixes OpenGL corruption issue in FTL with previous commits

Also includes an ir test
2020-08-26 00:47:40 +12:00
Scott Mansell c90945b072 JitArm64: Remove Zext, add Sbfe 2020-08-26 00:47:40 +12:00
Scott Mansell 43615f41ee Remove some unnessicary BFEs
Store result insures 32bit args are always sign extended
Inserting a BFE if needed.
2020-08-26 00:47:40 +12:00
Scott Mansell 5119a0bdb3 Elimiante ALU IR nodes that don't zero extend
Add and substract were the main culprits here.

We are trying to more towards a state where:
  * Every IR op can expect it isn't given extra bits
     on it's input
  * Every IR op never sets more bits than it's size
  * All unnessicary BFEs are never emitted
  * ARM doesn't have to implement special 8 and 16bit versions of IR ops
      All masking required to implement 8/16bit math on
      arm should be explictly generated from Opcode decoder
2020-08-26 00:47:40 +12:00
Scott Mansell 8023800213 Implemement Sbfe for x86
And fix interpeter
2020-08-26 00:47:40 +12:00
Scott Mansell 3989772a4f Remove OP_Zext
Zext has confusing sematics and does excatly the same thing as BFE

 * Repace with other ops (mostly BFE)
 * Allow specifying BFE size
2020-08-26 00:47:01 +12:00
Scott Mansell 3031d54823 InstallToX87Table: Fix segfault in debug assert 2020-08-25 20:17:49 +12:00
Ryan Houdek 758de4deaa Implements rt_sigpending
Any time a guest signal is blocked, add it to the guest signal mask.
This doesn't use a signal queue so repeat signals can end up being lost.
This is expected behaviour

This doesn't help with implementing the problem of unblocking signals
causing the masked signal to be resent
2020-08-20 13:47:03 -07:00
Stefanos Kornilios Mitsis Poiitidis 043c7c62be Merge pull request #301 from Sonicadvance1/cleanup_tables
Small bit of OpDispatcher table cleanup
2020-08-20 11:08:32 +03:00