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Code Issues Packages Projects Releases 67 Wiki Activity
13,833 Commits 11 Branches 71 Tags
57504f2359329a47a81ae40bb7bc67f0bad0d120
Commit Graph
2996 Commits
Author SHA1 Message Date
Lioncache 4f6800b768 IR: Remove Swap1/Swap2 ops 
These are no longer used.
 2025-10-05 13:26:51 -04:00
Lioncache c84801adb3 RedundantFlagCalc: Avoid vector copy in OptimizeParity() 
Previously this was making a copy of the vector, when we only
need to read from it.
 2025-10-05 12:17:45 -04:00
Lioncache 69f990c1f8 RedundantFlagCalc: Organize headers 
Also remove incorrect comment that this pass isn't used.
 2025-10-05 12:17:45 -04:00
Lioncache 8a83564678 RedundantFlagCalc: Remove unimplemented prototype 
Just tidies the interface a little.
 2025-10-05 12:17:45 -04:00
Lioncache 43d93f836f RedundantFlagCalc: Mark members as const where applicable 
These don't affect member state.
 2025-10-05 03:14:21 -04:00
Ryan Houdek 3baa598b9e HostFeatures: Adds flag for SSE4a 2025-10-04 02:51:28 -07:00
Ryan Houdek 9cef8ff7ce OpcodeDispatcher: Implement support for SSE4a variable extrq/insertq 2025-10-04 02:44:56 -07:00
Ryan Houdek a499ad6404 IR: Implement two new IR ops 
rbit is useful in generic algorithms.
`MaskGenerateFromBitWidth` is only really useful for SSE4a, but
implemented in the OpcodeDispatcher is rough, so add an operation.
 2025-10-04 02:43:39 -07:00
Ryan Houdek 7c8767ab32 OpcodeDispatcher: Minor improvement to inserting constant to vector 2025-10-04 02:43:21 -07:00
Lioncache 48c6acbc87 IR: Move RegisterAllocationPass forward decl to JITClass 
This isn't actually used anywhere in the IR header, so we can
move it to where it's actually used.

Now the IR interface header doesn't have anything related to the
independent passes in it.
 2025-10-04 00:08:58 -04:00
Ryan Houdek b5d93bc4a0 Merge pull request #4928 from lioncash/passthru 
EnumUtils: Add define for default passthrough formatting
 2025-10-03 19:45:41 -07:00
Ryan Houdek f45be1f59e OpcodeDispatcher: Implement support for imm extrq/insertq 
Fairly straightforward to implement, but not exciting in their
performance.
 2025-10-03 13:05:43 -07:00
Ryan Houdek 012c2ba851 IR: Fixes vector 64-bit binops 
We were only supporting operating size of 256-bit and 128-bit. These
also support 64-bit which wasn't wired up.

SSE4a will want to use 64-bit.
 2025-10-03 13:04:09 -07:00
Lioncache a0c2ce0068 EnumUtils: Add define for default passthrough formatting 
Handles a normal case where printing an enum type as an integral value
is still desirable.

Mainly just a way to reduce boilerplate.
 2025-10-03 14:21:19 -04:00
Lioncache 0258e914e0 IR: Convert RegisterClassType to an enum class 
Removes the last of the wrapper value types in favor of enum classes.
 2025-10-03 03:54:56 -04:00
Ryan Houdek c35b81d2c5 Merge pull request #4925 from lioncash/regclass 
IREmitter: Add register class helpers
 2025-10-02 22:14:41 -07:00
Lioncache fc63dcedb6 IR: Migrate to new helpers 
Reduces a bunch of noise related to the register classes and hoists them
out so that converting the classes over to enums should be fairly
straightforward.
 2025-10-03 00:53:02 -04:00
Lioncache c879650c4b IR: Add GPR/FPR helpers 
These will be utilized in follow up PRs
 2025-10-02 23:53:50 -04:00
Lioncache 3841cc4aa5 IRDumper: Add remaining missing enum values 
Now that the compiler can warn against these, we can fill the
remaining list in.
 2025-10-02 12:18:36 -04:00
Lioncache 468f2f2d2d IRDumper: Convert remaining printers to lambda style invocations 
This allows easily moving the default case out of the switch, making it
easier for compilers to warn about missing values in switches if any
enum members are added in the future but aren't added to the
formatters.
 2025-10-02 12:18:28 -04:00
Lioncache be5db91c13 IRDumper: Add missing CheckTF BranchHint 2025-10-02 03:01:11 -04:00
Lioncache 6e7d0a520a IRDumper: Fix error message for FloatCompareOp 
If ever printed this would give a misleading error that it was an
unrecognized OpSize type.
 2025-10-02 02:57:29 -04:00
Lioncache e37996873a IRDumper: Add missing FenceType entry 2025-10-02 02:55:34 -04:00
Lioncache 25e851b570 IRDumper: Add missing SyscallFlags entry 2025-10-02 02:55:31 -04:00
Lioncache d65c54ba21 IR: Remove TypeDefinition struct 
These aren't used at all.
 2025-10-02 00:50:51 -04:00
Lioncache f76e8c7185 IR: Convert MemOffsetType to enum class 
Gets rid of another wrapper struct.
 2025-10-02 00:24:42 -04:00
Lioncache 530821fc4a IR: Convert rounding modes to enum class 
Same behavior, but more compact
 2025-10-01 23:37:57 -04:00
Lioncache 863d1e0007 IR: Convert FenceType to an enum class 
Same thing minus an extra struct lingering around.
 2025-10-01 23:13:08 -04:00
Lioncache a798880ac8 IR: Convert CondClassType over to enum class 
Instead of having this sort of odd indirection through a struct type,
we can add support for defining custom enums in the IR description.

This lets us both get strong typing (and allow for weak typing, should
any enum in the future need it), without needing a struct for a basic
value type.

Even then, if we do need a struct for anything in the future, then
we still allow strong typing for values themselves while allowing
them to be used in various ways.
 2025-10-01 10:45:00 -04:00
Lioncache 84325d6b5c Arm64Emitter: Cull unnecessary includes 
Also fixes an indirect include.
 2025-09-30 09:32:25 -04:00
Lioncache 6b61093037 JITClass: Mark functions as static where applicable 
These don't depend on any class state.
 2025-09-29 23:42:43 -04:00
Ryan Houdek 7f8fffbb24 FEXCore: Implement support for AVX gathers with overflow 
Falls down the emulated path so we can zero extend the address
calculation. No way for SVE gathers to use 32-bit addressing.
 2025-09-29 16:06:02 -07:00
Ryan Houdek e5680e031d Merge pull request #4835 from pmatos/fix/classify 
Fix quiet and signalling nan propagation
 2025-09-23 11:17:37 -07:00
Paulo Matos e7a47a647c Fix quiet and signalling nan propagation 
This adds a new mode X87StrictReducedPrecision.
The strict reduced precision is like the reduced precision but adds extra checks,
like the currently implemented nan and snan propagations.

Fix for __builtin_issignaling() test of SPEC2017 classify test.
 2025-09-23 13:48:45 +02:00
Ryan Houdek c58db36a7c OpcodeDispatcher: Fixes telemetry on legacy segment read 2025-09-22 11:57:34 -07:00
LC 4593099882 Merge pull request #4896 from pmatos/fix/x87IsZero 
Remove unused IsZero; NFC
 2025-09-22 15:18:05 +02:00
Paulo Matos 21e29af48b Remove unused IsZero; NFC 2025-09-22 14:22:14 +02:00
Ryan Houdek efe401c7a4 OpcodeDispatcher: Fixes fxsave x87 register storing 
These get stored based on the current rotation of TOP. So we need to be
a bit careful with how we do this storing. A smidge of overhead, but
nothing unexpected.
 2025-09-19 14:04:32 -07:00
Ryan Houdek dd4f508b77 FEX: Fixes SIGILL reporting 
Two bug fixes here.
- We weren't reporting a correctl ErrorRegister. Needs to contain
  PF_INSTR at least.
- We weren't setting siginfo->si_addr in the case of `FaultToTopAndGeneratedException`

Fixes Mafia 2 (Classic)
 2025-09-18 11:26:15 -07:00
LC bdbeef3b9a Merge pull request #4884 from Sonicadvance1/fex_decodedinst_size 
Frontend: Improve DecodeInst size from 128 bytes to 80
 2025-09-16 10:05:33 +02:00
LC 8ead4a3c34 Merge pull request #4878 from Sonicadvance1/modrm_oob 
unittests/ASM: Implement modrm OOB tests
 2025-09-16 10:02:38 +02:00
LC 2d53a9b0dc Merge pull request #4885 from Sonicadvance1/remove_log_about_segments 
OpcodeDispatcher: Removes a log about unknown segments
 2025-09-16 10:01:27 +02:00
Lioncache 056abb5901 IR: Add missing includes 
Fixes some indirect includes while we're at it.
 2025-09-15 11:47:39 +02:00
Lioncache af28406dbc IR: Remove unnecessary friend class declarations from OrderedNode 
These classes don't exist anymore, so we can get rid of these declarations.
 2025-09-15 11:37:37 +02:00
Ryan Houdek a30593efd6 OpcodeDispatcher: Removes a log about unknown segments 
This behaves like `UnimplementedOp`, giving a SIGILL if it actually gets
hit.
 2025-09-12 17:34:16 -07:00
Ryan Houdek 3fa400bc55 Frontend: Improve DecodeInst size from 128 bytes to 80 
We were paying a large cost per Literal type that we can special case
for the two class of instructions that use a 64-bit literal.

If we packed this would get to a further 62 bytes but probably not worth
it.
 2025-09-12 16:07:01 -07:00
Ryan Houdek 90ea16325a Frontend: Move a couple of members from DecodeInst 
LastEscapePrefix doesn't need to be in DecodeInst, and we can have a
couple of flags for ForceTSO/DecodedSIB/DecodedModRM.
 2025-09-12 15:37:18 -07:00
Ryan Houdek d6a466ac0b OpcodeDispatcher: Fixes 16-bit movbe to memory 2025-09-12 12:42:18 -07:00
Ryan Houdek 7273041314 FEXInterpreter: Remove FEXLoader 
Doesn't /quite/ remove the ArgumentLoader because it is intertwined with
LinuxEmulation in an annoying way that will take another step to remove.
 2025-09-12 10:24:58 -07:00
Lioncache e0f27bb855 Interface/Context: Remove unnecessary headers/forward declarations 2025-09-12 04:13:26 -04:00