Commit Graph
111 Commits
Author SHA1 Message Date
Ryan Houdek 9394e49c95 Merge pull request #1431 from Sonicadvance1/expose_arm_names
CPUID Expose Hybrid flag and CPU names
2021-12-12 18:07:53 -08:00
Ryan Houdek d4655fbb17 Merge pull request #1424 from Sonicadvance1/aot_code_movement
FEXCore: Reorganizes some AOT related code
2021-12-09 13:55:50 -08:00
Ryan Houdek d74cf6d8d8 CPUID Expose Hybrid flag and CPU names
Had some idle time so I implemented this logic.

We do some tricky logic to have a big.little configuration even with
unknown CPU core types. Promoting or demoting a single MIDR depending on
if we have a mixed configuration or not.

In a non-hybrid design we only claim product names inside the CPUID
product string.

This will appear if you `/proc/cpuinfo` or read the CPUID registers
directly

eg on Snapdragon 888:
processor       : 0
model name      : FEX-2112-1-g13b14b85            Cortex-A55
processor       : 1
model name      : FEX-2112-1-g13b14b85            Cortex-A55
processor       : 2
model name      : FEX-2112-1-g13b14b85            Cortex-A55
processor       : 3
model name      : FEX-2112-1-g13b14b85            Cortex-A55
processor       : 4
model name      : FEX-2112-1-g13b14b85            Cortex-A78
processor       : 5
model name      : FEX-2112-1-g13b14b85            Cortex-A78
processor       : 6
model name      : FEX-2112-1-g13b14b85            Cortex-A78
processor       : 7
model name      : FEX-2112-1-g13b14b85            Cortex-X1

eg on Macbook Pro VM which can't see the CPU type:
processor       : 0
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 1
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 2
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 3
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 4
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 5
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 6
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
processor       : 7
model name      : FEX-2112-1-g13b14b85            Unknown ARM CPU
2021-12-09 11:39:52 -08:00
lioncash 7ed6007252 Context: std::move functions in signal registration functions
Prevents potential reallocations, given we're using std::function here.
2021-12-09 14:31:47 -05:00
lioncash c73991f467 Context: Take some arguments as pointer-to-const
Several API functions act as state querying functions. These can take
some parameters by const to communicate that we don't intend to modify
the respective passed in instance.
2021-12-09 14:26:35 -05:00
Ryan Houdek 45f919683a FEXCore: Reorganizes some AOT related code
Specifically this tries to avoid changing much behaviour and keeping the
code the same. So most of it is a direct transplant without any
modifications. This is step one of the process so I can start logically
separating the code and making sense of it.

This mostly moves the AOT IR handling to its own independent file for
separation. Cleaning up the Core.cpp file quite heavily.

Two minor behaviour changes that got mixed up with this change.

The first one is an ASAN fix.
This is the FEX_PACKED on the RegisterAllocationData class.
I didn't want to change too heavily how this serialization works but I
wanted to resolve the ASAN error. This may change in the coming work.
Problem was the padding betwene the uint32_t and the PhysicalRegister
wasn't initialized but was being read.
Since it is all uint8_t types afterwards there isn't a perf issue here.

Second fix was a crash that occurs if you're attempting to both capture
and load IR on the same run. This is a quirk where we mmap the original
IR file. Then on shutdown the IR file is getting saved.
At which point we open the IR file again, truncate it, and start
serializing all of the IR data.
The truncation makes it so our mmap of the file is no longer resident,
resulting in a crash when reading our IR cache from the mmap region.
Now open a temporary file and rename it after storing.
Resolves the crash but still doesn't really solve the issue of multiple
processes overwriting the same IR files.
2021-12-06 18:42:21 -08:00
Ryan Houdek 5b9da4f2be Arm64: Consolidate HandleSIGBUS
We can share this between the interpreter and the JIT. Necessary to
support the TSO-correct interpreter path.

With this change the interpreter is TSO-correct for GPRs. Just not FPRs
yet.
2021-11-02 23:54:25 -07:00
Ryan Houdek d847f6e1b3 JITSymbols: Allow grouping JIT symbols by guest named regions
This lets us have JITsymbols grouped by library.
Useful for determining where to thunk.

Sadly perf doesn't have an option to deduplicate regions by name, so
some external tooling is necessary to make it look nice.
2021-10-16 21:10:57 -07:00
Ryan Houdek 1d9b66044a JITSymbols: Change over to runtime enablement of symbols
Adds a new option for just describing all JIT state as a single symbol.
Useful for simple profiling of total time spent in the JIT
2021-10-13 17:48:34 -07:00
Ryan Houdek cb21f52f93 Thunks: Have the ThunkHandler load the FEX malloc symbol libraries
If the thunk configuration is enabled then preemptively load the
libraries. Since they will need to be loaded for any thunking library.

This is because we need to ALWAYS share the allocators to the thunks.
2021-10-05 23:51:26 -07:00
Ryan Houdek fb01e8bf28 Merge pull request #1283 from Sonicadvance1/minor_core_cleanup
Core: Minor documentation and code splitting
2021-10-02 11:06:56 -07:00
Tony Wasserka d71add78ae Build fix for ENABLE_JITSYMBOLS 2021-10-01 17:20:26 +02:00
Ryan Houdek 9ab7de56ef Core: Minor documentation and code splitting
This will change slightly in the future. Clean this up and document.
2021-09-30 18:01:57 -07:00
Ryan Houdek f161e3bfb0 Massive amount of IWYU cleanup
This isn't quite a 100% clean sweep of IWYU.
There are some false positives where clang fails.
Additionally there are still a few missed in the frontend side of things
that I didn't get to
2021-08-28 00:32:15 -07:00
Ryan Houdek 304db72d6b Fixes Callback interface to take a thread argument
This was using the implicit thread TLS object. All users of this
have access to the thread object directly.

Use that instead. Fixes a subtle bug were the frontend could be trying
to do a callback and TLS sections weren't correctly set.
2021-08-26 01:23:17 -07:00
Ryan Houdek 6483740553 FEXCore: Return the ParentThread with InitCore
This always returns success and for easier state management, just return
our parent thread.

Frontend needs full visibility of this state anyway for thread
management.
2021-08-24 23:20:44 -07:00
Ryan Houdek 740270c05f Linux: Implements support for clone with namespaces
This is very tricky to handle and it has a bunch of rough edges.
One of the major problems that we can't workaround is that if we receive a
clone flag that pthreads can't support with THREAD, then we are required to fall down
the pthreads code path.
This is because threads going down the clone path will break TLS and we don't have
a way to work around it currently.

So this adds a clone path, a clone3 path, and keeps the legacy path as well.
Which makes this fairly convoluted but it gets pressure-vessel working on x86-64 host.
It's a bit tricky to setup but it does work.

Still some work necessary to get pressure-vessel working on AArch64 host, but I'm working on that.
2021-08-10 18:31:04 -07:00
Stefanos Kornilios Mitsis Poiitidis b010ab42c7 JIT: Add an option to disable SRA 2021-08-06 22:52:58 -07:00
Ryan Houdek c2a97d4fc1 Minor header shuffling to improve compilation time
Shaves a few seconds off compile time
2021-07-20 04:27:28 -07:00
Lioncash c4216755ab Context: Add alias for exit handler
Places the definition in one place so it doesn't need to be written
several times.
2021-06-30 19:50:57 -04:00
Lioncash 46a6e79233 Context: Place return value from GenerateIR into a struct
This makes it a little more straightforward to see what these return
values mean without needing to look at the implementation.

These tuples were also getting a little bit large.
2021-06-30 19:30:03 -04:00
Ryan Houdek fbfc774446 Implements support for deferred signal handler installation
I saw a red herring that I thought the high cpu usage in steamwebhelper could come from signal handlers.
This turned out to not be the case, but now I've got this implemented.

Installs the few signal handlers that we need upfront but for everything that isn't a mandatory signal
we instead now wait until the guest also installs that signal handler.
This fixes #1107
2021-06-24 20:42:39 -07:00
Lioncash ef7aff796f General: Resolve -Wignored-qualifiers warnings
Removes const qualifiers that don't do anything to the interface.
2021-06-16 21:51:45 -04:00
Lioncash 100bc4c833 Context: Move GPR size retrieval to its own function
This is repeated in quite a few spots, so we can place it in a utility
function and just call it instead.
2021-06-16 16:14:26 -04:00
Ryan Houdek 599b579192 Adds a ShutdownStaticTables context function
Due to a mixture of allocators this needs to be shutdown in the correct location.
A little bit dirty but is necessary without a full refactor
2021-06-09 18:00:54 -07:00
Ryan Houdek dfc454873c Moves AOTIR cache queue object to be inside the context
This fixes a crash that occurs due to mixing memory allocators.
This PR has tickled the allocation just enough that it broke
2021-06-08 02:44:40 -07:00
Lioncash 341b811642 Utils: Add CompilerDefs.h for compiler-specifics
Puts a layer of separation around compiler specifics (and also makes
them nicer to write).
2021-06-05 13:55:54 -04:00
Lioncash 1936ebc59c General: Add missing const specifiers where applicable
Minor change that adds missing const specifiers to getters that don't
modify internal class state.
2021-06-03 20:24:27 -04:00
Stefanos Kornilios Mitsis Poiitidis d70c91ddc6 AOTIR: Multi-threaded AOTGen 2021-05-19 14:19:55 +03:00
Stefanos Kornilios Mitsis Poiitidis df8f1850ae AOTIR: .aotir files are now stream-written 2021-05-11 14:37:12 +03:00
Stefanos Kornilios Mitsis Poiitidis ee8f8ed176 Improve error handling 2021-05-01 09:40:50 +03:00
Stefanos Kornilios Mitsis Poiitidis 244ef94e9b AOTIR: Generate list of files with code, add Scripts/FEXUpdateAOTIRCache.sh to generate all files 2021-05-01 09:40:50 +03:00
Stefanos Kornilios Mitsis Poiitidis a85ef061d1 AOITR: Add AOTIRGenerate fo FEXLoader option that does generation 2021-05-01 09:40:50 +03:00
Stefanos Kornilios Mitsis Poiitidis 0897fc4a0a pretrans wip 2021-05-01 09:40:49 +03:00
Stefanos Kornilios Mitsis Poiitidis 32b4b02302 AOTIR: mmap based loading 2021-04-28 13:08:43 +03:00
Stefanos Kornilios Mitsis Poiitidis 80493487db ELF Loading: Cleanups all around 2021-04-14 10:59:23 +03:00
Stefanos Kornilios Mitsis Poiitidis 59ce750af6 Elf: Add ELFCodeLoader2, with simplified loading logic 2021-04-13 15:59:36 +03:00
Ryan Houdek 21a364c2ad Switches FEXCore over to pthreads implementation
This defaults to a pthread implementation but it can be switched over to a custom thread
handler if the frontend desires.
2021-04-01 00:31:45 -07:00
Lioncache b81ea43601 Context: Make use of std::optional with GetFilenameHash()
Same behavior, minus the need for an out parameter. While we're at it,
we can tidy up some of the file handling code.
2021-03-29 12:17:32 -04:00
Ryan Houdek 15dd70487f Removes legacy difference between FEX config env variable and enum names 2021-03-29 00:26:11 -07:00
Ryan Houdek a50689aa8b Merge pull request #885 from Sonicadvance1/cpuid_leaf
Adds support for CPUID leafs
2021-03-23 20:55:33 -07:00
Scott Mansell 6a8f68022f Join threads after fork.
Also, add some comments to document things and
rename function to be clear about it's purpose.
2021-03-24 15:41:09 +13:00
Ryan Houdek 43ddba4e82 Adds support for CPUID leafs
Leafs come from ECX but only some CPUID functions support this.
This adds the initial infrastructure but doesn't yet add support for the CPUID functions to consume the leaf.
2021-03-23 18:13:14 -07:00
Scott Mansell 21687f4dc5 Also destroy the parent thread 2021-03-24 03:14:23 +13:00
Scott Mansell 41a1a9d400 Cleanup threads when they exit 2021-03-24 03:14:23 +13:00
Stefanos Kornilios Mitsis Poiitidis f0d3004363 Thunks: Add Thunk json, thunk guest folder 2021-03-10 15:51:34 +02:00
Scott Mansell 35c01038ba Seperate per-thread and per-frame state 2021-03-09 20:27:44 +13:00
Ryan Houdek a3ba1ae199 Deduplicates some configuration data
Configuration mapping was duplicated between three different tables.
Additionally default configuration values were strewn about. Making it confusing as to what the default value would end up being

Adds a new ConfigValues.inl header that defines a few things right next to each other.
Defines the enum name as usual.
Defines the JSON config option name.
Defines the Environment config option name
Defines the default value that the configuration should be
2021-03-08 22:53:41 -08:00
Scott Mansell bea0adc3d1 Allow both jitcores to be enabled simultaneously 2021-03-08 16:30:25 +13:00
Stefanos Kornilios Mitsis Poiitidis 3978097f15 Merge pull request #705 from FEX-Emu/skmp/mmap-cache-flushing
Flush IR/Code cache on mmap, mmunmap & mprot
2021-03-03 12:59:29 +02:00