Commit Graph
33 Commits
Author SHA1 Message Date
Ryan Houdek 04e0baadc6 Changes LogMan assert to defines
C++ no-op functions can't optimize out the predicate arguments in all cases.
This was causing a problem where zero cost assertions weren't actually zero cost.

The only way to resolve this is to actually use macros sadly enough.

This will give a fairly hefty performance uplift with anything operating on IR.
2021-04-26 13:49:35 -07:00
Ryan Houdek eff97509c0 Replaces naked mman usage in TestHarnessRunner 2021-04-16 21:01:59 -07:00
Stefanos Kornilios Mitsis Poiitidis 830e41459c Fix build for test harness, irloader 2021-04-15 11:05:07 +03:00
Stefanos Kornilios Mitsis Poiitidis 942b8549c6 Docs: Add tags to the source code 2021-03-30 12:21:18 +03:00
Ryan Houdek a3ba1ae199 Deduplicates some configuration data
Configuration mapping was duplicated between three different tables.
Additionally default configuration values were strewn about. Making it confusing as to what the default value would end up being

Adds a new ConfigValues.inl header that defines a few things right next to each other.
Defines the enum name as usual.
Defines the JSON config option name.
Defines the Environment config option name
Defines the default value that the configuration should be
2021-03-08 22:53:41 -08:00
Stefanos Kornilios Mitsis Poiitidis 613e5b66ba SMC: Expand --smc-checks options to 'none', 'mman', 'full' 2021-03-03 12:49:23 +02:00
Stefanos Kornilios Mitsis Poiitidis 3bd8731b26 IR: Add CONFIG_VALIDATE_IR_PARSER, enable it on TestHarnessRunner 2021-01-21 21:38:41 +02:00
Ryan Houdek 433162004a Implements more syscalls 2021-01-12 14:50:17 -08:00
duck d1b1e5ae07 pass DumpIR to TestHarnessRunner 2021-01-10 17:44:33 -05:00
duck 6388151fc0 Oops. 2021-01-06 18:12:09 -05:00
duck ffc4996ca6 DidFail -> DidFault 2021-01-06 18:11:23 -05:00
duck f9cd0f0179 Have tests that throw a non-HLT SIGSEGV fail
Patch moves HandleSIGSEGV in HostFactory.cpp to a non-frontend host signal handler, then registers its own frontend signal handler to catch unhandled segfaults.
2021-01-06 05:07:47 -05:00
Ryan Houdek 37983006f0 Moves FEXCore's SignalDelegator and SyscallHandler to the frontend
Sadly these things can't be split without breaking functionality so it
turns in to a bit of a mess.

SyscallHandler is very much something that is a Linux only construct and
shouldn't be in FEXCore itself. Lets the frontend register a
Syscallhandler with FEXCore. FEXCore itself is then aware of the current
syscall ABI and handles the ABI in an optimal fashion.
So it is not a 100% clean break otherwise we would lose performance.

The SignalDelegator then needs to move to the frontend since the
SyscallHandler requires it for signal based syscalls.
The CPU backend signal handling still needs to happen in FEXCore because
it is a very tight coupling with the CPU backend.
Once we need to support more Signal handling we can give the backends
cleaner support to select which specific OS handler to handle.
2020-12-13 22:38:04 -08:00
Ryan Houdek 36b24ad141 Removes all uses of non-unified memory and SHM regions
Let's just delete the whole thing!
2020-12-10 02:09:52 -08:00
Ryan Houdek 6dc532e90e Removes Main config loader from test runners
This was accidental and can cause test failures.
Make sure to not load arguments from Main config for these
2020-12-09 20:04:58 -08:00
Ryan Houdek f14cd54791 Switches over to having a correctly layered configuration system
Instead of having the configuration being loaded and stored in to a
frontend system. First moves the backing store of the configuration in
to FEXCore.

Each layer that is constructed then loads its particular configuration.
After the layers are loaded, then a meta layer is constructed that
merges the layers flat.

This means we will no longer hit the problem where a configuration is
stored in the "main" configuration file, then environment and arguments
passed manage to overwrite it.

The order of the layers going from inner most layer to outer most, with
outermost overwriting previous layer configurations is as follows:

Main < Global application < Local application < Arguments < Environment

One step that needs to be changed in the future is that FEXCore can then
just load its configuration from the layers directly since the data is
in FEXCore now. This will be reserved for a future change so we are less
disruptive.
2020-12-07 11:15:48 -08:00
Ryan Houdek a28df9f5c1 Moves SonicUtils in to FEXCore
Removes the extraneous and dead VM CPU backend
2020-11-29 00:30:28 -08:00
Stefanos Kornilios Mitsis Poiitidis 11e12a9b36 Add --unsafe-no-pf 2020-11-17 11:11:13 +02:00
Stefanos Kornilios Mitsis Poiitidis 8fc6f73571 IR: InvalidateFlags + --abi-local-flags
- InvalidateFlags pseudo-op is a hint for the Dead Flags Elimination pass that flags are not needed past that point
- Adds a new option, --abi-local-flags, that invalidates the flags on CALLs or RETs. This might break code that doesn't follow the ABI rules.
2020-11-17 11:08:29 +02:00
Ryan Houdek 567be0eea0 Fixes Test Harness runner loading tables with wrong mode
We weren't passing the operating mode to context's static initializer
correctly
2020-10-06 19:57:12 -07:00
Ryan Houdek cb525e4a59 Implements x86 host runner
Will be used for unit tests
2020-09-22 23:19:48 -07:00
Ryan Houdek 22e658e36d Foces the test harness runner to use unified memory
All the previous fixed offset problems are now fixed so we can flick
this on.

We still allocate memory regions at fixed addresses, but due to
enforcing pie this is fine.
2020-09-17 15:38:40 -07:00
Stefanos Kornilios Mitsis Poiitidis df3bdf361f SMC: Add --smc-full-checks, implement frontend, irint, irjit, unit test 2020-09-16 01:15:21 +03:00
Ryan Houdek 50349db4c6 Moves our entire execution model over to signal execution
This requires implementing custom ASM dispatchers for the interpreter
side of things so it works correctly.
Allows all of our CPU backends to safely support signaling.
This is a bit of a nightmare change and requires rethinking logic about
debugging in some instances.
2020-09-02 16:00:17 -07:00
Ryan Houdek b262b59916 Fixes up prefix handling for 32bit
Moves REX to a 64bit only table entry. This allows the missing INC/DEC
instructions to exist in 32bit space
2020-06-10 16:49:06 -07:00
Ryan Houdek ba3cb444ee Ensures test harness runner runs in 64bit mode 2020-05-14 01:03:42 -07:00
David Miller e9003acf36 Ensure TestHarnessRunner doesn't enable UnifiedMemory. 2020-04-25 12:56:37 -04:00
David Miller 1589b9a351 Added EnvLoader to frontend binaries, called prior to ArgLoader 2020-04-24 19:53:28 -04:00
Ryan Houdek 4ea18647ed Make the unit test runner allocate less SHM space
It doesn't need 64GB of virtual memory, so knock it down to its minimum
virtual memory required
2020-03-17 09:34:20 -07:00
Ryan Houdek b75647f9a8 Be better behaved with the Test harness helper results 2020-03-06 09:08:50 +02:00
Scott Mansell 149ab3f6f7 TestHarnessRunner: Abuse CompareStates to verify
Bit of a hack, but it gets verification against the expected values.
2020-03-06 09:08:35 +02:00
Scott Mansell 81b9810f36 FEXCore: Refactor context start/pause/step interface 2020-03-06 09:08:28 +02:00
Ryan Houdek 369686c992 Initial Commit 2020-03-06 09:08:13 +02:00