Ryan Houdek
3f6cdc2e03
IR: Change VLoadVectorMasked to use IR::OpSize
2024-10-27 17:20:18 -07:00
Ryan Houdek
014917301a
IR: Change StoreMem to use IR::OpSize
2024-10-27 17:14:18 -07:00
Ryan Houdek
07f8a4eadd
IR: Change LoadMem to use IR::OpSize
2024-10-27 16:33:14 -07:00
Ryan Houdek
5fd127b53a
IR: Change StoreContextIndexed to use IR::OpSize
2024-10-27 15:51:30 -07:00
Ryan Houdek
ece89ddeab
IR: Change LoadContextIndexed to use IR::OpSize
2024-10-27 15:50:03 -07:00
Ryan Houdek
e438d32879
OpcodeDispatcher/Vector: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Ryan Houdek
32ef10b273
OpcodeDispatcher/AVX128: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Ryan Houdek
ad296051b7
OpcodeDispatcher/Crypto: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Ryan Houdek
e603136918
OpcodeDispatcher/Flags: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Ryan Houdek
f8a61f7d7e
OpcodeDispatcher/X87: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Ryan Houdek
cb5ba8baae
OpcodeDispatcher/X87F64: Ensure IR ops use OpSize
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NFC
2024-10-27 14:11:07 -07:00
Paulo Matos
5f6c0d2245
X87 code simplification
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Merges some of the code from reduced precision into the main path
since they are practically the same.
2024-10-24 18:15:49 +02:00
Ryan Houdek
fafc04a59e
OpcodeDispatcher/AVX128: Fixes glibc allocation
2024-10-21 09:34:59 -07:00
Ryan Houdek
fe8f5c745d
OpcodeDispatcher/AVX128: Use unified PSHUF{L,H}W implementation
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Allows the AVX128 implementation to use the same implementation as the
128-bit SSE implementation, because it works per 128-bit lane just like
SSE. Is a minor optimization.
2024-10-21 09:24:38 -07:00
Ryan Houdek
d876224358
OpcodeDispatcher: Unify MMX and SSE PSHUF{L,H}W implementations
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No functional change.
2024-10-21 09:11:05 -07:00
Ryan Houdek
d7afcee622
AVX128: Fixes asome AVX bugs
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vblendvps, vblendvpd, vpblendvb all broke because of failing to zext the
128-bit register correctly.
vinsertps broke because it was accidentally using the wrong
implementation.
Extends each of their unittests to handle these cases.
2024-10-18 15:49:25 -07:00
Paulo Matos
10ec6b63b6
Fix FXTRACT for 0.0 and -0.0
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Fixes fxtract by returning the correct values for 0.0 and -0.0. We moved the split of fxtract into _sig and _exp, to the opcode dispatcher, to ease some comparisons.
Also removed the IR node F80XTRACTStack which is not needed anymore.
2024-10-17 09:05:10 +02:00
Paulo Matos
0d53f2b45c
Implements explicit state switch between X87 and MMX
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Fixes #3850
2024-10-15 17:58:53 +02:00
Ryan Houdek
e82d2c70c3
Merge pull request #4095 from alyssarosenzweig/opt/jit-time
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speed up the JIT
2024-10-04 09:00:03 -07:00
Ryan Houdek
7dda75646d
OpcodeDispatcher: Fixes segment prefixing on vector element loadstores
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These had completely forgotten to load segment prefixes on the element
loadstore operations. This had caused a crash on the Linux version of
"Halls of Tormet" (steamid 2218750).
This game has TLS vector data which it was loading with a movhps and hit
this path.
2024-10-03 20:51:37 -07:00
Alyssa Rosenzweig
6cc6181261
OpcodeDispatcher/Flags: dont emit zero
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-10-02 13:38:48 -04:00
Alyssa Rosenzweig
f175b525f4
OpcodeDispatcher/Flags: inline constants
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Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-10-02 13:38:48 -04:00
Paulo Matos
eb76dbdf4d
x87 small cleanups; NFC
2024-10-02 18:27:51 +02:00
Ryan Houdek
e6512fbe4d
X86Tables: Remove function wraps from VEX tables
2024-09-16 18:52:55 -07:00
Ryan Houdek
dbca441573
X86Tables: Remove function wraps from DDD table
2024-09-16 18:52:55 -07:00
Ryan Houdek
31adc953b7
X86Tables: Remove function wraps from H0F38/H0F3A table
2024-09-16 18:52:55 -07:00
Ryan Houdek
0dd7f5e2f7
X86Tables: Remove function wraps from SecondaryModRM table
2024-09-16 18:52:54 -07:00
Ryan Houdek
36556c4705
X86Tables: Remove function wraps from Group tables
2024-09-16 18:52:54 -07:00
Ryan Houdek
e29fac3f25
X86Tables: Remove function wraps from Secondary tables
2024-09-16 18:52:54 -07:00
Ryan Houdek
c984bdb42a
OpcodeDispatcher: Remove previous template instantiantions and use Bind
2024-09-16 18:52:54 -07:00
Ryan Houdek
2645b374a7
OpcodeDispatcher: Deduplicate InstallToTable helper
2024-09-16 18:52:54 -07:00
Ryan Houdek
c7413d96ad
OpcodeDispatcher: Constexpr-ify VEX & VEXGroup tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
f3ba8cb33c
OpcodeDispatcher: Constexpr-ify DDD tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
e714933b10
OpcodeDispatcher: Constexpr-ify H0F3A tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
9a0f83cbf6
OpcodeDispatcher: Constexpr-ify H0F38 tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
c4d30e8437
OpcodeDispatcher: Constexpr-ify SecondaryModRM tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
7b30df8a56
OpcodeDispatcher: Constexpr-ify SecondaryGroup tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
86aa459dd1
OpcodeDispatcher: Constexpr-ify PrimaryGroup tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
6c9a47fc71
OpcodeDispatcher: Constexpr-ify Secondary OpSizeMod tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
7a72cf631b
OpcodeDispatcher: Constexpr-ify Secondary RepNEMod tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
3d98eef7b8
OpcodeDispatcher: Constexpr-ify Secondary RepMod tables
2024-09-16 17:40:20 -07:00
Ryan Houdek
f2011b0b79
OpcodeDispatcher: Constexpr-ify Secondary base tables
2024-09-16 17:40:19 -07:00
Ryan Houdek
37a70e2ec6
FEXCore: Convert Base tables over to constexpr
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Only doing the single table for review purposes. Once reviewed I will
hammer out the remaining tables.
Similar to #3320 , most of the OpcodeDispatcher tables can be consteval
and made to be a compile time constant. This just requires shuffling the
code slightly. The idea is to get almost all of the table setup out of
the `InstallOpcodeHandlers` function and instead only install the
handlers that change based on 32-bit or 64-bit, just like the x86 tables
we also did.
2024-09-13 11:39:09 -07:00
Ryan Houdek
34f2bce203
FEXCore: Remove Context header include when unneeded
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This is one of the most expensive headers in FEX, averaging 1.2 seconds
of compile time per include.
We include this header 31 times around the project. Remove
the five instances where it is unused to help this issue. Next step
would be to make the header lighter if possible.
2024-09-09 17:43:35 -07:00
Ryan Houdek
eaaf62e4b7
X87: Make it a bit clearer that 80-bit floats can't hit the memory path
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Makes the static analysis happy.
2024-09-08 18:03:20 -07:00
Ryan Houdek
f51832ca6b
FEXCore: Fixes a bug with VPSRLDQ/VPSLLDQ with >= 16-byte shifts
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When the shift amount is >= 16-bytes then we need to zero the register.
We had a bug where we were assigning `Result.High` to itself, which
effectively made the top 128-bits of the ymm register not modify itself.
Adds a unit test to ensure that doesn't happen again.
2024-09-08 15:39:22 -07:00
Alyssa Rosenzweig
8745455a5b
IR: track whether parity is read
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so we can gate optimizations efficiently
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-09-07 08:26:04 -04:00
Alyssa Rosenzweig
e9ab514962
IR: push parity evaluation down
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so we can optimize it globally
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-09-07 08:26:04 -04:00
Alyssa Rosenzweig
6d4693cbc1
IR: fix scalar FMA tied sources
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needs to be modelled explicitly or else we lose information when translating
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
2024-09-04 07:42:44 -04:00
Mai
2478abba29
Merge pull request #4008 from Sonicadvance1/fix_avx128_vfcmp
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AVX128: Fixes 256-bit float compares
2024-08-25 12:37:04 -04:00