Commit Graph
2569 Commits
Author SHA1 Message Date
Lioncache 39c73d975b OpcodeDispatcher: Handle PCMPESTRI/VPCMPESTRI 2023-04-17 21:42:58 -04:00
Lioncache 30cb1aaaed IR: Add VPCMPESTRX fallback
In order to implement the SSE4.2 string instructions in a reasonable
manner, we can make use of a fallback implementation for the time
being.

This implementation just returns the intermediate result and leaves it
up to the function making use of it to derive the final result from said
intermediate result. This is fine, considering we have the immediate
control byte that tells us exactly what is desired as far as output
formats go.

Given that the result of this IR op will never take up more than
16-bits, we store the flags we need to set in the upper 16 bits of the
result to avoid needing to implement multiple return values in the JIT.

Also, since the IR op just returns the intermediate result, this can be
used to implement all of the explicit string instructions with a single IR op.

The implementation is pretty heavily documented to help make heads or
tails of these monster instructions.
2023-04-17 21:39:32 -04:00
Mai a33443db62 Merge pull request #2611 from Sonicadvance1/arm64_mingw
ARM64Dispatcher: Fix compiling with mingw
2023-04-16 03:30:09 -04:00
Mai 4bffdc6345 Merge pull request #2612 from Sonicadvance1/frontend_mingw
Frontend: Remove errant header
2023-04-16 03:25:03 -04:00
Mai 797737a84d Merge pull request #2609 from Sonicadvance1/mingw_threadname
Threads: Adds SetThreadName helper
2023-04-16 03:22:46 -04:00
Ryan Houdek 6b964f70e0 CPUID: Fix std::min type cast 2023-04-16 00:09:36 -07:00
Ryan Houdek fc00a31aee Frontend: Remove errant header 2023-04-15 18:37:53 -07:00
Ryan Houdek 1de84110e8 ARM64Dispatcher: Fix compiling with mingw 2023-04-15 18:37:31 -07:00
Ryan Houdek 1962f036e1 ObjectCacheService: Use ThreadName helper 2023-04-15 18:21:42 -07:00
Ryan Houdek 5c62ea21f4 Merge pull request #2598 from Sonicadvance1/stop_leaking_avx
FEXCore: Stop leaking AVX configuration state
2023-04-11 19:57:58 -07:00
Ryan Houdek 0d0b99f344 OpcodeDispatcher: Move usages of And(Not( to Andn
Fixes #2199

Very few uses actually, we were pretty good at this already.
2023-04-11 15:35:12 -07:00
Ryan Houdek 44e06185b7 FEXCore: Stop leaking AVX configuration state
The dispatcher was saving AVX state even though FEX doesn't support it
currently. This is due to it checking for the config option rather than
the HostFeatures option.

The `EnableAVX` config option is supposed to be used to inform FEXCore
if we want AVX disabled or not when the host supports the feature. In
this case it is universally enabled because we haven't encountered any
games that have issues with AVX state being saved with signals. (We know
they exist, we just don't have configurations for them).

The HostFeatures option `SupportsAVX` is the option that is supposed to
be getting used for determining if the runtime AVX feature is enabled.
This also had an issue though that this was **also** always enabled if
running on an x86 host with AVX, or an ARM host with SVE2-256bit.
It was then disabled if the config option was disabled; But, since
FEX-Emu doesn't support AVX fully yet, we need to ensure this isn't yet
enabled.

But this only solves half the problem. In order for our CI to test AVX
features before fully supporting AVX, it needs to be able to enable AVX
so that the CPU state is correctly saved.

So we need to change the default configuration option to be false, and
have CI enable it for the tests that matter before AVX is fully
implemented.
2023-04-11 15:21:32 -07:00
Ryan Houdek e98a46aa5f Review comments 2023-04-07 17:01:53 -07:00
Ryan Houdek 32d7fae373 GdbServer: Convert to_string usage 2023-04-07 17:01:52 -07:00
Ryan Houdek f5ed9c4ff3 CodeCache: Convert std::fs to FHU 2023-04-07 17:01:52 -07:00
Ryan Houdek 1306e597dd CodeSerialize: Convert unique_ptr to fextl 2023-04-07 17:01:52 -07:00
Ryan Houdek 4d70f4fc4e Remove some unused headers now. 2023-04-07 17:01:52 -07:00
Ryan Houdek 4ab822aebb IRParser: Convert to fextl 2023-04-07 17:01:52 -07:00
Ryan Houdek 7180bb1496 GdbServer: Convert fstream to fextl 2023-04-07 17:01:51 -07:00
Ryan Houdek 001a086d85 Convert remaining fmt::format to fextl 2023-04-07 17:01:51 -07:00
Ryan Houdek 257a3a54dc Context: Convert over to a unique_ptr 2023-04-07 17:01:51 -07:00
André Zwing f944709139 Dispatcher: Fixes restoring of AVX state 2023-04-05 21:15:05 +02:00
Ryan Houdek aac4e25ca4 Merge pull request #2549 from Sonicadvance1/glibc_remaining_allocations
Move FEX away from the remaining glibc allocations that we can
2023-04-01 09:46:29 -07:00
Ryan Houdek 53bbbd5a4f Review code 2023-03-30 16:28:34 -07:00
Ryan Houdek 3eae668cec X86Jit: Fix xbyak allocating through glibc 2023-03-30 16:28:34 -07:00
Ryan Houdek b2ec28503d LookupCache: Move over to fextl::pmr 2023-03-30 16:28:33 -07:00
Ryan Houdek 170c9ee9e4 LookupCache: Switch to fextl 2023-03-30 16:28:33 -07:00
Ryan Houdek 1eb36b8b31 Convert a ton of things over to fextl 2023-03-30 16:28:33 -07:00
Mai df354e37dd Merge pull request #2578 from Sonicadvance1/support_salc
OpcodeDispatcher: Implement support for 32-bit SALC instruction
2023-03-30 18:12:15 -04:00
Ryan Houdek 43e6d398b6 X86Dispatcher: Move xbyak to custom types 2023-03-30 08:49:26 -07:00
Mai 88dba60bee Merge pull request #2579 from Sonicadvance1/invalid_instruction_log
Core: Add a new log message for unsupported instruction
2023-03-29 22:52:08 -04:00
Ryan Houdek d615ae9c6a Core: Add a new log message for unsupported instruction
The previous log in the frontend is super useful when an instruction
decoding wasn't supported.
Now that most of AVX is covered, a game will crash on SIGILL (and
usually catch it) and close without any indication.

Now if the instruction is decoded but it is invalid for the
configuration, still output a message as a good indicator that the game
is using instructions that the host doesn't support.

Will let us still pick up on games crashing due to lack of SVE very
easily.
2023-03-29 14:38:16 -07:00
Ryan Houdek 7629edcf61 OpcodeDispatcher: Implement support for 32-bit SALC instruction
This is an undocumented but supported instruction. It behaves just like
an `sbb al, al` but doesn't set flags and is one byte shorter.

The end result is that al is set to 0xFF or 0 depending on if CF is set
or not.
2023-03-29 14:34:51 -07:00
Lioncache 73d250c555 ARMEmitter: Handle SVE2 integer add/subtract wide category 2023-03-29 17:02:18 -04:00
Lioncache 337f8b06a3 ARMEmitter: Convert SVE2 integer multiply long to wide helper
Unifies the emitted ops under the same underlying emitter function.
2023-03-29 16:52:37 -04:00
Lioncache 87fa545bd0 ARMEmitter: Convert SVE2 integer add/subtract long to wide helper
The generic helper will be used to implement the remaining unimplemented
category from this group
2023-03-29 16:52:34 -04:00
Ryan Houdek 7747ac8de8 Merge pull request #2576 from lioncash/mul
ARMEmitter: Handle SVE Integer Multiply-Add - Unpredicated group
2023-03-29 13:14:29 -07:00
Lioncache deb1c9e933 ARMEmitter: Handle SVE mixed sign dot product category 2023-03-29 15:43:07 -04:00
Lioncache 672a88395d ARMEmitter: Handle SVE2 saturating multiply-add high category 2023-03-29 15:38:38 -04:00
Lioncache 88524ce718 ARMEmitter: Handle SVE2 saturating multiply-add long category 2023-03-29 15:33:49 -04:00
Lioncache bb153054f9 ARMEmitter: Handle SVE2 integer multiply-add long category 2023-03-29 15:28:32 -04:00
Lioncache 22a7a49042 ARMEmitter: Handle SVE2 complex integer multiply-add 2023-03-29 15:19:09 -04:00
Lioncache 9876f3eb5c ARMEmitter: Handle SVE2 saturating multiply-add interleaved long category 2023-03-29 15:08:30 -04:00
Lioncache b9e4ce4029 ARMEmitter: Handle SVE integer dot product (unpredicated) category 2023-03-29 14:55:06 -04:00
Lioncache 0c048772e0 ARMEmitter: Handle CDOT (vectors) 2023-03-29 14:54:35 -04:00
Lioncache 830c1884d1 OpcodeDispatcher: Handle store variants of VMASKMOVPD/VMASKMOVPS
And with that, we support all of the AVX1-only instructions.

The remaining instructions for full AVX1 support is now just the SSE4.2
string instructions.
2023-03-29 14:03:23 -04:00
Lioncache 5abf9de8a5 IR: Add VStoreVectorMasked IR op
Will be used to implement the store variants of VPMASKMOV and
VMASKMOVP{D, S}
2023-03-29 14:03:20 -04:00
Lioncache 25960fe6b1 OpcodeDispatcher: Handle load variants of VMASKMOVP{D, S} 2023-03-28 10:35:23 -04:00
Lioncache eb8626c1f7 IR: Add VLoadVectorMasked IR op
Will be used to implement the load variants of VMASKMOVP{D, S} and
VPMASKMOV{D, Q}

Particularly useful, since with SVE this behavior can be collapsed into
two instructions (CMPGT followed by the relevant LD1 load instruction)
2023-03-28 01:57:25 -04:00
Lioncache ef7853ca4a ARMEmitter: Fix treating 32-bit elements as 64-bit with ld1w
These conditionals were accidentally inverted and were treating 32-bit
elements as 64-bit ones, when this is unintended.

Also add missing tests to ensure this doesn't slip through in the
future.
2023-03-28 00:55:04 -04:00