Commit Graph
1495 Commits
Author SHA1 Message Date
Scott Mansell 2cd844bbcb RAValidation: Validate Spill slots
This can prove that the ssa in the Spill slots are consistant based on
control flow.

It's one major blind spot is that it can't prove the spill slot actually
contains the correct ssa, if it has the same wrong ssa on every cfg
path.
2021-09-13 11:56:39 +12:00
Scott Mansell 55a9ee702b Register Allocator Validation
This is a validation pass that attempts to prove the output from the RA pass is valid.

The current design should be able to prove that the RA result is internally
consistent. That no-matter what control flow path you take thought the control
flow graph, the physical registers and spill slots will always contain a single
possible SSA value.

It also checks that the SSA values in the IR actually line up with the SSA value
in the physical register.
2021-09-13 11:56:29 +12:00
Scott Mansell cb57797550 PassManager: Lookup pass by name 2021-09-13 11:46:11 +12:00
Ryan Houdek 1fa3afd0c1 Merge pull request #1272 from Sonicadvance1/ensure_long
OpcodeDispatcher: Ensure some x87 templates get passed long constants
2021-09-11 18:08:29 -07:00
Ryan Houdek 2b91108255 OpcodeDispatcher: Ensure some x87 templates get passed long constants
Just to ensure these don't get truncated and intent
2021-09-11 05:41:14 -07:00
Ryan Houdek a5046e92cd Config: Check for container-manager and redirect
In the case of running inside of a container then we need to redirect
where we look for configuration.
Currently we only care about pressure vessel so we just redirect some
options to check inside of `/run/host/`

This will resolve an issue where installed thunks wouldn't be found.
2021-09-11 02:16:08 -07:00
Ryan Houdek 793b25f93b Thunks: Set default config option to our install location
These don't really need to be changed unless doing development
2021-09-11 02:16:08 -07:00
CallumDev dec512187e JIT: Remove nops in ARMv8.0 CASPair 2021-09-05 17:49:57 +09:30
CallumDev 5f7532c569 Interpreter: Lower 4 byte CASPair to inline assembly 2021-09-05 17:30:18 +09:30
CallumDev 8654d19f02 JIT: Fix unaligned CASPair on ARMv8.0 2021-09-05 16:54:53 +09:30
Ryan Houdek 4f93259332 Linux: Setup signal mask correctly to block signal-in-signal situations
Due to how we emulate the guest signal handlers, we do the state setup
in the real host signal handler, then we jump out after state setup.
This was causing a situation where we were setting up the guest signal
handler state with the correct sa_mask.
Then after setting up the guest state we would leave the FEX signal
handler, restoring the signal mask to our original mask.

Instead now as we are setting up the guest state, we save our host
signal mask. Then on signal handler return we modify our host signal
mask to match what the guest wants.

Once we hit our sigreturn emulation we then restore the original signal
mask.

This looks to improve some stability problems regarding how wine uses
signals but it still doesn't fix the gvisor test sadly.
2021-09-02 20:21:10 -07:00
Ryan Houdek 0468bb4496 Linux: Handle fpstate in the signal delegator correctly
We were using the glibc context structure layout which doesn't match
what the kernel is doing.

Switches over to allocating fpstate independentally of the ucontext_t,
then pointing to it from uc_mcontext how we're supposed to.

glibc uses the __fpregs_mem region for other purposes.

This also fixes xmm state being stored on the 32-bit side, and also
fixes SIGALRM and SIGVTALRM siginfo overwriting structure data.
On 32-bit we can't just memcpy the siginfo_t over because the sizes
don't match. Throw a message instead.
2021-09-02 03:29:24 -07:00
CallumDev 9ab294b2f8 Interpreter: Templated AtomicCompareAndSwap 2021-09-01 21:02:07 +09:30
CallumDev d7f4fe7564 Interpreter: Fix x86 build 2021-09-01 19:24:58 +09:30
CallumDev e09219e5e5 Properly implement single CAS on ARMv8.0 2021-09-01 18:13:18 +09:30
Scott Mansell eb9d3b11f2 RA: Add max NoteCount assert
The chance of hitting this is near zero, but still safer to have
an assert.
2021-09-01 01:32:41 +12:00
Ryan Houdek 4f66d3e9dc Merge pull request #1240 from phire/extract_bucketlist
Move BucketList into it's own file
2021-08-30 19:21:12 -07:00
Scott Mansell bd7822bbe9 Move BucketList into it's own file 2021-08-31 14:06:07 +12:00
Ryan Houdek bb3bd3faa1 Linux: Register guest signal delegators for all signals including SIGRT32
Had accidentally missed the last one.
2021-08-30 02:21:41 -07:00
Ryan Houdek 4b6b7495df Signals: Fix incorrect SIGINFO check
Initially this was a small hack to work around sigqueueinfo sending over
siginfo_t. Now this is unnecessary and would crash if an application
used sigqueueinfo to a signal without the SIGINFO flag.
2021-08-30 02:06:55 -07:00
Ryan Houdek 29e30773ee Signals: On jumping to signal frame FPU state is reset
All registers are set to zero and setup to be able to do float
operations.
2021-08-30 02:05:56 -07:00
Ryan Houdek f161e3bfb0 Massive amount of IWYU cleanup
This isn't quite a 100% clean sweep of IWYU.
There are some false positives where clang fails.
Additionally there are still a few missed in the frontend side of things
that I didn't get to
2021-08-28 00:32:15 -07:00
Ryan Houdek 38ce5876f8 Arm64Emitter: Resolves some IWYU warnings
Should help some build errors
2021-08-27 17:08:29 -07:00
Ryan Houdek c25ae9b2c3 Dispatcher: Changes SRA assert in to an error message instead
In some instances this is safe but we can't currently distinguish safe
or not.
2021-08-27 12:58:40 -07:00
Ryan Houdek b625437071 SignalDelegator: More splitting and cleanup
This is working towards getting the stack frame for guest signals being
pushed over to the Frontend.
Still some more work to do but this is the first step that can be split
up.
2021-08-27 12:46:41 -07:00
Ryan Houdek dfce1dc476 SignalDispatcher: Minor fix for SRA
In the case of SRA plus a signal not using siginfo then we were not
spilling SRA registers.
In this case we would then shift the signal frame and fill the guest
context with garbage register data.
This would potentially cause some issues but haven't noticed anything
outside outside of my test applications.
2021-08-27 12:38:19 -07:00
Ryan Houdek 77db25fc24 Merge pull request #1227 from Sonicadvance1/initial_hangover
Hangover: Initial support for the syscall handling.
2021-08-26 01:49:59 -07:00
Ryan Houdek a3490aad5b Hangover: Initial support for the syscall handling.
Hangover currently abuses the syscall op for thunking purposes.
Very likely this will be changed in the future but for now make sure to
support that use case.
2021-08-26 01:34:13 -07:00
Ryan Houdek 304db72d6b Fixes Callback interface to take a thread argument
This was using the implicit thread TLS object. All users of this
have access to the thread object directly.

Use that instead. Fixes a subtle bug were the frontend could be trying
to do a callback and TLS sections weren't correctly set.
2021-08-26 01:23:17 -07:00
Ryan Houdek 97f413cfec Merge pull request #1224 from Sonicadvance1/expose_parent_thread
FEXCore: Return the ParentThread with InitCore
2021-08-25 22:47:37 -07:00
Ryan Houdek 6483740553 FEXCore: Return the ParentThread with InitCore
This always returns success and for easier state management, just return
our parent thread.

Frontend needs full visibility of this state anyway for thread
management.
2021-08-24 23:20:44 -07:00
Ryan Houdek f131f07612 Config: Moves non-OS specific configuration loading to FEXCore
Puts the visibility of the main layer, application layers, and
environment in to FEXCore instead of FEX.
These layers aren't specific to FEX/FEXLoader and should live in
FEXCore.

Only the EmptyMapper remains in FEX, which should eventually move over
to FEXConfig since that is the only user.
2021-08-24 23:17:32 -07:00
Ryan Houdek 35c664295d Merge pull request #1215 from Sonicadvance1/fix_arm64_signal_handling
Arm64: Fixes SRA spilling on signal
2021-08-23 00:47:10 -07:00
Ryan Houdek 6b87839437 Merge pull request #1216 from Sonicadvance1/fix_32bit_sigsegv
x86: Fixes siginfo_t si_addr for SIGBUS/SIGSEGV
2021-08-22 22:26:27 -07:00
Ryan Houdek 8099dfc830 Merge pull request #1210 from Sonicadvance1/proton_6.3_fixes
Proton 6.3 32-bit fixes
2021-08-22 21:32:26 -07:00
Ryan Houdek af3af9d048 x86: Fixes siginfo_t si_addr for SIGBUS/SIGSEGV
si_addr is set to the address that is trying to be accessed, not the RIP
that is trying to access it.
We just need to copy our host value over for this.
SIGFPE and SIGILL we still don't have a good answer for.
2021-08-22 21:10:51 -07:00
Ryan Houdek 3b8f24d74f Arm64: Fixes SRA spilling on signal
We were checking the PC after we set the new location in the data
structure.
Didn't matter for x86-64 since it doesn't use SRA but it does matter for
ARM.

Now on signal while in JIT code it will spill correctly
2021-08-22 19:14:04 -07:00
Ryan Houdek dd8225be8a OpcodeDispatcher: Implements undocumented repne on string ops
MOVS, LODS, and STOS ops are only documented to support the REP prefix.
These instructions actually repeat correctly with the REPNE prefix as
well.
Behaviour is the same.

Fixes POD Gold
2021-08-21 20:16:25 -07:00
Ryan Houdek 4d7455989c OpcodeDispatcher: Ensure FXSave/FXRStor doesn't store too many XMM registers in 32-bit
32-bit doesn't store XMM registers 8-15 since they don't exist there.
This technically falls under the "reserved" slot so applications can't
rely on them to not be written.
Saves us a bit of CPU overhead at the very least
2021-08-21 17:44:06 -07:00
Ryan Houdek 6e5fc5cdde Fixes segment register storing to memory
These were storing to memory as 32-bits but when storing to memory these
are only ever stored as 16-bit
2021-08-21 17:41:57 -07:00
Ryan Houdek 84f42f6155 Dispatcher: Fixes alt stack check and redzone offset
There are two checks to the alt stack that the signal handler needs to
check.
First it needs to check if the signal handler was registered with teh
flag SA_ONSTACK.

Then it needs to check if the alt stack is actually enabled by not
having flag SS_DISABLE.

Additionally, 32-bit x86 doesn't have a redzone so stop offsetting by
128
2021-08-20 23:54:09 -07:00
Ryan Houdek e4a230c3ec OpcodeDispatcher: Fixes FTW saving/storing in FXSave/FXRStor
Missed this when implementing FTW
2021-08-20 23:53:13 -07:00
Ryan Houdek d2130e1df3 OpcodeDispatcher: Fixes 32-bit IRET
We were failing to store the updated ESP on 32-bit.
On 64-bit or CPL change (which we don't support) the stack pointer is
pulled from the frame.

This resolves an issue in wine's 32-bit loader where it was getting zero
for one of the context pointers since the stack pointer wasn't adjusted
2021-08-20 23:50:04 -07:00
Ryan Houdek 740270c05f Linux: Implements support for clone with namespaces
This is very tricky to handle and it has a bunch of rough edges.
One of the major problems that we can't workaround is that if we receive a
clone flag that pthreads can't support with THREAD, then we are required to fall down
the pthreads code path.
This is because threads going down the clone path will break TLS and we don't have
a way to work around it currently.

So this adds a clone path, a clone3 path, and keeps the legacy path as well.
Which makes this fairly convoluted but it gets pressure-vessel working on x86-64 host.
It's a bit tricky to setup but it does work.

Still some work necessary to get pressure-vessel working on AArch64 host, but I'm working on that.
2021-08-10 18:31:04 -07:00
Ryan Houdek e388729403 Config: Changes string config default values to be string_view
These were causing static initializer construction all over the codebase.
Scope of these variables has also been changed over to the module instead of the header as well
2021-08-10 18:20:15 -07:00
Ryan Houdek f5940df822 RAPass: Removes static initialization of INVALID_REGCLASS
We were just using this as a reference and it was causing a static initializer
2021-08-10 18:18:07 -07:00
Ryan Houdek e6c4f9aad1 IRParser: Removes static initialization of map
This didn't need to be global
2021-08-10 18:16:49 -07:00
Merry 55d981fcb0 FEXCore: Use GetCursorAddress when able 2021-08-08 21:06:06 +01:00
Ryan Houdek b120a8ea84 Merge pull request #1196 from Sonicadvance1/offline_telemetry
Implements support for offline *only* telemetry
2021-08-06 23:23:38 -07:00
Ryan Houdek 83cdf0f377 Fix no-sra crash 2021-08-06 22:57:33 -07:00