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Code Issues Packages Projects Releases 67 Wiki Activity
1,248 Commits 11 Branches 71 Tags
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Commit Graph
626 Commits
Author SHA1 Message Date
Stefanos Kornilios Mitsis Poiitidis 2cb8db0abb Merge pull request #394 from Sonicadvance1/fix_addr_size_override 
Fixes address size override prefix
 2020-09-17 10:00:36 +03:00
Ryan Houdek e194aa28e4 Removes a couple of unnecessary variables to improve reentrancy chances 
We still aren't 100% reentrant safe in the case that the cores are
interrupted while running, but this is a step in the right direction
 2020-09-16 22:34:21 -07:00
Ryan Houdek 00f0047cff Merge pull request #391 from phire/Remove_BFE 
Remove unneeded BFEs around flag generation code.
 2020-09-16 22:27:59 -07:00
Scott Mansell 5048753e37 Undo limitation of ASHR to 32/64bit 
This should really be done later in a sperate PR.

 1. We don't have proper unit test coverage
 2. I still didn't get this right at time of removal
 3. I haven't done the jit changes to go along with this.
 2020-09-17 16:26:41 +12:00
Scott Mansell 7db3063a04 Fix broken flags on INC/DEC 2020-09-17 16:09:55 +12:00
Scott Mansell 4f666a2cbd OpcodeDispacher: Remove useless case statement 
Looks like a copy/paste error
 2020-09-17 14:59:51 +12:00
Scott Mansell 168148220c OpcodeDispatcher: Remove BFEs from flag-gen code 2020-09-17 14:59:50 +12:00
Scott Mansell 96603495ec OpcodeDispatcher: Remove BFEs from flag-gen calls 2020-09-17 14:59:50 +12:00
Ryan Houdek 806753fa43 Fixes address size override prefix 
We were handling this in a completely broken fashion and it only broke
more with the previous zexting changes.

This fixes the EXPLICIT address size override usage.
There are still a few instructions that rely on implicit address size
override support that this doesn't handle
 2020-09-16 19:16:08 -07:00
Scott Mansell d4844703d9 ReplaceAllUses: Early exit optimization 2020-09-17 11:29:57 +12:00
Scott Mansell b0cfc19267 Fast replacement path for constants 2020-09-17 11:29:57 +12:00
Ryan Houdek 40a40b8636 Merge pull request #385 from FEX-Emu/skmp/fix-rol-ror-flags 
x86disp: Fix ROL/ROR CF and OF calculation
 2020-09-16 12:47:09 -07:00
Stefanos Kornilios Mitsis Poiitidis 38be0f05a3 ROL/ROR: Fix flag calculations 2020-09-16 22:43:05 +03:00
Ryan Houdek bfde44a288 Merge pull request #386 from FEX-Emu/skmp/fix-shld-shrd 
x86disp: Fix shld/shrd flags
 2020-09-16 12:36:51 -07:00
Stefanos Kornilios Mitsis Poiitidis 79fa103a04 SH*D: Fix shifts by zero, OF calculation 2020-09-16 22:23:53 +03:00
Ryan Houdek d0de92f97a Removes error and die in multithreaded forks 
This can result in some terrible behaviour if something doesn't
immediately execve once it forks. Allow it instead of crashing out
though.
 2020-09-16 11:29:57 -07:00
Ryan Houdek d424cf0eee Merge pull request #365 from phire/IR_iterators 
Refactor the IR Interface to prevent "foot-shooting"
 2020-09-16 11:24:44 -07:00
Ryan Houdek ddecec12ec Spam out a wackload more syscalls 
Almost all of these end up being simple passthrough.
This covers most syscalls, the remaining ones are signal related, exec
related, or rseq required.

All of these syscalls exist prior to Linux 5.0. We are using these with
the expectation still that the host Linux implementation is 5.0 or
higher.
Once we implement newer syscalls we will need to start checking for host
Linux version. We don't really have a care about devices shipping older
4.x kernels atm.
 2020-09-16 10:48:56 -07:00
Ryan Houdek addcb824e2 Merge pull request #390 from FEX-Emu/skmp/add-pendatic-smc 
SMC: Add --smc-full-checks, implement frontend, irint, irjit, unit test
 2020-09-16 09:26:35 -07:00
Stefanos Kornilios Mitsis Poiitidis df3bdf361f SMC: Add --smc-full-checks, implement frontend, irint, irjit, unit test 2020-09-16 01:15:21 +03:00
Ryan Houdek 703c6833fc Merge pull request #389 from FEX-Emu/skmp/asr32-should-zext 
OP_ASR: Fix zext semantics
 2020-09-15 10:12:18 -07:00
Ryan Houdek aa3b42da10 Merge pull request #388 from FEX-Emu/skmp/fix-cmpxchg8b-zext 
x86disp: cmpxchg8b should only zext on register write
 2020-09-15 10:08:06 -07:00
Ryan Houdek 605a774bc4 Merge pull request #387 from FEX-Emu/skmp/fix-dividiv-zext 
x86disp: Fix div32/idiv32 zext behavior
 2020-09-15 10:07:31 -07:00
Ryan Houdek 4e2c4f71f9 Merge pull request #384 from FEX-Emu/skmp/fix-shrasr-cf 
x86disp: Fix LSR/ASR CF calculation
 2020-09-15 10:06:38 -07:00
Ryan Houdek ded48258d6 Merge pull request #378 from FEX-Emu/skmp/fix-BT-offsets 
x86disp: BT/BTR/BTS/BTC make bit index signed
 2020-09-15 10:05:47 -07:00
Ryan Houdek 5a31cc9aa1 Merge pull request #383 from FEX-Emu/skmp/fix-fld-sti 
x86disp: Fix FLD st(i)
 2020-09-15 10:04:40 -07:00
Ryan Houdek b5e354d341 Merge pull request #380 from FEX-Emu/skmp/fix-movhlps 
x86disp: Add movhlps special case
 2020-09-15 10:04:17 -07:00
Ryan Houdek e11d3ed83a Merge pull request #382 from FEX-Emu/skmp/fix-xadd-regreg 
x86disp: fix xadd reg,reg
 2020-09-15 10:02:04 -07:00
Ryan Houdek 29cb5d1821 Merge pull request #381 from FEX-Emu/skmp/fix-8bit-idiv 
x86disp: Fix 8 bit IDIV
 2020-09-15 10:01:29 -07:00
Ryan Houdek c6f69e158c Merge pull request #379 from FEX-Emu/skmp/fix-inc-dec 
x86disp: Fix locked INC/DEC flags
 2020-09-15 10:00:53 -07:00
Ryan Houdek a6addcee5e Merge pull request #377 from FEX-Emu/skmp/fix-movd 
x86tables: fix mmx movd src/dst sizes for gprs
 2020-09-15 10:00:14 -07:00
Ryan Houdek d8eeccc931 Merge pull request #376 from FEX-Emu/skmp/fix-test-simm32 
x86tables: Fix test simm32 extension
 2020-09-15 09:58:17 -07:00
Stefanos Kornilios Mitsis Poiitidis 8bdcb762f7 x86disp: Fix movhlps to write all 128 bits to context 2020-09-15 18:16:33 +03:00
Stefanos Kornilios Mitsis Poiitidis b512a98c7b OP_VEXTRACTELEMENT: Fix irint size calculation 2020-09-15 18:15:56 +03:00
Stefanos Kornilios Mitsis Poiitidis c875beb74b OP_ASHR: Fix zext semantics after sext 2020-09-15 17:02:09 +03:00
Stefanos Kornilios Mitsis Poiitidis 92ad556534 cmpxchg8b: Only set registers if compare failed 2020-09-15 13:46:52 +03:00
Stefanos Kornilios Mitsis Poiitidis c99cc9c6d3 DIV/IDIV: Fix Zext for 32 bit divides 2020-09-15 13:44:49 +03:00
Stefanos Kornilios Mitsis Poiitidis d441ebe489 SHLD/SHRD: Less broken flags, correct zero shifts 2020-09-15 13:42:43 +03:00
Stefanos Kornilios Mitsis Poiitidis dd7f3ddef3 SHR/ASR,imm: Fix CF calculation 2020-09-15 13:36:37 +03:00
Stefanos Kornilios Mitsis Poiitidis 0cc9ecfab4 OpDispatcher: FLD ST(i) should read before stack push 2020-09-15 13:34:07 +03:00
Stefanos Kornilios Mitsis Poiitidis af99407228 xadd: fix xaddb reg,reg & xadd reg,same reg 
Found via qemu's test-x86_64
 2020-09-15 13:32:04 +03:00
Stefanos Kornilios Mitsis Poiitidis 611499d0ee IDIV: Fix 16 by 8 divide 2020-09-15 13:28:57 +03:00
Stefanos Kornilios Mitsis Poiitidis 4ea5457734 movhps: reg,reg should be movhlps special case 2020-09-15 13:26:17 +03:00
Stefanos Kornilios Mitsis Poiitidis 5704ce4db9 INC/DEC: Fix atomicity and flags for locked variants 2020-09-15 13:23:30 +03:00
Stefanos Kornilios Mitsis Poiitidis 75b70b8e13 BT/BTC/BTR/BTS: Should use signed offset for bit index 2020-09-15 13:19:01 +03:00
Stefanos Kornilios Mitsis Poiitidis bec3cfff14 X86Tables: Fix MOVD SRC/DST size 2020-09-15 12:58:50 +03:00
Stefanos Kornilios Mitsis Poiitidis 140c704f8a X86Tables: Fix testq imm to sext 2020-09-15 12:41:14 +03:00
Ryan Houdek 80a77b39be Implements RCR and RCL x86 ops 
These are interesting rotate instructions that treats CF as an
additional rotation bit for the source.

So you end up with a 9bit, 17bit, 33bit, or 65bit rotate.
The rotate value is still masked by 0x1F or 0x3F depending on
instruction size.

This ends up with the quirk that this instruction doesn't directly map
to AArch64 rotations  for the smaller register sizes;
So we have to do some manual mirroring in a larger register to pull the
correct view out of the op
 2020-09-13 17:29:51 -07:00
Ryan Houdek 8878278402 Implements new EXTR IR op 
This maps directly to AArch64's EXTR op.
Maps closely to x86's SHRD instruction
 2020-09-13 17:28:09 -07:00
Ryan Houdek a324f4c222 Implements missing BFI in JITs 
We had the IR op but it wasn't implemented for the JITs
 2020-09-13 17:26:26 -07:00