Commit Graph
687 Commits
Author SHA1 Message Date
Ryan Houdek 743df8dfae Merge pull request #3327 from Sonicadvance1/remove_syscall_indirection
Arm64: Removes a vtable indirection in syscalls
2024-01-04 18:19:40 -08:00
Ryan Houdek 4b3792196f Merge pull request #3303 from Sonicadvance1/initial_runtime_longmode_switch
OpcodeDispatcher: Initial support for runtime long-mode switch
2024-01-04 18:17:54 -08:00
Ryan Houdek db7d7a6bd7 Merge pull request #3349 from Sonicadvance1/revert_frontend_ownership
Revert "FEXLoader: Moves thread management to the frontend"
2024-01-03 14:25:04 -08:00
Alyssa Rosenzweig 04a88ed3ab Merge pull request #3353 from Sonicadvance1/public_interface_cleaning
FEXCore interface cleaning
2024-01-03 15:14:54 -04:00
Alyssa Rosenzweig 9da08b40bd Merge pull request #3344 from Sonicadvance1/xbyak_upstream
Externals: Update xbyak to v7.02 and switch away from fork
2024-01-03 15:13:58 -04:00
Alyssa Rosenzweig 5467c3e478 Merge pull request #3357 from Sonicadvance1/remove_non_sra
FEXCore: Removes SRA option, it's now permanently enabled
2024-01-03 15:10:04 -04:00
wannacu 4e7bab849c JIT: Fixes broken register in VTBX1
If the Dst register is allocated as VectorIndices or VectorTable,
using Dst as an operand to perform the tbx operation will result in an error.
For example:
%131(FPR0) i128 = LoadNamedVectorIndexedConstant u8:Tmp:RegisterSize, #0x6, #0xaa0
%132(FPR0) i128 = VTBX1 u8:Tmp:RegisterSize, %129(FPRFixed6) i32v4, %126(FPRFixed10) i16v8, %131(FPR0) i128
Since the tbx instruction's destination register is also the original operand,
this is consistent with the semantics of VTBX1. Therefore,
directly using VectorSrcDst as the destination operand for the tbx instruction is safe.
2023-12-29 16:18:40 +08:00
Ryan Houdek d098545c20 FEXCore: Removes SRA option, it's now permanently enabled 2023-12-28 18:28:02 -08:00
Ryan Houdek 5358af7794 Revert "FEXLoader: Moves thread management to the frontend"
This reverts commit 58f2693954.
2023-12-27 04:33:50 -08:00
Ryan Houdek 25bcddf3a5 FEXCore: Removes context wide and map lookup
While locking a shared_lock and doing an empty table lookup is fairly
fast, just remove them from the hot path entirely if no custom IR
handlers are installed.

This is only used for our IRLoader, which is losing its importance
significantly and should probably be removed anyway.
2023-12-26 11:11:44 -08:00
Ryan Houdek f785b38e4d Merge pull request #3352 from Sonicadvance1/remove_irloader
Removes IRLoader, unittests, and public interface
2023-12-26 11:08:26 -08:00
Ryan Houdek d8f20751fe FEXCore: Moves IREmitter from the public API to backend
No functional change
2023-12-25 07:00:29 -08:00
Ryan Houdek 1977747fc2 Removes IRLoader, unittests, and public interface
This unit test hasn't really served any purpose for a while now and
mostly just causes pain when reworking things in the IR.

Just remove the IRLoader, its unit tests, the github action steps and
the public FEXCore interface to it. Since it isn't used by anything
other than Thunks.

Also moves some IR definitions from the public API to the backend.
2023-12-25 07:00:29 -08:00
Ryan Houdek bce694ebb5 FEXCore: Moves BitUtils to FHU
No functional change
2023-12-25 06:38:51 -08:00
Ryan Houdek 5d37d5db1a FEXCore: Optimize HostFeatures and CPUID feature calculation
Need #3348 merged first.

As I was casually thinking, this code made me realize that it was quite
branch heavy and could likely be optimized to logic.

The previous code generated some fairly nasty branch heavy code. This
can be optimized to be branchless and take roughly five instructions
per flag. Using a bitfield for each feature would turn each calculation
in to 3-4 instructions but that seems overkill.

Very minor thing.
2023-12-25 04:58:15 -08:00
Ryan Houdek db9b326534 FEXCore: Support disabling CPUID features based on config
Need to be able to disable sha by config.
2023-12-23 22:32:29 -08:00
Ryan Houdek 266f7feecb Arm64: Removes a vtable indirection in syscalls
We can safely call virtual functions through the JIT with a little bit
of work.

FEX's JIT has quite a few steps before it gets to a syscall handler.

Before this commit:
JIT->static HandleSyscall->SyscallHandler::HandleSyscall->SyscallHandler

After this commit:
JIT->SyscallHandler::HandleSyscall->SyscallHandler

A bit hard to notice this when this interface can spin at 67-million
calls per second though.
2023-12-21 01:55:02 -08:00
Ryan Houdek 9e5d7aa5fe OpcodeDispatcher: Initial support for runtime long-mode switch
This has the Frontend and OpcodeDispatcher select their operating mode
depending on the incoming code segment long-mode flag.

Adds some asserts since currently it is unexpected if the configuration
changes at runtime.

This is fairly straightforward for an initial setup but isn't fully
fleshed out.

Right now FEX's x86 tables aren't setup in a way to support choosing a
different instruction decoding depending on runtime operating mode
change, so that would break in interesting ways.

Primarily this just gets FEX setup to start piping the operating mode
through from the frontend to the backend. This is a long term task, so
it is going to take a long time to iron out all the issues.
2023-12-21 01:54:19 -08:00
Ryan Houdek 8648fb1485 FEXCore: Accurately store segment descriptors
Previously we were only storing the 32-bit base address which isn't
actually how segment descriptors work.

In reality segment descriptors are 64-bit descriptors that are laid out
in a particular layout depending on the 4-bit type value. In reality we
only care about code and data segment layouts since the rest are
bonkers.

Describe these descriptors correctly and setup a default code descriptor
for the operating mode that FEX is starting in.
2023-12-21 01:54:18 -08:00
Ryan Houdek 8b24f7fc26 Externals: Update xbyak to v7.02 and switch away from fork
The last few patches we need have been upstreamed so we shouldn't need
our downstream fork anymore.
2023-12-21 01:52:05 -08:00
Ryan Houdek 00669a1c89 Merge pull request #3336 from Sonicadvance1/warn_on_mdwe
FEXCore: Warn if MDWE is set
2023-12-20 13:27:43 -08:00
Ryan Houdek 1cedc3d85a FEXCore: Warn if MDWE is set
This will result in FEX not being able to allocate executable memory.
We can use shared memory in the future to work around this but for now
we don't support that as a fix.
2023-12-20 13:19:28 -08:00
Ryan Houdek 58f2693954 FEXLoader: Moves thread management to the frontend
Lots going on here.

This moves OS thread object lifetime management and internal thread
state lifetime management to the frontend. This causes a bunch of thread
handling to move from the FEXCore Context to the frontend.

Looking at `FEXCore/include/FEXCore/Core/Context.h` really shows how
much of the API has moved to the frontend that FEXCore no longer needs
to manage. Primarily this makes FEXCore itself no longer need to care
about most of the management of the emulation state.

A large amount of the behaviour moved wholesale from Core.cpp to
LinuxEmulation's ThreadManager.cpp. Which this manages the lifetimes of
both the OS threads and the FEXCore thread state objects.

One feature lost was the instruction capability, but this was already
buggy and is going to be rewritten/fixed when gdbserver work continues.

Now that all of this management is moved to the frontend, the gdbserver
can start improving since it can start managing all thread state
directly.
2023-12-19 17:43:04 -08:00
Mai b4b8e81f24 Merge pull request #3321 from Sonicadvance1/thread_frontend_ownership_take2
FEXCore: Changes ParentThread ownership from the CTX to the frontend, take 2
2023-12-19 20:37:59 -05:00
Ryan Houdek a8f797d36b Dispatcher: Convert GetCompileBlockPtr to using PMF helper
This was older code that was written before the PMF helper was
available.
Switch it over.
2023-12-19 17:20:37 -08:00
Ryan Houdek 93ec676ce8 Merge pull request #3340 from Sonicadvance1/exitfunctionlink_data
FEXCore: Describe exit function linking object with a structure
2023-12-19 16:17:21 -08:00
Mai 3d2cbc5d08 Merge pull request #3317 from Sonicadvance1/fix_imul_flags2
OpcodeDispatcher: Fixes flags generation in imul
2023-12-19 11:43:21 -05:00
Mai 81c85d73b2 Merge pull request #3330 from Sonicadvance1/optimize_sib_addr_calc
OpcodeDispatcher: Optimize SIB addr calculation
2023-12-19 11:41:42 -05:00
Mai 5b4e9c6907 Merge pull request #3323 from Sonicadvance1/remove_unused_check
Dispatcher: Removes unused asserting CompileBlock function
2023-12-19 11:38:57 -05:00
Ryan Houdek aa2e8704bc FEXCore: Changes ParentThread ownership from the CTX to the frontend, take 2
Similar to #3284 but works around some of the bugs that one introduced.

This is the minimal amount of changes to move the ownership from FEXCore
to the frontend. Since the frontends don't yet have a full thread state
tracking, there is an opaque pointer that needs to be managed.

In the followup commits this will be changed to have the syscall handler
to be the thread object manager.
2023-12-18 14:54:07 -08:00
Ryan Houdek cf86ae6b65 FEXCore: Describe exit function linking object with a structure
Instead of just poking raw uint64_t data values, describe it with a
struct.

This will be a read-only in the future.
2023-12-18 13:31:53 -08:00
Ryan Houdek 86654907bf Merge pull request #3334 from Sonicadvance1/remove_old_x86jit_references
FEXCore: Removes stale references to x86 JIT
2023-12-18 04:15:29 -08:00
Ryan Houdek 12b72f908b Merge pull request #3335 from Sonicadvance1/remove_internalthreadstate_header
FEXCore: Removes old InternalThreadState header
2023-12-18 04:14:57 -08:00
Ryan Houdek 6c8a54ff84 FEXCore: Removes old InternalThreadState header
This was a temporary header to help with when this header was migrated
to our public API headers.

It's temporary nature is no longer necessary, just get rid of it.
2023-12-15 18:51:25 -08:00
Ryan Houdek bcc2901d7f FEXCore: Removes stale references to x86 JIT
It doesn't exist anymore.
2023-12-15 18:46:57 -08:00
Ryan Houdek 358bbb51ff CPUID: Removes Init and just uses constructor
No need to wait for initialization on for this anymore.
Ever since Init was refactored to do basically no work, this hasn't been
necessary.

CPUID does need to still be initialized after HostFeatures though, so
need to ensure correct member ordering there.
2023-12-15 18:43:23 -08:00
Ryan Houdek 1a2f41922c OpcodeDispatcher: Optimize SIB addr calculation
When the address calculation for SIB has both index and base then we can
optimize this to an add with a shifted register. This will convert a
three instruction sequence in to one instruction in most cases.
2023-12-15 13:08:46 -08:00
Ryan Houdek 0ede707e0b IR: Adds support for AddShift IR op
This matches x86 SIB's operation of `scale * index + base`
2023-12-15 13:08:06 -08:00
Ryan Houdek 12923ba1b7 Merge pull request #3322 from Sonicadvance1/remove_unused_exithandler
PassManager: Removes unused exit handler
2023-12-14 01:55:06 -08:00
Ryan Houdek e657a27607 Dispatcher: Removes unused asserting CompileBlock function
While we were calling this function, its asserting nature hasn't been
used for a long time.

This used to trigger more frequently when CompileBlock would fail to
compile code, either due to not being able to decode an instruction or
hitting an instruction that FEX doesn't understand.

When these cases are hit today we still generate code blocks which
generate SIGILL. This means that this code was actually never hit.

Completely remove this function and have the JIT's dispatcher call the
CompileBlock function directly. Signature is slightly different since we
need to set x3 to be 0.
2023-12-11 17:20:51 -08:00
Ryan Houdek 8bb5462554 PassManager: Removes unused exit handler
git blame shows that 718b3e6b4c added this
handler.

It doesn't explain why this was desired but it was never wired up to
anything. Just remove it.
2023-12-11 17:14:41 -08:00
Ryan Houdek 98f21a2a28 X86Tables: Converts tables to be mostly consteval
Reduces the ELF's VM size from 9.8MB down to 9.37MB and should reduce
initialization time a smidge.

Slammed this out while waiting for other PRs to get reviewed.
2023-12-11 10:03:52 -08:00
Ryan Houdek 5660065eea FEXCore: Moves OS thread creation to the frontend
Fairly lightweight since it is almost 1:1 transplanting the code from
FEXCore in to the SyscallHandler's thread creation code.

Minor changes:
- ExecutionThreadHandler gets freed before executing the thread
   - Saves 16-bytes of memory per thread
- Start all threads paused by default
   - Since I moved the code to the frontend, I noticed we needed to do
     some post thread-creation setup.
   - Without the pause we were racing code execution with TLS setup and
     a few other things.
2023-12-11 06:22:50 -08:00
Ryan Houdek 7524029a06 Merge pull request #3294 from Sonicadvance1/mov_xid_check
FEXCore: Moves XID check to the frontend
2023-12-07 01:17:45 -08:00
Ryan Houdek 5c6f229e76 OpcodeDispatcher: Fixes flags generation imul
On overflow with 32-bit we weren't setting the flags correctly.
2023-12-07 01:08:02 -08:00
Ryan Houdek acdb4c7061 IR: Adds support for {S,U}Mull
Lets us do a 32-bit multiply returning a 64-bit result, signed and
unsigned.
2023-12-07 01:06:58 -08:00
Alyssa Rosenzweig 0fe5e3d1e7 Merge pull request #3313 from alyssarosenzweig/opt/andn-mask
rm andn masking
2023-12-06 12:21:24 -04:00
Alyssa Rosenzweig 2a2c389be6 OpcodeDispatcher: rm masking in 32-bit andn
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2023-12-05 09:04:32 -04:00
Tony Wasserka 3729b02255 Arm64/BranchOps: Fix unused-variable warning 2023-12-04 11:32:09 +01:00
Ryan Houdek 3b0aff5fb9 IR: Moves remaining NZCV operations to use DestSize
Just like in #3305 but wasn't causing any known issues
2023-12-02 15:40:51 -08:00