Commit Graph
713 Commits
Author SHA1 Message Date
duck ade89bba6a XXX -> TODO 2021-01-12 15:19:45 -05:00
duck 059594cbd3 Add a quick comment for potential optimization 2021-01-12 15:15:41 -05:00
duck 501bccdd80 Faster PMOVMSKB, part 2 2021-01-12 14:06:52 -05:00
duck 49afb6bceb Faster PMOVMSKB instruction. 2021-01-12 14:06:51 -05:00
duck 464eb13b93 One-byte horizontal add support on x86-64. 2021-01-12 11:10:16 -05:00
Stefanos Kornilios Mitsis Poiitidis 552895b896 Merge pull request #626 from Sonicadvance1/fix_16bit_addressing
Fixes 16bit ModRM rm decoding
2021-01-11 16:19:56 +02:00
duck a63339c50d Fix JCC negative offsets as well 2021-01-11 03:34:52 -05:00
duck e610b12c97 Fix negative offset jumps on x86-32 by using 32-bit RIP 2021-01-11 03:20:25 -05:00
duck 4c295e6dfc Fix compilation issues, re-rename due to pre-existing variable 2021-01-10 17:54:29 -05:00
duck 3c86a55bea Size -> GPRSize for a bit more clarity 2021-01-10 17:50:22 -05:00
duck 9290e19fc5 Fix JCXZ on X86 2021-01-10 17:46:03 -05:00
Ryan Houdek 7ee6b68d03 Fixes 16bit ModRM rm decoding
When we are running in 32bit mode then it is possible to have an
instruction's modrm working as 16bit mode.
All one needs to do is prefix the instruction with an address size
override
2021-01-10 02:18:30 -08:00
Stefanos Kornilios Mitsis Poiitidis 1dd307f34b JIT/x64: Implement distributed dispatch, jumps instead of call/ret 2021-01-10 03:23:40 +02:00
Stefanos Kornilios Mitsis Poiitidis a76baf9a7f JIT: Fix interpreter fallback path 2021-01-09 05:55:30 +02:00
Stefanos Kornilios Mitsis Poiitidis f3d5635182 IR: Make ExitFunction take NewRip as an argument, instead of implicit ctx store 2021-01-08 18:41:33 +02:00
Stefanos Kornilios Mitsis Poiitidis 3729a33665 jit: Basic distributed dipatch for arm64 2021-01-08 17:43:18 +02:00
Ryan Houdek ee8dfb8fc5 Merge pull request #606 from duck-37/sigsegv-fail-tests
Have tests that throw a non-HLT SIGSEGV fail
2021-01-06 15:28:38 -08:00
Stefanos Kornilios Mitsis Poiitidis dd71a45175 Merge branch 'main' into skmp/static-ra 2021-01-07 01:04:16 +02:00
Stefanos Kornilios Mitsis Poiitidis 5600ffbb4b L1C: Use constant for masking 2021-01-07 00:27:08 +02:00
Stefanos Kornilios Mitsis Poiitidis aaa80d0678 BlockCache: Add a hash based L1 cache for lookups 2021-01-06 23:37:25 +02:00
duck f9cd0f0179 Have tests that throw a non-HLT SIGSEGV fail
Patch moves HandleSIGSEGV in HostFactory.cpp to a non-frontend host signal handler, then registers its own frontend signal handler to catch unhandled segfaults.
2021-01-06 05:07:47 -05:00
Stefanos Kornilios Mitsis Poiitidis 45b6c39e2c SRA: reload SRA on signal handler entry, recover from guest on context marshaling 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 86f74279e6 arm64: Fix SRA spills, OP_SYSCALL stack args 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis fa35e79c3f arm64: Fix lr pushing 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis bcf382afc4 Interpreter: Fix LSHR to correctly zero extend 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 193a72aa56 SRA: Address review feedback 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 94fb009f4b SRA: Address review feedback 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 5fd77f8228 arm64: Fix FPR spilling 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 41285865ba arm64: Fix asserts 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c95d40e9be arm64: Spill/Fill static ra around OP_SYSCALL 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 82545796b8 static-ra: Use LogMan::* instead of assert/printf 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 2ed8163a98 arm64: Cleanup & optimize Static and Dynamic spills on call 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 30d7c02b60 arm64: Really fix Popcount to take into account opsize 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 20a9b93019 OpDisp: Fix CondJUMPRCXOp 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 76367f0afc arm64: Remove some debug logic 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c20b27965d arm64: Fix Popcount to take into account opsize 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 6e053f0055 arm64: Fix IsGPR && IsFPR for SRA 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 80d1766bf0 arm64: Correctly handle signal and SRA interactions 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis a1f7c7da55 arm64: Fix Exit handler calling from signal 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis de0ed19e86 Arm64: Fix build for CreateRegPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis cdb2075522 X64: Fix RegisterClasses Count 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 204fda62f1 IR: Fix CreateElementPair edge cases, Remove Load/StoreContextPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis fbe87101db IR: Remove Load/StoreContextPair 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 17dc0bfcd8 SRA: Only do read-alias if accessing low part of register 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis c67aa0b83d OpDisp: Don't use LoadContextPair, it is kludgy and breaks SRA 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis 9c5a1fd5ea SRA: Static Register Allocation, arm64 only 2021-01-05 17:14:57 +02:00
Stefanos Kornilios Mitsis Poiitidis f724392ef8 Merge pull request #601 from Sonicadvance1/fix_cvtsi2ss_64bit
Adds support for proper sized GPR->FPR sized conversions
2021-01-05 12:03:33 +02:00
Ryan Houdek 4907bda639 Adds support for proper sized GPR->FPR sized conversions
Both x86 and AArch64 support converting from one sized GPR to another
sized FPR. Expose it in our IR op.

Fixes a bug in CVTSI2SS with a 64bit source and it was treating the
input source as a 32bit value.

eg:
0x0000'0000'FFFF'FFFF was treated as converting to -1 float, which was wrong since it is a 64bit value
2020-12-30 10:07:12 -08:00
Ryan Houdek 8bd76885ea Implements the rest of the prefetch ops and nops
Prefetch is highly architecture specific and a lot of these don't
actually map 1:1 with AArch64 anyway.
Just nop out
2020-12-27 19:10:41 -08:00
Ryan Houdek 69de873c34 Fixes some tables definitions for 32bit 2020-12-19 19:33:28 -08:00