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Core: Drop support for TSO auto migration
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@@ -154,8 +154,6 @@ public:
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return CodeInvalidationMutex;
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}
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void MarkMemoryShared(FEXCore::Core::InternalThreadState* Thread) override;
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void ConfigureAOTGen(FEXCore::Core::InternalThreadState* Thread, fextl::set<uint64_t>* ExternalBranches, uint64_t SectionMaxAddress) override;
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bool IsAddressInCodeBuffer(FEXCore::Core::InternalThreadState* Thread, uintptr_t Address) const override;
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@@ -196,7 +194,6 @@ public:
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FEX_CONFIG_OPT(GdbServer, GDBSERVER);
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FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
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FEX_CONFIG_OPT(TSOEnabled, TSOENABLED);
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FEX_CONFIG_OPT(TSOAutoMigration, TSOAUTOMIGRATION);
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FEX_CONFIG_OPT(VectorTSOEnabled, VECTORTSOENABLED);
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FEX_CONFIG_OPT(MemcpySetTSOEnabled, MEMCPYSETTSOENABLED);
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FEX_CONFIG_OPT(ABILocalFlags, ABILOCALFLAGS);
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@@ -317,12 +314,9 @@ protected:
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VectorAtomicTSOEmulationEnabled = true;
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MemcpyAtomicTSOEmulationEnabled = true;
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} else {
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// Atomic TSO emulation only enabled if the config option is enabled.
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AtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled;
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// Atomic vector TSO emulation only enabled if TSO emulation is enabled and also vector TSO is enabled.
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VectorAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.VectorTSOEnabled;
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// Atomic memcpy TSO emulation only enabled if TSO emulation is enabled and also memcpy TSO is enabled.
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MemcpyAtomicTSOEmulationEnabled = (IsMemoryShared || !Config.TSOAutoMigration) && Config.TSOEnabled && Config.MemcpySetTSOEnabled;
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AtomicTSOEmulationEnabled = Config.TSOEnabled;
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VectorAtomicTSOEmulationEnabled = Config.TSOEnabled && Config.VectorTSOEnabled;
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MemcpyAtomicTSOEmulationEnabled = Config.TSOEnabled && Config.MemcpySetTSOEnabled;
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}
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}
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@@ -338,7 +332,6 @@ private:
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IR::AOTIRCaptureCache IRCaptureCache;
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bool IsMemoryShared = false;
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bool SupportsHardwareTSO = false;
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bool AtomicTSOEmulationEnabled = true;
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bool VectorAtomicTSOEmulationEnabled = false;
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@@ -351,8 +344,8 @@ private:
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std::atomic<bool> HasCustomIRHandlers {};
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struct CustomIRHandlerEntry final {
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CustomIREntrypointHandler Handler;
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void *Creator;
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void *Data;
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void* Creator;
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void* Data;
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};
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fextl::unordered_map<uint64_t, CustomIRHandlerEntry> CustomIRHandlers;
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IntervalList<uint64_t> ForceTSOValidRanges; // The ranges for which ForceTSOInstructions has populated data
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