diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index 0efaff7cd..d52f43a3a 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -162,7 +162,7 @@ ] }, "Psychonauts matrix swizzle": { - "ExpectedInstructionCount": 4186, + "ExpectedInstructionCount": 2522, "Comment": [ "Hottest block in Windows Psychonauts", "Doing a 4x4 32-bit float matrix swizzle", @@ -293,52 +293,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -359,53 +333,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w23, #0xffffffc0", "add w23, w9, w23", @@ -425,52 +373,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -489,53 +411,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w23, #0xffffffc4", "add w23, w9, w23", @@ -555,52 +451,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -619,53 +489,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w23, #0xffffffc8", "add w23, w9, w23", @@ -685,52 +529,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -749,53 +567,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w23, #0xffffffcc", "add w23, w9, w23", @@ -815,52 +607,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -879,53 +645,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffd0", "add w21, w9, w21", @@ -946,52 +686,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1011,53 +725,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffd4", "add w21, w9, w21", @@ -1077,52 +765,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1141,53 +803,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffd8", "add w21, w9, w21", @@ -1207,52 +843,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1271,53 +881,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffdc", "add w21, w9, w21", @@ -1337,52 +921,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1401,53 +959,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffe0", "add w21, w9, w21", @@ -1467,52 +999,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1531,53 +1037,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffe4", "add w21, w9, w21", @@ -1598,52 +1078,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1663,53 +1117,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffe8", "add w21, w9, w21", @@ -1729,52 +1157,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1793,53 +1195,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xffffffec", "add w21, w9, w21", @@ -1859,52 +1235,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1923,53 +1273,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xfffffff0", "add w21, w9, w21", @@ -1989,52 +1313,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2053,53 +1351,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xfffffff4", "add w21, w9, w21", @@ -2119,52 +1391,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2183,53 +1429,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xfffffff8", "add w21, w9, w21", @@ -2250,52 +1470,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2315,53 +1509,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "mov w21, #0xfffffffc", "add w21, w9, w21", @@ -2382,52 +1550,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2446,53 +1588,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", "ldrb w21, [x28, #1026]", @@ -2511,52 +1627,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2575,53 +1665,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w6, #0x4 (4)", "str s2, [x21]", @@ -2641,52 +1705,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2705,53 +1743,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w4, #0x8 (8)", "str s2, [x21]", @@ -2771,52 +1783,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2835,53 +1821,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w5, #0xc (12)", "str s2, [x21]", @@ -2901,52 +1861,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2966,53 +1900,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w6, #0x10 (16)", "str s2, [x21]", @@ -3032,52 +1940,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3096,53 +1978,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w4, #0x14 (20)", "str s2, [x21]", @@ -3162,52 +2018,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3226,53 +2056,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w5, #0x18 (24)", "str s2, [x21]", @@ -3292,52 +2096,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3356,53 +2134,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w6, #0x1c (28)", "str s2, [x21]", @@ -3422,52 +2174,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3486,53 +2212,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w4, #0x20 (32)", "str s2, [x21]", @@ -3552,52 +2252,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3617,53 +2291,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w5, #0x24 (36)", "str s2, [x21]", @@ -3683,52 +2331,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3747,53 +2369,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w6, #0x28 (40)", "str s2, [x21]", @@ -3813,52 +2409,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3877,53 +2447,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w4, #0x2c (44)", "str s2, [x21]", @@ -3943,52 +2487,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4007,53 +2525,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w5, #0x30 (48)", "str s2, [x21]", @@ -4073,52 +2565,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4137,53 +2603,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w6, #0x34 (52)", "str s2, [x21]", @@ -4203,52 +2643,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4268,53 +2682,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w4, #0x38 (56)", "str s2, [x21]", @@ -4334,52 +2722,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4398,53 +2760,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "sub sp, sp, #0x1b0 (432)", + "str x8, [x28, #40]", + "sub sp, sp, #0x80 (128)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "stp x12, x13, [x0], #16", - "stp x14, x15, [x0], #16", - "stp x16, x17, [x0], #16", - "stp x29, x30, [x0], #16", - "str x30, [x0]", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [sp], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [sp], #64", - "ldp x12, x13, [sp], #16", - "ldp x14, x15, [sp], #16", - "ldp x16, x17, [sp], #16", - "ldp x29, x30, [sp], #16", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ldr x8, [x28, #40]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", "fmov s2, s0", "add w21, w5, #0x3c (60)", "str s2, [x21]", diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index 77642efcf..010aaefe2 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -14,7 +14,7 @@ }, "Instructions": { "fadd dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /0" ], @@ -25,52 +25,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -80,26 +54,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -107,28 +68,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -137,7 +85,7 @@ ] }, "fmul dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /1" ], @@ -148,52 +96,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -203,26 +125,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -230,28 +139,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -260,7 +156,7 @@ ] }, "fcom dword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xd8 !11b /2" ], @@ -271,52 +167,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -326,26 +196,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -353,28 +210,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -389,7 +233,7 @@ ] }, "fcomp dword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xd8 !11b /3" ], @@ -400,52 +244,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -455,26 +273,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -482,28 +287,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -526,7 +318,7 @@ ] }, "fsub dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /4" ], @@ -537,52 +329,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -592,26 +358,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -619,28 +372,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -649,7 +389,7 @@ ] }, "fsubr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /5" ], @@ -660,52 +400,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -715,26 +429,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -742,28 +443,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -772,7 +460,7 @@ ] }, "fdiv dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /6" ], @@ -783,52 +471,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -838,26 +500,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -865,28 +514,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -895,7 +531,7 @@ ] }, "fdivr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /7" ], @@ -906,52 +542,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -961,26 +571,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -988,28 +585,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1018,7 +602,7 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc0 /0" ], @@ -1034,26 +618,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1061,28 +632,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1091,7 +649,7 @@ ] }, "fadd st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc1 /0" ], @@ -1107,26 +665,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1134,28 +679,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1164,7 +696,7 @@ ] }, "fadd st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc2 /0" ], @@ -1180,26 +712,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1207,28 +726,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1237,7 +743,7 @@ ] }, "fadd st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc3 /0" ], @@ -1253,26 +759,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1280,28 +773,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1310,7 +790,7 @@ ] }, "fadd st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc4 /0" ], @@ -1326,26 +806,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1353,28 +820,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1383,7 +837,7 @@ ] }, "fadd st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc5 /0" ], @@ -1399,26 +853,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1426,28 +867,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1456,7 +884,7 @@ ] }, "fadd st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc6 /0" ], @@ -1472,26 +900,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1499,28 +914,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1529,7 +931,7 @@ ] }, "fadd st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc7 /0" ], @@ -1545,26 +947,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1572,28 +961,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1602,7 +978,7 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc8 /1" ], @@ -1618,26 +994,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1645,28 +1008,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1675,7 +1025,7 @@ ] }, "fmul st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc9 /1" ], @@ -1691,26 +1041,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1718,28 +1055,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1748,7 +1072,7 @@ ] }, "fmul st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xca /1" ], @@ -1764,26 +1088,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1791,28 +1102,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1821,7 +1119,7 @@ ] }, "fmul st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcb /1" ], @@ -1837,26 +1135,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1864,28 +1149,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1894,7 +1166,7 @@ ] }, "fmul st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcc /1" ], @@ -1910,26 +1182,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1937,28 +1196,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1967,7 +1213,7 @@ ] }, "fmul st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcd /1" ], @@ -1983,26 +1229,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2010,28 +1243,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2040,7 +1260,7 @@ ] }, "fmul st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xce /1" ], @@ -2056,26 +1276,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2083,28 +1290,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2113,7 +1307,7 @@ ] }, "fmul st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcf /1" ], @@ -2129,26 +1323,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2156,28 +1337,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2186,7 +1354,7 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd0 /2" ], @@ -2203,26 +1371,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2230,28 +1385,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x22, x20, #1, #1", "ubfx x23, x20, #0, #1", @@ -2265,7 +1407,7 @@ ] }, "fcom st0, st1": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd1 /2" ], @@ -2281,26 +1423,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2308,28 +1437,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2344,7 +1460,7 @@ ] }, "fcom st0, st2": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd2 /2" ], @@ -2360,26 +1476,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2387,28 +1490,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2423,7 +1513,7 @@ ] }, "fcom st0, st3": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd3 /2" ], @@ -2439,26 +1529,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2466,28 +1543,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2502,7 +1566,7 @@ ] }, "fcom st0, st4": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd4 /2" ], @@ -2518,26 +1582,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2545,28 +1596,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2581,7 +1619,7 @@ ] }, "fcom st0, st5": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd5 /2" ], @@ -2597,26 +1635,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2624,28 +1649,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2660,7 +1672,7 @@ ] }, "fcom st0, st6": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd6 /2" ], @@ -2676,26 +1688,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2703,28 +1702,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2739,7 +1725,7 @@ ] }, "fcom st0, st7": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd7 /2" ], @@ -2755,26 +1741,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2782,28 +1755,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2818,7 +1778,7 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xd8 /3" ], @@ -2835,26 +1795,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2862,28 +1809,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -2905,7 +1839,7 @@ ] }, "fcomp st0, st1": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xd9 /3" ], @@ -2922,26 +1856,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2949,28 +1870,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -2992,7 +1900,7 @@ ] }, "fcomp st0, st2": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xda /3" ], @@ -3008,26 +1916,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3035,28 +1930,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3079,7 +1961,7 @@ ] }, "fcomp st0, st3": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdb /3" ], @@ -3095,26 +1977,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3122,28 +1991,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3166,7 +2022,7 @@ ] }, "fcomp st0, st4": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdc /3" ], @@ -3182,26 +2038,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3209,28 +2052,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3253,7 +2083,7 @@ ] }, "fcomp st0, st5": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdd /3" ], @@ -3269,26 +2099,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3296,28 +2113,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3340,7 +2144,7 @@ ] }, "fcomp st0, st6": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xde /3" ], @@ -3356,26 +2160,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3383,28 +2174,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3427,7 +2205,7 @@ ] }, "fcomp st0, st7": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdf /3" ], @@ -3443,26 +2221,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3470,28 +2235,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3514,7 +2266,7 @@ ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe0 /4" ], @@ -3530,26 +2282,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -3557,28 +2296,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3587,7 +2313,7 @@ ] }, "fsub st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe1 /4" ], @@ -3603,26 +2329,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3630,28 +2343,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3660,7 +2360,7 @@ ] }, "fsub st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe2 /4" ], @@ -3676,26 +2376,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3703,28 +2390,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3733,7 +2407,7 @@ ] }, "fsub st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe3 /4" ], @@ -3749,26 +2423,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3776,28 +2437,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3806,7 +2454,7 @@ ] }, "fsub st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe4 /4" ], @@ -3822,26 +2470,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3849,28 +2484,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3879,7 +2501,7 @@ ] }, "fsub st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe5 /4" ], @@ -3895,26 +2517,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3922,28 +2531,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3952,7 +2548,7 @@ ] }, "fsub st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe6 /4" ], @@ -3968,26 +2564,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3995,28 +2578,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4025,7 +2595,7 @@ ] }, "fsub st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe7 /4" ], @@ -4041,26 +2611,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4068,28 +2625,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4098,7 +2642,7 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe8 /5" ], @@ -4114,26 +2658,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4141,28 +2672,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4171,7 +2689,7 @@ ] }, "fsubr st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe9 /5" ], @@ -4187,26 +2705,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4214,28 +2719,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4244,7 +2736,7 @@ ] }, "fsubr st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xea /5" ], @@ -4260,26 +2752,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4287,28 +2766,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4317,7 +2783,7 @@ ] }, "fsubr st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xeb /5" ], @@ -4333,26 +2799,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4360,28 +2813,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4390,7 +2830,7 @@ ] }, "fsubr st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xec /5" ], @@ -4406,26 +2846,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4433,28 +2860,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4463,7 +2877,7 @@ ] }, "fsubr st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xed /5" ], @@ -4479,26 +2893,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4506,28 +2907,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4536,7 +2924,7 @@ ] }, "fsubr st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xee /5" ], @@ -4552,26 +2940,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4579,28 +2954,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4609,7 +2971,7 @@ ] }, "fsubr st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xef /5" ], @@ -4625,26 +2987,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4652,28 +3001,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4682,7 +3018,7 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf0 /6" ], @@ -4698,26 +3034,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4725,28 +3048,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4755,7 +3065,7 @@ ] }, "fdiv st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf1 /6" ], @@ -4771,26 +3081,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4798,28 +3095,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4828,7 +3112,7 @@ ] }, "fdiv st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf2 /6" ], @@ -4844,26 +3128,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4871,28 +3142,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4901,7 +3159,7 @@ ] }, "fdiv st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf3 /6" ], @@ -4917,26 +3175,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4944,28 +3189,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4974,7 +3206,7 @@ ] }, "fdiv st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf4 /6" ], @@ -4990,26 +3222,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5017,28 +3236,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5047,7 +3253,7 @@ ] }, "fdiv st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf5 /6" ], @@ -5063,26 +3269,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5090,28 +3283,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5120,7 +3300,7 @@ ] }, "fdiv st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf6 /6" ], @@ -5136,26 +3316,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5163,28 +3330,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5193,7 +3347,7 @@ ] }, "fdiv st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf7 /6" ], @@ -5209,26 +3363,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5236,28 +3377,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5266,7 +3394,7 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf8 /7" ], @@ -5282,26 +3410,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5309,28 +3424,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5339,7 +3441,7 @@ ] }, "fdivr st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf9 /7" ], @@ -5355,26 +3457,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5382,28 +3471,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5412,7 +3488,7 @@ ] }, "fdivr st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfa /7" ], @@ -5428,26 +3504,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5455,28 +3518,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5485,7 +3535,7 @@ ] }, "fdivr st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfb /7" ], @@ -5501,26 +3551,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5528,28 +3565,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5558,7 +3582,7 @@ ] }, "fdivr st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfc /7" ], @@ -5574,26 +3598,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5601,28 +3612,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5631,7 +3629,7 @@ ] }, "fdivr st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfd /7" ], @@ -5647,26 +3645,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5674,28 +3659,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5704,7 +3676,7 @@ ] }, "fdivr st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfe /7" ], @@ -5720,26 +3692,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5747,28 +3706,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5777,7 +3723,7 @@ ] }, "fdivr st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xff /7" ], @@ -5793,26 +3739,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5820,28 +3753,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5850,7 +3770,7 @@ ] }, "fld dword [rax]": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd9 !11b /0" ], @@ -5861,52 +3781,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5923,7 +3817,7 @@ ] }, "fst dword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /2" ], @@ -5935,59 +3829,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4]" ] }, "fstp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xd9 !11b /3" ], @@ -5999,53 +3867,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", "ldrb w21, [x28, #1026]", @@ -6586,7 +4428,7 @@ ] }, "ftst": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xe4 /4" ], @@ -6600,26 +4442,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -6627,28 +4456,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -6861,7 +4677,7 @@ ] }, "f2xm1": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xf0 /6" ], @@ -6873,53 +4689,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1328]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -6928,7 +4718,7 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd9 11b 0xf1 /6" ], @@ -6950,26 +4740,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -6977,28 +4754,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1432]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7007,7 +4771,7 @@ ] }, "fptan": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 49, "Comment": [ "0xd9 11b 0xf2 /6" ], @@ -7027,53 +4791,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1336]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7090,7 +4828,7 @@ ] }, "fpatan": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd9 11b 0xf3 /6" ], @@ -7112,26 +4850,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -7139,28 +4864,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1440]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7169,7 +4881,7 @@ ] }, "fxtract": { - "ExpectedInstructionCount": 123, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf4 /6" ], @@ -7189,53 +4901,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1368]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", @@ -7243,53 +4929,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1376]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7300,7 +4960,7 @@ ] }, "fprem1": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xd9 11b 0xf5 /6" ], @@ -7316,26 +4976,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7343,28 +4990,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1448]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7399,7 +5033,7 @@ ] }, "fprem": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xd9 11b 0xf8 /7" ], @@ -7415,26 +5049,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7442,28 +5063,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1456]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7474,7 +5082,7 @@ ] }, "fyl2xp1": { - "ExpectedInstructionCount": 131, + "ExpectedInstructionCount": 79, "Comment": [ "0xd9 11b 0xf9 /7" ], @@ -7500,26 +5108,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7527,28 +5122,15 @@ "umov w4, v4.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7556,26 +5138,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7583,28 +5152,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1432]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7613,7 +5169,7 @@ ] }, "fsqrt": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xfa /7" ], @@ -7625,53 +5181,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1344]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7680,7 +5210,7 @@ ] }, "fsincos": { - "ExpectedInstructionCount": 125, + "ExpectedInstructionCount": 73, "Comment": [ "0xd9 11b 0xfb /7" ], @@ -7700,53 +5230,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1352]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", @@ -7754,53 +5258,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1360]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7813,7 +5291,7 @@ ] }, "frndint": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xfc /7" ], @@ -7825,53 +5303,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1320]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7880,7 +5332,7 @@ ] }, "fscale": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd9 11b 0xfd /7" ], @@ -7896,26 +5348,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7923,28 +5362,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1464]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7953,7 +5379,7 @@ ] }, "fsin": { - "ExpectedInstructionCount": 61, + "ExpectedInstructionCount": 35, "Comment": [ "0xd9 11b 0xfe /7" ], @@ -7965,53 +5391,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1352]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8022,7 +5422,7 @@ ] }, "fcos": { - "ExpectedInstructionCount": 61, + "ExpectedInstructionCount": 35, "Comment": [ "0xd9 11b 0xff /7" ], @@ -8034,53 +5434,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1360]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8091,7 +5465,7 @@ ] }, "fiadd dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /0" ], @@ -8102,52 +5476,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8157,26 +5505,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8184,28 +5519,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8214,7 +5536,7 @@ ] }, "fimul dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /1" ], @@ -8225,52 +5547,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8280,26 +5576,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8307,28 +5590,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8337,7 +5607,7 @@ ] }, "ficom dword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xda !11b /2" ], @@ -8348,52 +5618,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8403,26 +5647,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8430,28 +5661,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -8466,7 +5684,7 @@ ] }, "ficomp dword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xda !11b /3" ], @@ -8477,52 +5695,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8532,26 +5724,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8559,28 +5738,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -8603,7 +5769,7 @@ ] }, "fisub dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /4" ], @@ -8614,52 +5780,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8669,26 +5809,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8696,28 +5823,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8726,7 +5840,7 @@ ] }, "fisubr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /5" ], @@ -8737,52 +5851,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8792,26 +5880,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -8819,28 +5894,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8849,7 +5911,7 @@ ] }, "fidiv dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /6" ], @@ -8860,52 +5922,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8915,26 +5951,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8942,28 +5965,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8972,7 +5982,7 @@ ] }, "fidivr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /7" ], @@ -8983,52 +5993,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -9038,26 +6022,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -9065,28 +6036,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -9799,7 +6757,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 84, + "ExpectedInstructionCount": 58, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -9816,26 +6774,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -9843,28 +6788,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -9934,7 +6866,7 @@ ] }, "fisttp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdb !11b /1" ], @@ -9946,53 +6878,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1224]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w21, w0", "str w21, [x4]", "ldrb w21, [x28, #1026]", @@ -10006,7 +6912,7 @@ ] }, "fist dword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdb !11b /2" ], @@ -10018,59 +6924,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1200]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w20, w0", "str w20, [x4]" ] }, "fistp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /7" ], @@ -10082,53 +6962,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1200]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w21, w0", "str w21, [x4]", "ldrb w21, [x28, #1026]", @@ -10904,7 +7758,7 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xe8 /5" ], @@ -10920,26 +7774,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -10947,28 +7788,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -10981,7 +7809,7 @@ ] }, "fucomi st0, st1": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xe9 /5" ], @@ -10997,26 +7825,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11024,28 +7839,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11058,7 +7860,7 @@ ] }, "fucomi st0, st2": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xea /5" ], @@ -11074,26 +7876,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11101,28 +7890,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11135,7 +7911,7 @@ ] }, "fucomi st0, st3": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xeb /5" ], @@ -11151,26 +7927,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11178,28 +7941,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11212,7 +7962,7 @@ ] }, "fucomi st0, st4": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xec /5" ], @@ -11228,26 +7978,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11255,28 +7992,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11289,7 +8013,7 @@ ] }, "fucomi st0, st5": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xed /5" ], @@ -11305,26 +8029,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11332,28 +8043,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11366,7 +8064,7 @@ ] }, "fucomi st0, st6": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xee /5" ], @@ -11382,26 +8080,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11409,28 +8094,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11443,7 +8115,7 @@ ] }, "fucomi st0, st7": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xef /5" ], @@ -11459,26 +8131,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11486,28 +8145,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11520,7 +8166,7 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf0 /6" ], @@ -11536,26 +8182,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11563,28 +8196,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11597,7 +8217,7 @@ ] }, "fcomi st0, st1": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf1 /6" ], @@ -11613,26 +8233,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11640,28 +8247,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11674,7 +8268,7 @@ ] }, "fcomi st0, st2": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf2 /6" ], @@ -11690,26 +8284,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11717,28 +8298,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11751,7 +8319,7 @@ ] }, "fcomi st0, st3": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf3 /6" ], @@ -11767,26 +8335,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11794,28 +8349,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11828,7 +8370,7 @@ ] }, "fcomi st0, st4": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf4 /6" ], @@ -11844,26 +8386,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11871,28 +8400,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11905,7 +8421,7 @@ ] }, "fcomi st0, st5": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf5 /6" ], @@ -11921,26 +8437,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11948,28 +8451,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11982,7 +8472,7 @@ ] }, "fcomi st0, st6": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf6 /6" ], @@ -11998,26 +8488,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12025,28 +8502,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12059,7 +8523,7 @@ ] }, "fcomi st0, st7": { - "ExpectedInstructionCount": 69, + "ExpectedInstructionCount": 43, "Comment": [ "0xdb 11b 0xf7 /6" ], @@ -12075,26 +8539,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12102,28 +8553,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12136,7 +8574,7 @@ ] }, "fadd qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /0" ], @@ -12147,52 +8585,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12202,26 +8614,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12229,28 +8628,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12259,7 +8645,7 @@ ] }, "fmul qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /1" ], @@ -12270,52 +8656,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12325,26 +8685,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12352,28 +8699,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12382,7 +8716,7 @@ ] }, "fcom qword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xdc !11b /2" ], @@ -12393,52 +8727,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12448,26 +8756,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12475,28 +8770,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12511,7 +8793,7 @@ ] }, "fcomp qword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xdc !11b /3" ], @@ -12522,52 +8804,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12577,26 +8833,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12604,28 +8847,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -12648,7 +8878,7 @@ ] }, "fsub qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /4" ], @@ -12659,52 +8889,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12714,26 +8918,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12741,28 +8932,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12771,7 +8949,7 @@ ] }, "fsubr qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /5" ], @@ -12782,52 +8960,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12837,26 +8989,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -12864,28 +9003,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12894,7 +9020,7 @@ ] }, "fdiv qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /6" ], @@ -12905,52 +9031,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12960,26 +9060,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12987,28 +9074,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13017,7 +9091,7 @@ ] }, "fdivr qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /7" ], @@ -13028,52 +9102,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13083,26 +9131,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -13110,28 +9145,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13140,7 +9162,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -13158,26 +9180,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13185,28 +9194,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13215,7 +9211,7 @@ ] }, "fadd st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc1 /0" ], @@ -13231,26 +9227,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13258,28 +9241,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13288,7 +9258,7 @@ ] }, "fadd st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc2 /0" ], @@ -13304,26 +9274,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13331,28 +9288,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13361,7 +9305,7 @@ ] }, "fadd st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc3 /0" ], @@ -13377,26 +9321,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13404,28 +9335,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13434,7 +9352,7 @@ ] }, "fadd st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc4 /0" ], @@ -13450,26 +9368,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13477,28 +9382,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13507,7 +9399,7 @@ ] }, "fadd st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc5 /0" ], @@ -13523,26 +9415,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13550,28 +9429,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13580,7 +9446,7 @@ ] }, "fadd st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc6 /0" ], @@ -13596,26 +9462,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13623,28 +9476,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13653,7 +9493,7 @@ ] }, "fadd st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc7 /0" ], @@ -13669,26 +9509,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13696,28 +9523,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13726,7 +9540,7 @@ ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -13744,26 +9558,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13771,28 +9572,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13801,7 +9589,7 @@ ] }, "fmul st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc9 /1" ], @@ -13817,26 +9605,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13844,28 +9619,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13874,7 +9636,7 @@ ] }, "fmul st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xca /1" ], @@ -13890,26 +9652,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13917,28 +9666,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13947,7 +9683,7 @@ ] }, "fmul st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcb /1" ], @@ -13963,26 +9699,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13990,28 +9713,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14020,7 +9730,7 @@ ] }, "fmul st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcc /1" ], @@ -14036,26 +9746,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14063,28 +9760,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14093,7 +9777,7 @@ ] }, "fmul st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcd /1" ], @@ -14109,26 +9793,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14136,28 +9807,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14166,7 +9824,7 @@ ] }, "fmul st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xce /1" ], @@ -14182,26 +9840,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14209,28 +9854,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14239,7 +9871,7 @@ ] }, "fmul st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcf /1" ], @@ -14255,26 +9887,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14282,28 +9901,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14312,7 +9918,7 @@ ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14330,26 +9936,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14357,28 +9950,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14387,7 +9967,7 @@ ] }, "fsubr st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe1 /4" ], @@ -14403,26 +9983,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14430,28 +9997,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14460,7 +10014,7 @@ ] }, "fsubr st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe2 /4" ], @@ -14476,26 +10030,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14503,28 +10044,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14533,7 +10061,7 @@ ] }, "fsubr st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe3 /4" ], @@ -14549,26 +10077,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14576,28 +10091,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14606,7 +10108,7 @@ ] }, "fsubr st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe4 /4" ], @@ -14622,26 +10124,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14649,28 +10138,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14679,7 +10155,7 @@ ] }, "fsubr st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe5 /4" ], @@ -14695,26 +10171,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14722,28 +10185,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14752,7 +10202,7 @@ ] }, "fsubr st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe6 /4" ], @@ -14768,26 +10218,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14795,28 +10232,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14825,7 +10249,7 @@ ] }, "fsubr st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe7 /4" ], @@ -14841,26 +10265,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14868,28 +10279,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14898,7 +10296,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14916,26 +10314,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -14943,28 +10328,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14973,7 +10345,7 @@ ] }, "fsub st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe9 /5" ], @@ -14989,26 +10361,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15016,28 +10375,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15046,7 +10392,7 @@ ] }, "fsub st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xea /5" ], @@ -15062,26 +10408,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15089,28 +10422,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15119,7 +10439,7 @@ ] }, "fsub st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xeb /5" ], @@ -15135,26 +10455,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15162,28 +10469,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15192,7 +10486,7 @@ ] }, "fsub st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xec /5" ], @@ -15208,26 +10502,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15235,28 +10516,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15265,7 +10533,7 @@ ] }, "fsub st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xed /5" ], @@ -15281,26 +10549,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15308,28 +10563,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15338,7 +10580,7 @@ ] }, "fsub st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xee /5" ], @@ -15354,26 +10596,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15381,28 +10610,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15411,7 +10627,7 @@ ] }, "fsub st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xef /5" ], @@ -15427,26 +10643,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15454,28 +10657,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15484,7 +10674,7 @@ ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15502,26 +10692,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15529,28 +10706,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15559,7 +10723,7 @@ ] }, "fdivr st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf1 /6" ], @@ -15575,26 +10739,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15602,28 +10753,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15632,7 +10770,7 @@ ] }, "fdivr st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf2 /6" ], @@ -15648,26 +10786,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15675,28 +10800,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15705,7 +10817,7 @@ ] }, "fdivr st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf3 /6" ], @@ -15721,26 +10833,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15748,28 +10847,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15778,7 +10864,7 @@ ] }, "fdivr st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf4 /6" ], @@ -15794,26 +10880,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15821,28 +10894,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15851,7 +10911,7 @@ ] }, "fdivr st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf5 /6" ], @@ -15867,26 +10927,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15894,28 +10941,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15924,7 +10958,7 @@ ] }, "fdivr st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf6 /6" ], @@ -15940,26 +10974,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15967,28 +10988,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15997,7 +11005,7 @@ ] }, "fdivr st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf7 /6" ], @@ -16013,26 +11021,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -16040,28 +11035,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16070,7 +11052,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16088,26 +11070,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16115,28 +11084,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16145,7 +11101,7 @@ ] }, "fdiv st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf9 /7" ], @@ -16161,26 +11117,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16188,28 +11131,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16218,7 +11148,7 @@ ] }, "fdiv st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfa /7" ], @@ -16234,26 +11164,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16261,28 +11178,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16291,7 +11195,7 @@ ] }, "fdiv st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfb /7" ], @@ -16307,26 +11211,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16334,28 +11225,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16364,7 +11242,7 @@ ] }, "fdiv st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfc /7" ], @@ -16380,26 +11258,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16407,28 +11272,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16437,7 +11289,7 @@ ] }, "fdiv st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfd /7" ], @@ -16453,26 +11305,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16480,28 +11319,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16510,7 +11336,7 @@ ] }, "fdiv st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfe /7" ], @@ -16526,26 +11352,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16553,28 +11366,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16583,7 +11383,7 @@ ] }, "fdiv st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xff /7" ], @@ -16599,26 +11399,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16626,28 +11413,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16656,7 +11430,7 @@ ] }, "fld qword [rax]": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdd !11b /0" ], @@ -16667,52 +11441,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16729,7 +11477,7 @@ ] }, "fisttp qword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdd !11b /1" ], @@ -16741,53 +11489,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1232]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "str x21, [x4]", "ldrb w21, [x28, #1026]", @@ -16801,7 +11523,7 @@ ] }, "fst qword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdd !11b /2" ], @@ -16813,59 +11535,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x4]" ] }, "fstp qword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdd !11b /3" ], @@ -16877,53 +11573,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x4]", "ldrb w21, [x28, #1026]", @@ -17631,7 +12301,7 @@ ] }, "fucom st0": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe0 /4" ], @@ -17648,26 +12318,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17675,28 +12332,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x22, x20, #1, #1", "ubfx x23, x20, #0, #1", @@ -17710,7 +12354,7 @@ ] }, "fucom st1": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe1 /4" ], @@ -17726,26 +12370,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17753,28 +12384,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17789,7 +12407,7 @@ ] }, "fucom st2": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe2 /4" ], @@ -17805,26 +12423,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17832,28 +12437,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17868,7 +12460,7 @@ ] }, "fucom st3": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe3 /4" ], @@ -17884,26 +12476,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17911,28 +12490,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17947,7 +12513,7 @@ ] }, "fucom st4": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe4 /4" ], @@ -17963,26 +12529,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17990,28 +12543,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18026,7 +12566,7 @@ ] }, "fucom st5": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe5 /4" ], @@ -18042,26 +12582,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18069,28 +12596,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18105,7 +12619,7 @@ ] }, "fucom st6": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe6 /4" ], @@ -18121,26 +12635,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18148,28 +12649,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18184,7 +12672,7 @@ ] }, "fucom st7": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe7 /4" ], @@ -18200,26 +12688,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18227,28 +12702,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18263,7 +12725,7 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xe8 /5" ], @@ -18280,26 +12742,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18307,28 +12756,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -18350,7 +12786,7 @@ ] }, "fucomp st1": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xe9 /5" ], @@ -18367,26 +12803,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18394,28 +12817,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -18437,7 +12847,7 @@ ] }, "fucomp st2": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xea /5" ], @@ -18453,26 +12863,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18480,28 +12877,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18524,7 +12908,7 @@ ] }, "fucomp st3": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xeb /5" ], @@ -18540,26 +12924,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18567,28 +12938,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18611,7 +12969,7 @@ ] }, "fucomp st4": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xec /5" ], @@ -18627,26 +12985,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18654,28 +12999,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18698,7 +13030,7 @@ ] }, "fucomp st5": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xed /5" ], @@ -18714,26 +13046,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18741,28 +13060,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18785,7 +13091,7 @@ ] }, "fucomp st6": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xee /5" ], @@ -18801,26 +13107,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18828,28 +13121,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18872,7 +13152,7 @@ ] }, "fucomp st7": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xef /5" ], @@ -18888,26 +13168,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18915,28 +13182,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18959,7 +13213,7 @@ ] }, "fiadd word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /0" ], @@ -18970,52 +13224,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19025,26 +13253,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19052,28 +13267,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19082,7 +13284,7 @@ ] }, "fimul word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /1" ], @@ -19093,52 +13295,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19148,26 +13324,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19175,28 +13338,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19205,7 +13355,7 @@ ] }, "ficom word [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xde !11b /2" ], @@ -19216,52 +13366,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19271,26 +13395,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19298,28 +13409,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -19334,7 +13432,7 @@ ] }, "ficomp word [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xde !11b /3" ], @@ -19345,52 +13443,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19400,26 +13472,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19427,28 +13486,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -19471,7 +13517,7 @@ ] }, "fisub word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /4" ], @@ -19482,52 +13528,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19537,26 +13557,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19564,28 +13571,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19594,7 +13588,7 @@ ] }, "fisubr word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /5" ], @@ -19605,52 +13599,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19660,26 +13628,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -19687,28 +13642,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19717,7 +13659,7 @@ ] }, "fidiv word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /6" ], @@ -19728,52 +13670,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19783,26 +13699,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19810,28 +13713,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19840,7 +13730,7 @@ ] }, "fidivr word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /7" ], @@ -19851,52 +13741,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19906,26 +13770,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -19933,28 +13784,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19963,7 +13801,7 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xd8 11b 0xc0 /0" ], @@ -19979,26 +13817,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20006,28 +13831,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20044,7 +13856,7 @@ ] }, "faddp st1": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc1 /0" ], @@ -20061,26 +13873,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20088,28 +13887,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20125,7 +13911,7 @@ ] }, "faddp st2": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc2 /0" ], @@ -20141,26 +13927,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20168,28 +13941,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20206,7 +13966,7 @@ ] }, "faddp st3": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc3 /0" ], @@ -20222,26 +13982,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20249,28 +13996,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20287,7 +14021,7 @@ ] }, "faddp st4": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc4 /0" ], @@ -20303,26 +14037,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20330,28 +14051,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20368,7 +14076,7 @@ ] }, "faddp st5": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc5 /0" ], @@ -20384,26 +14092,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20411,28 +14106,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20449,7 +14131,7 @@ ] }, "faddp st6": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc6 /0" ], @@ -20465,26 +14147,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20492,28 +14161,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20530,7 +14186,7 @@ ] }, "faddp st7": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc7 /0" ], @@ -20546,26 +14202,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20573,28 +14216,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20611,7 +14241,7 @@ ] }, "fmulp st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc8 /1" ], @@ -20627,26 +14257,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20654,28 +14271,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20692,7 +14296,7 @@ ] }, "fmulp st1": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc9 /1" ], @@ -20709,26 +14313,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20736,28 +14327,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20773,7 +14351,7 @@ ] }, "fmulp st2": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xca /1" ], @@ -20789,26 +14367,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20816,28 +14381,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20854,7 +14406,7 @@ ] }, "fmulp st3": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcb /1" ], @@ -20870,26 +14422,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20897,28 +14436,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20935,7 +14461,7 @@ ] }, "fmulp st4": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcc /1" ], @@ -20951,26 +14477,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20978,28 +14491,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21016,7 +14516,7 @@ ] }, "fmulp st5": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcd /1" ], @@ -21032,26 +14532,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21059,28 +14546,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21097,7 +14571,7 @@ ] }, "fmulp st6": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xce /1" ], @@ -21113,26 +14587,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21140,28 +14601,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21178,7 +14626,7 @@ ] }, "fmulp st7": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcf /1" ], @@ -21194,26 +14642,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21221,28 +14656,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21259,7 +14681,7 @@ ] }, "fcompp": { - "ExpectedInstructionCount": 84, + "ExpectedInstructionCount": 58, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -21276,26 +14698,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21303,28 +14712,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -21351,7 +14747,7 @@ ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -21369,26 +14765,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21396,28 +14779,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21434,7 +14804,7 @@ ] }, "fsubrp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe1 /4" ], @@ -21451,26 +14821,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21478,28 +14835,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21515,7 +14859,7 @@ ] }, "fsubrp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe2 /4" ], @@ -21531,26 +14875,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21558,28 +14889,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21596,7 +14914,7 @@ ] }, "fsubrp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe3 /4" ], @@ -21612,26 +14930,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21639,28 +14944,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21677,7 +14969,7 @@ ] }, "fsubrp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe4 /4" ], @@ -21693,26 +14985,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21720,28 +14999,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21758,7 +15024,7 @@ ] }, "fsubrp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe5 /4" ], @@ -21774,26 +15040,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21801,28 +15054,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21839,7 +15079,7 @@ ] }, "fsubrp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe6 /4" ], @@ -21855,26 +15095,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21882,28 +15109,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21920,7 +15134,7 @@ ] }, "fsubrp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe7 /4" ], @@ -21936,26 +15150,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21963,28 +15164,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22001,7 +15189,7 @@ ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -22019,26 +15207,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22046,28 +15221,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22084,7 +15246,7 @@ ] }, "fsubp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe9 /5" ], @@ -22101,26 +15263,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22128,28 +15277,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22165,7 +15301,7 @@ ] }, "fsubp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xea /5" ], @@ -22181,26 +15317,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22208,28 +15331,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22246,7 +15356,7 @@ ] }, "fsubp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xeb /5" ], @@ -22262,26 +15372,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22289,28 +15386,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22327,7 +15411,7 @@ ] }, "fsubp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xec /5" ], @@ -22343,26 +15427,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22370,28 +15441,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22408,7 +15466,7 @@ ] }, "fsubp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xed /5" ], @@ -22424,26 +15482,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22451,28 +15496,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22489,7 +15521,7 @@ ] }, "fsubp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xee /5" ], @@ -22505,26 +15537,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22532,28 +15551,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22570,7 +15576,7 @@ ] }, "fsubp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xef /5" ], @@ -22586,26 +15592,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22613,28 +15606,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22651,7 +15631,7 @@ ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -22669,26 +15649,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22696,28 +15663,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22734,7 +15688,7 @@ ] }, "fdivrp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf1 /6" ], @@ -22751,26 +15705,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22778,28 +15719,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22815,7 +15743,7 @@ ] }, "fdivrp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf2 /6" ], @@ -22831,26 +15759,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22858,28 +15773,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22896,7 +15798,7 @@ ] }, "fdivrp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf3 /6" ], @@ -22912,26 +15814,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22939,28 +15828,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22977,7 +15853,7 @@ ] }, "fdivrp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf4 /6" ], @@ -22993,26 +15869,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23020,28 +15883,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23058,7 +15908,7 @@ ] }, "fdivrp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf5 /6" ], @@ -23074,26 +15924,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23101,28 +15938,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23139,7 +15963,7 @@ ] }, "fdivrp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf6 /6" ], @@ -23155,26 +15979,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23182,28 +15993,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23220,7 +16018,7 @@ ] }, "fdivrp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf7 /6" ], @@ -23236,26 +16034,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23263,28 +16048,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23301,7 +16073,7 @@ ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -23319,26 +16091,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23346,28 +16105,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23384,7 +16130,7 @@ ] }, "fdivp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf9 /7" ], @@ -23401,26 +16147,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23428,28 +16161,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23465,7 +16185,7 @@ ] }, "fdivp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfa /7" ], @@ -23481,26 +16201,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23508,28 +16215,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23546,7 +16240,7 @@ ] }, "fdivp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfb /7" ], @@ -23562,26 +16256,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23589,28 +16270,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23627,7 +16295,7 @@ ] }, "fdivp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfc /7" ], @@ -23643,26 +16311,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23670,28 +16325,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23708,7 +16350,7 @@ ] }, "fdivp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfd /7" ], @@ -23724,26 +16366,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23751,28 +16380,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23789,7 +16405,7 @@ ] }, "fdivp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfe /7" ], @@ -23805,26 +16421,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23832,28 +16435,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23870,7 +16460,7 @@ ] }, "fdivp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xff /7" ], @@ -23886,26 +16476,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23913,28 +16490,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23994,7 +16558,7 @@ ] }, "fisttp word [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /1" ], @@ -24006,53 +16570,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1216]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x21, w0", "strh w21, [x4]", "ldrb w21, [x28, #1026]", @@ -24066,7 +16604,7 @@ ] }, "fist word [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdf !11b /2" ], @@ -24078,59 +16616,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1192]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x20, w0", "strh w20, [x4]" ] }, "fistp word [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /3" ], @@ -24142,53 +16654,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1192]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x21, w0", "strh w21, [x4]", "ldrb w21, [x28, #1026]", @@ -24202,7 +16688,7 @@ ] }, "fbld tword [rax]": { - "ExpectedInstructionCount": 66, + "ExpectedInstructionCount": 40, "Comment": [ "0xdf !11b /4" ], @@ -24221,53 +16707,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1392]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -24276,7 +16736,7 @@ ] }, "fbstp tword [rax]": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 42, "Comment": [ "0xdf !11b /6" ], @@ -24288,53 +16748,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1384]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -24468,7 +16902,7 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xe8 /5" ], @@ -24484,26 +16918,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24511,28 +16932,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24553,7 +16961,7 @@ ] }, "fucomip st1": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xe9 /5" ], @@ -24570,26 +16978,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24597,28 +16992,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -24638,7 +17020,7 @@ ] }, "fucomip st2": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xea /5" ], @@ -24654,26 +17036,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24681,28 +17050,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24723,7 +17079,7 @@ ] }, "fucomip st3": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xeb /5" ], @@ -24739,26 +17095,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24766,28 +17109,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24808,7 +17138,7 @@ ] }, "fucomip st4": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xec /5" ], @@ -24824,26 +17154,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24851,28 +17168,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24893,7 +17197,7 @@ ] }, "fucomip st5": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xed /5" ], @@ -24909,26 +17213,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24936,28 +17227,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24978,7 +17256,7 @@ ] }, "fucomip st6": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xee /5" ], @@ -24994,26 +17272,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25021,28 +17286,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25063,7 +17315,7 @@ ] }, "fucomip st7": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xef /5" ], @@ -25079,26 +17331,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25106,28 +17345,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25148,7 +17374,7 @@ ] }, "fcomip st0": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf0 /6" ], @@ -25164,26 +17390,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25191,28 +17404,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25233,7 +17433,7 @@ ] }, "fcomip st1": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf1 /6" ], @@ -25250,26 +17450,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25277,28 +17464,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -25318,7 +17492,7 @@ ] }, "fcomip st2": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf2 /6" ], @@ -25334,26 +17508,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25361,28 +17522,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25403,7 +17551,7 @@ ] }, "fcomip st3": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf3 /6" ], @@ -25419,26 +17567,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25446,28 +17581,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25488,7 +17610,7 @@ ] }, "fcomip st4": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf4 /6" ], @@ -25504,26 +17626,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25531,28 +17640,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25573,7 +17669,7 @@ ] }, "fcomip st5": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf5 /6" ], @@ -25589,26 +17685,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25616,28 +17699,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25658,7 +17728,7 @@ ] }, "fcomip st6": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf6 /6" ], @@ -25674,26 +17744,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25701,28 +17758,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25743,7 +17787,7 @@ ] }, "fcomip st7": { - "ExpectedInstructionCount": 77, + "ExpectedInstructionCount": 51, "Comment": [ "0xdf 11b 0xf7 /6" ], @@ -25759,26 +17803,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25786,28 +17817,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 77cc349dc..725fff198 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -4187,7 +4187,7 @@ ] }, "fld tword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdb !11b /5" ], @@ -4198,53 +4198,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", @@ -4259,7 +4233,7 @@ ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb !11b /7" ], @@ -4271,52 +4245,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -6456,7 +6404,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 533, + "ExpectedInstructionCount": 325, "Comment": [ "0xdd !11b /4" ], @@ -6529,53 +6477,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6588,53 +6510,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6647,53 +6543,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6706,53 +6576,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6765,53 +6609,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6824,53 +6642,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6883,53 +6675,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d2, [x0, #768]", @@ -6943,53 +6709,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d2, [x0, #768]", @@ -6997,7 +6737,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 543, + "ExpectedInstructionCount": 335, "Comment": [ "0xdd !11b /6" ], @@ -7071,52 +6811,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7130,52 +6844,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7189,52 +6877,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7248,52 +6910,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7307,52 +6943,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7366,52 +6976,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7425,52 +7009,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7484,52 +7042,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -9995,7 +9527,7 @@ ] }, "fbld tword [rax]": { - "ExpectedInstructionCount": 118, + "ExpectedInstructionCount": 66, "Comment": [ "0xdf !11b /4" ], @@ -10014,53 +9546,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1392]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -10068,60 +9574,34 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x20, lsl #4", "str d2, [x0, #768]" ] }, "fbstp tword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xdf !11b /6" ], @@ -10133,52 +9613,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -10186,53 +9640,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1384]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 5e4f88b6f..fd3f13251 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -13,7 +13,7 @@ }, "Instructions": { "fadd dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /0" ], @@ -24,52 +24,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -79,26 +53,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -106,28 +67,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -136,7 +84,7 @@ ] }, "fmul dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /1" ], @@ -147,52 +95,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -202,26 +124,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -229,28 +138,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -259,7 +155,7 @@ ] }, "fcom dword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xd8 !11b /2" ], @@ -270,52 +166,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -325,26 +195,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -352,28 +209,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -388,7 +232,7 @@ ] }, "fcomp dword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xd8 !11b /3" ], @@ -399,52 +243,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -454,26 +272,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -481,28 +286,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -525,7 +317,7 @@ ] }, "fsub dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /4" ], @@ -536,52 +328,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -591,26 +357,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -618,28 +371,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -648,7 +388,7 @@ ] }, "fsubr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /5" ], @@ -659,52 +399,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -714,26 +428,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -741,28 +442,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -771,7 +459,7 @@ ] }, "fdiv dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /6" ], @@ -782,52 +470,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -837,26 +499,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -864,28 +513,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -894,7 +530,7 @@ ] }, "fdivr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xd8 !11b /7" ], @@ -905,52 +541,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -960,26 +570,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -987,28 +584,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1017,7 +601,7 @@ ] }, "fadd st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc0 /0" ], @@ -1033,26 +617,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1060,28 +631,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1090,7 +648,7 @@ ] }, "fadd st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc1 /0" ], @@ -1106,26 +664,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1133,28 +678,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1163,7 +695,7 @@ ] }, "fadd st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc2 /0" ], @@ -1179,26 +711,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1206,28 +725,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1236,7 +742,7 @@ ] }, "fadd st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc3 /0" ], @@ -1252,26 +758,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1279,28 +772,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1309,7 +789,7 @@ ] }, "fadd st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc4 /0" ], @@ -1325,26 +805,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1352,28 +819,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1382,7 +836,7 @@ ] }, "fadd st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc5 /0" ], @@ -1398,26 +852,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1425,28 +866,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1455,7 +883,7 @@ ] }, "fadd st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc6 /0" ], @@ -1471,26 +899,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1498,28 +913,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1528,7 +930,7 @@ ] }, "fadd st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc7 /0" ], @@ -1544,26 +946,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1571,28 +960,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1601,7 +977,7 @@ ] }, "fmul st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc8 /1" ], @@ -1617,26 +993,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1644,28 +1007,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1674,7 +1024,7 @@ ] }, "fmul st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xc9 /1" ], @@ -1690,26 +1040,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1717,28 +1054,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1747,7 +1071,7 @@ ] }, "fmul st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xca /1" ], @@ -1763,26 +1087,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1790,28 +1101,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1820,7 +1118,7 @@ ] }, "fmul st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcb /1" ], @@ -1836,26 +1134,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1863,28 +1148,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1893,7 +1165,7 @@ ] }, "fmul st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcc /1" ], @@ -1909,26 +1181,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -1936,28 +1195,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -1966,7 +1212,7 @@ ] }, "fmul st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcd /1" ], @@ -1982,26 +1228,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2009,28 +1242,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2039,7 +1259,7 @@ ] }, "fmul st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xce /1" ], @@ -2055,26 +1275,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2082,28 +1289,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2112,7 +1306,7 @@ ] }, "fmul st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xcf /1" ], @@ -2128,26 +1322,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2155,28 +1336,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -2185,7 +1353,7 @@ ] }, "fcom st0, st0": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd0 /2" ], @@ -2202,26 +1370,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2229,28 +1384,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x22, x20, #1, #1", "ubfx x23, x20, #0, #1", @@ -2264,7 +1406,7 @@ ] }, "fcom st0, st1": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd1 /2" ], @@ -2280,26 +1422,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2307,28 +1436,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2343,7 +1459,7 @@ ] }, "fcom st0, st2": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd2 /2" ], @@ -2359,26 +1475,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2386,28 +1489,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2422,7 +1512,7 @@ ] }, "fcom st0, st3": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd3 /2" ], @@ -2438,26 +1528,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2465,28 +1542,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2501,7 +1565,7 @@ ] }, "fcom st0, st4": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd4 /2" ], @@ -2517,26 +1581,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2544,28 +1595,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2580,7 +1618,7 @@ ] }, "fcom st0, st5": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd5 /2" ], @@ -2596,26 +1634,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2623,28 +1648,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2659,7 +1671,7 @@ ] }, "fcom st0, st6": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd6 /2" ], @@ -2675,26 +1687,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2702,28 +1701,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2738,7 +1724,7 @@ ] }, "fcom st0, st7": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd8 11b 0xd7 /2" ], @@ -2754,26 +1740,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2781,28 +1754,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -2817,7 +1777,7 @@ ] }, "fcomp st0, st0": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xd8 /3" ], @@ -2834,26 +1794,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2861,28 +1808,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -2904,7 +1838,7 @@ ] }, "fcomp st0, st1": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xd9 /3" ], @@ -2921,26 +1855,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -2948,28 +1869,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -2991,7 +1899,7 @@ ] }, "fcomp st0, st2": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xda /3" ], @@ -3007,26 +1915,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3034,28 +1929,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3078,7 +1960,7 @@ ] }, "fcomp st0, st3": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdb /3" ], @@ -3094,26 +1976,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3121,28 +1990,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3165,7 +2021,7 @@ ] }, "fcomp st0, st4": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdc /3" ], @@ -3181,26 +2037,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3208,28 +2051,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3252,7 +2082,7 @@ ] }, "fcomp st0, st5": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdd /3" ], @@ -3268,26 +2098,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3295,28 +2112,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3339,7 +2143,7 @@ ] }, "fcomp st0, st6": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xde /3" ], @@ -3355,26 +2159,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3382,28 +2173,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3426,7 +2204,7 @@ ] }, "fcomp st0, st7": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xd8 11b 0xdf /3" ], @@ -3442,26 +2220,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3469,28 +2234,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -3513,7 +2265,7 @@ ] }, "fsub st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe0 /4" ], @@ -3529,26 +2281,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -3556,28 +2295,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3586,7 +2312,7 @@ ] }, "fsub st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe1 /4" ], @@ -3602,26 +2328,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3629,28 +2342,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3659,7 +2359,7 @@ ] }, "fsub st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe2 /4" ], @@ -3675,26 +2375,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3702,28 +2389,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3732,7 +2406,7 @@ ] }, "fsub st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe3 /4" ], @@ -3748,26 +2422,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3775,28 +2436,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3805,7 +2453,7 @@ ] }, "fsub st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe4 /4" ], @@ -3821,26 +2469,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3848,28 +2483,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3878,7 +2500,7 @@ ] }, "fsub st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe5 /4" ], @@ -3894,26 +2516,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3921,28 +2530,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -3951,7 +2547,7 @@ ] }, "fsub st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe6 /4" ], @@ -3967,26 +2563,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -3994,28 +2577,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4024,7 +2594,7 @@ ] }, "fsub st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe7 /4" ], @@ -4040,26 +2610,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4067,28 +2624,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4097,7 +2641,7 @@ ] }, "fsubr st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe8 /5" ], @@ -4113,26 +2657,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4140,28 +2671,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4170,7 +2688,7 @@ ] }, "fsubr st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xe9 /5" ], @@ -4186,26 +2704,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4213,28 +2718,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4243,7 +2735,7 @@ ] }, "fsubr st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xea /5" ], @@ -4259,26 +2751,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4286,28 +2765,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4316,7 +2782,7 @@ ] }, "fsubr st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xeb /5" ], @@ -4332,26 +2798,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4359,28 +2812,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4389,7 +2829,7 @@ ] }, "fsubr st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xec /5" ], @@ -4405,26 +2845,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4432,28 +2859,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4462,7 +2876,7 @@ ] }, "fsubr st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xed /5" ], @@ -4478,26 +2892,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4505,28 +2906,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4535,7 +2923,7 @@ ] }, "fsubr st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xee /5" ], @@ -4551,26 +2939,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4578,28 +2953,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4608,7 +2970,7 @@ ] }, "fsubr st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xef /5" ], @@ -4624,26 +2986,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4651,28 +3000,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4681,7 +3017,7 @@ ] }, "fdiv st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf0 /6" ], @@ -4697,26 +3033,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -4724,28 +3047,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4754,7 +3064,7 @@ ] }, "fdiv st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf1 /6" ], @@ -4770,26 +3080,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4797,28 +3094,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4827,7 +3111,7 @@ ] }, "fdiv st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf2 /6" ], @@ -4843,26 +3127,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4870,28 +3141,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4900,7 +3158,7 @@ ] }, "fdiv st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf3 /6" ], @@ -4916,26 +3174,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -4943,28 +3188,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -4973,7 +3205,7 @@ ] }, "fdiv st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf4 /6" ], @@ -4989,26 +3221,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5016,28 +3235,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5046,7 +3252,7 @@ ] }, "fdiv st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf5 /6" ], @@ -5062,26 +3268,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5089,28 +3282,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5119,7 +3299,7 @@ ] }, "fdiv st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf6 /6" ], @@ -5135,26 +3315,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5162,28 +3329,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5192,7 +3346,7 @@ ] }, "fdiv st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf7 /6" ], @@ -5208,26 +3362,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5235,28 +3376,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5265,7 +3393,7 @@ ] }, "fdivr st0, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf8 /7" ], @@ -5281,26 +3409,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -5308,28 +3423,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5338,7 +3440,7 @@ ] }, "fdivr st0, st1": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xf9 /7" ], @@ -5354,26 +3456,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5381,28 +3470,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5411,7 +3487,7 @@ ] }, "fdivr st0, st2": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfa /7" ], @@ -5427,26 +3503,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5454,28 +3517,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5484,7 +3534,7 @@ ] }, "fdivr st0, st3": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfb /7" ], @@ -5500,26 +3550,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5527,28 +3564,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5557,7 +3581,7 @@ ] }, "fdivr st0, st4": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfc /7" ], @@ -5573,26 +3597,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5600,28 +3611,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5630,7 +3628,7 @@ ] }, "fdivr st0, st5": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfd /7" ], @@ -5646,26 +3644,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5673,28 +3658,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5703,7 +3675,7 @@ ] }, "fdivr st0, st6": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xfe /7" ], @@ -5719,26 +3691,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5746,28 +3705,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5776,7 +3722,7 @@ ] }, "fdivr st0, st7": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd8 11b 0xff /7" ], @@ -5792,26 +3738,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -5819,28 +3752,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5849,7 +3769,7 @@ ] }, "fld dword [rax]": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd9 !11b /0" ], @@ -5860,52 +3780,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "fmov s0, s2", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1160]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -5922,7 +3816,7 @@ ] }, "fst dword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xd9 !11b /2" ], @@ -5934,59 +3828,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4]" ] }, "fstp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xd9 !11b /3" ], @@ -5998,53 +3866,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1176]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", "ldrb w21, [x28, #1026]", @@ -6585,7 +4427,7 @@ ] }, "ftst": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 42, "Comment": [ "0xd9 11b 0xe4 /4" ], @@ -6599,26 +4441,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -6626,28 +4455,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -6860,7 +4676,7 @@ ] }, "f2xm1": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xf0 /6" ], @@ -6872,53 +4688,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1328]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -6927,7 +4717,7 @@ ] }, "fyl2x": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd9 11b 0xf1 /6" ], @@ -6949,26 +4739,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -6976,28 +4753,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1432]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7006,7 +4770,7 @@ ] }, "fptan": { - "ExpectedInstructionCount": 75, + "ExpectedInstructionCount": 49, "Comment": [ "0xd9 11b 0xf2 /6" ], @@ -7026,53 +4790,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1336]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7089,7 +4827,7 @@ ] }, "fpatan": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xd9 11b 0xf3 /6" ], @@ -7111,26 +4849,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -7138,28 +4863,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1440]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7168,7 +4880,7 @@ ] }, "fxtract": { - "ExpectedInstructionCount": 123, + "ExpectedInstructionCount": 71, "Comment": [ "0xd9 11b 0xf4 /6" ], @@ -7188,53 +4900,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1368]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", @@ -7242,53 +4928,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1376]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7299,7 +4959,7 @@ ] }, "fprem1": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xd9 11b 0xf5 /6" ], @@ -7315,26 +4975,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7342,28 +4989,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1448]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7398,7 +5032,7 @@ ] }, "fprem": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xd9 11b 0xf8 /7" ], @@ -7414,26 +5048,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7441,28 +5062,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1456]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7473,7 +5081,7 @@ ] }, "fyl2xp1": { - "ExpectedInstructionCount": 131, + "ExpectedInstructionCount": 79, "Comment": [ "0xd9 11b 0xf9 /7" ], @@ -7499,26 +5107,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7526,28 +5121,15 @@ "umov w4, v4.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7555,26 +5137,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7582,28 +5151,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1432]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7612,7 +5168,7 @@ ] }, "fsqrt": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xfa /7" ], @@ -7624,53 +5180,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1344]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7679,7 +5209,7 @@ ] }, "fsincos": { - "ExpectedInstructionCount": 125, + "ExpectedInstructionCount": 73, "Comment": [ "0xd9 11b 0xfb /7" ], @@ -7699,53 +5229,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1352]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", @@ -7753,53 +5257,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1360]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7812,7 +5290,7 @@ ] }, "frndint": { - "ExpectedInstructionCount": 59, + "ExpectedInstructionCount": 33, "Comment": [ "0xd9 11b 0xfc /7" ], @@ -7824,53 +5302,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1320]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7879,7 +5331,7 @@ ] }, "fscale": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xd9 11b 0xfd /7" ], @@ -7895,26 +5347,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -7922,28 +5361,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1464]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7952,7 +5378,7 @@ ] }, "fsin": { - "ExpectedInstructionCount": 61, + "ExpectedInstructionCount": 35, "Comment": [ "0xd9 11b 0xfe /7" ], @@ -7964,53 +5390,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1352]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8021,7 +5421,7 @@ ] }, "fcos": { - "ExpectedInstructionCount": 61, + "ExpectedInstructionCount": 35, "Comment": [ "0xd9 11b 0xff /7" ], @@ -8033,53 +5433,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1360]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8090,7 +5464,7 @@ ] }, "fiadd dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /0" ], @@ -8101,52 +5475,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8156,26 +5504,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8183,28 +5518,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8213,7 +5535,7 @@ ] }, "fimul dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /1" ], @@ -8224,52 +5546,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8279,26 +5575,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8306,28 +5589,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8336,7 +5606,7 @@ ] }, "ficom dword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xda !11b /2" ], @@ -8347,52 +5617,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8402,26 +5646,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8429,28 +5660,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -8465,7 +5683,7 @@ ] }, "ficomp dword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xda !11b /3" ], @@ -8476,52 +5694,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8531,26 +5723,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8558,28 +5737,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -8602,7 +5768,7 @@ ] }, "fisub dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /4" ], @@ -8613,52 +5779,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8668,26 +5808,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8695,28 +5822,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8725,7 +5839,7 @@ ] }, "fisubr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /5" ], @@ -8736,52 +5850,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8791,26 +5879,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -8818,28 +5893,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8848,7 +5910,7 @@ ] }, "fidiv dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /6" ], @@ -8859,52 +5921,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8914,26 +5950,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -8941,28 +5964,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -8971,7 +5981,7 @@ ] }, "fidivr dword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xda !11b /7" ], @@ -8982,52 +5992,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1312]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -9037,26 +6021,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -9064,28 +6035,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -9798,7 +6756,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 84, + "ExpectedInstructionCount": 58, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -9815,26 +6773,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -9842,28 +6787,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -9933,7 +6865,7 @@ ] }, "fisttp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdb !11b /1" ], @@ -9945,53 +6877,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1224]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w21, w0", "str w21, [x4]", "ldrb w21, [x28, #1026]", @@ -10005,7 +6911,7 @@ ] }, "fist dword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdb !11b /2" ], @@ -10017,59 +6923,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1200]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w20, w0", "str w20, [x4]" ] }, "fistp dword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /7" ], @@ -10081,53 +6961,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1200]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov w21, w0", "str w21, [x4]", "ldrb w21, [x28, #1026]", @@ -10903,7 +7757,7 @@ ] }, "fucomi st0, st0": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xe8 /5" ], @@ -10919,26 +7773,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -10946,28 +7787,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -10981,7 +7809,7 @@ ] }, "fucomi st0, st1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xe9 /5" ], @@ -10997,26 +7825,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11024,28 +7839,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11059,7 +7861,7 @@ ] }, "fucomi st0, st2": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xea /5" ], @@ -11075,26 +7877,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11102,28 +7891,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11137,7 +7913,7 @@ ] }, "fucomi st0, st3": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xeb /5" ], @@ -11153,26 +7929,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11180,28 +7943,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11215,7 +7965,7 @@ ] }, "fucomi st0, st4": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xec /5" ], @@ -11231,26 +7981,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11258,28 +7995,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11293,7 +8017,7 @@ ] }, "fucomi st0, st5": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xed /5" ], @@ -11309,26 +8033,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11336,28 +8047,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11371,7 +8069,7 @@ ] }, "fucomi st0, st6": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xee /5" ], @@ -11387,26 +8085,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11414,28 +8099,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11449,7 +8121,7 @@ ] }, "fucomi st0, st7": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xef /5" ], @@ -11465,26 +8137,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11492,28 +8151,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11527,7 +8173,7 @@ ] }, "fcomi st0, st0": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf0 /6" ], @@ -11543,26 +8189,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11570,28 +8203,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11605,7 +8225,7 @@ ] }, "fcomi st0, st1": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf1 /6" ], @@ -11621,26 +8241,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11648,28 +8255,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11683,7 +8277,7 @@ ] }, "fcomi st0, st2": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf2 /6" ], @@ -11699,26 +8293,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11726,28 +8307,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11761,7 +8329,7 @@ ] }, "fcomi st0, st3": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf3 /6" ], @@ -11777,26 +8345,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11804,28 +8359,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11839,7 +8381,7 @@ ] }, "fcomi st0, st4": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf4 /6" ], @@ -11855,26 +8397,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11882,28 +8411,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11917,7 +8433,7 @@ ] }, "fcomi st0, st5": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf5 /6" ], @@ -11933,26 +8449,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -11960,28 +8463,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -11995,7 +8485,7 @@ ] }, "fcomi st0, st6": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf6 /6" ], @@ -12011,26 +8501,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12038,28 +8515,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12073,7 +8537,7 @@ ] }, "fcomi st0, st7": { - "ExpectedInstructionCount": 70, + "ExpectedInstructionCount": 44, "Comment": [ "0xdb 11b 0xf7 /6" ], @@ -12089,26 +8553,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12116,28 +8567,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12151,7 +8589,7 @@ ] }, "fadd qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /0" ], @@ -12162,52 +8600,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12217,26 +8629,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12244,28 +8643,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12274,7 +8660,7 @@ ] }, "fmul qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /1" ], @@ -12285,52 +8671,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12340,26 +8700,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12367,28 +8714,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12397,7 +8731,7 @@ ] }, "fcom qword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xdc !11b /2" ], @@ -12408,52 +8742,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12463,26 +8771,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12490,28 +8785,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -12526,7 +8808,7 @@ ] }, "fcomp qword [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xdc !11b /3" ], @@ -12537,52 +8819,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12592,26 +8848,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12619,28 +8862,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -12663,7 +8893,7 @@ ] }, "fsub qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /4" ], @@ -12674,52 +8904,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12729,26 +8933,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -12756,28 +8947,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12786,7 +8964,7 @@ ] }, "fsubr qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /5" ], @@ -12797,52 +8975,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12852,26 +9004,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -12879,28 +9018,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12909,7 +9035,7 @@ ] }, "fdiv qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /6" ], @@ -12920,52 +9046,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -12975,26 +9075,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13002,28 +9089,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13032,7 +9106,7 @@ ] }, "fdivr qword [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xdc !11b /7" ], @@ -13043,52 +9117,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13098,26 +9146,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -13125,28 +9160,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13155,7 +9177,7 @@ ] }, "db 0xdc, 0xc0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fadd st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -13173,26 +9195,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13200,28 +9209,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13230,7 +9226,7 @@ ] }, "fadd st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc1 /0" ], @@ -13246,26 +9242,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13273,28 +9256,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13303,7 +9273,7 @@ ] }, "fadd st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc2 /0" ], @@ -13319,26 +9289,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13346,28 +9303,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13376,7 +9320,7 @@ ] }, "fadd st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc3 /0" ], @@ -13392,26 +9336,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13419,28 +9350,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13449,7 +9367,7 @@ ] }, "fadd st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc4 /0" ], @@ -13465,26 +9383,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13492,28 +9397,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13522,7 +9414,7 @@ ] }, "fadd st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc5 /0" ], @@ -13538,26 +9430,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13565,28 +9444,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13595,7 +9461,7 @@ ] }, "fadd st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc6 /0" ], @@ -13611,26 +9477,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13638,28 +9491,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13668,7 +9508,7 @@ ] }, "fadd st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc7 /0" ], @@ -13684,26 +9524,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13711,28 +9538,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13741,7 +9555,7 @@ ] }, "db 0xdc, 0xc8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fmul st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -13759,26 +9573,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13786,28 +9587,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13816,7 +9604,7 @@ ] }, "fmul st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xc9 /1" ], @@ -13832,26 +9620,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13859,28 +9634,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13889,7 +9651,7 @@ ] }, "fmul st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xca /1" ], @@ -13905,26 +9667,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -13932,28 +9681,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -13962,7 +9698,7 @@ ] }, "fmul st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcb /1" ], @@ -13978,26 +9714,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14005,28 +9728,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14035,7 +9745,7 @@ ] }, "fmul st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcc /1" ], @@ -14051,26 +9761,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14078,28 +9775,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14108,7 +9792,7 @@ ] }, "fmul st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcd /1" ], @@ -14124,26 +9808,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14151,28 +9822,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14181,7 +9839,7 @@ ] }, "fmul st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xce /1" ], @@ -14197,26 +9855,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14224,28 +9869,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14254,7 +9886,7 @@ ] }, "fmul st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xcf /1" ], @@ -14270,26 +9902,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14297,28 +9916,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14327,7 +9933,7 @@ ] }, "db 0xdc, 0xe0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fsubr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14345,26 +9951,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14372,28 +9965,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14402,7 +9982,7 @@ ] }, "fsubr st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe1 /4" ], @@ -14418,26 +9998,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14445,28 +10012,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14475,7 +10029,7 @@ ] }, "fsubr st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe2 /4" ], @@ -14491,26 +10045,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14518,28 +10059,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14548,7 +10076,7 @@ ] }, "fsubr st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe3 /4" ], @@ -14564,26 +10092,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14591,28 +10106,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14621,7 +10123,7 @@ ] }, "fsubr st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe4 /4" ], @@ -14637,26 +10139,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14664,28 +10153,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14694,7 +10170,7 @@ ] }, "fsubr st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe5 /4" ], @@ -14710,26 +10186,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14737,28 +10200,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14767,7 +10217,7 @@ ] }, "fsubr st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe6 /4" ], @@ -14783,26 +10233,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14810,28 +10247,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14840,7 +10264,7 @@ ] }, "fsubr st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe7 /4" ], @@ -14856,26 +10280,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -14883,28 +10294,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14913,7 +10311,7 @@ ] }, "db 0xdc, 0xe8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fsub st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -14931,26 +10329,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -14958,28 +10343,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -14988,7 +10360,7 @@ ] }, "fsub st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xe9 /5" ], @@ -15004,26 +10376,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15031,28 +10390,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15061,7 +10407,7 @@ ] }, "fsub st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xea /5" ], @@ -15077,26 +10423,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15104,28 +10437,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15134,7 +10454,7 @@ ] }, "fsub st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xeb /5" ], @@ -15150,26 +10470,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15177,28 +10484,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15207,7 +10501,7 @@ ] }, "fsub st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xec /5" ], @@ -15223,26 +10517,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15250,28 +10531,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15280,7 +10548,7 @@ ] }, "fsub st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xed /5" ], @@ -15296,26 +10564,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15323,28 +10578,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15353,7 +10595,7 @@ ] }, "fsub st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xee /5" ], @@ -15369,26 +10611,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15396,28 +10625,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15426,7 +10642,7 @@ ] }, "fsub st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xef /5" ], @@ -15442,26 +10658,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -15469,28 +10672,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15499,7 +10689,7 @@ ] }, "db 0xdc, 0xf0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fdivr st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -15517,26 +10707,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15544,28 +10721,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15574,7 +10738,7 @@ ] }, "fdivr st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf1 /6" ], @@ -15590,26 +10754,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15617,28 +10768,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15647,7 +10785,7 @@ ] }, "fdivr st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf2 /6" ], @@ -15663,26 +10801,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15690,28 +10815,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15720,7 +10832,7 @@ ] }, "fdivr st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf3 /6" ], @@ -15736,26 +10848,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15763,28 +10862,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15793,7 +10879,7 @@ ] }, "fdivr st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf4 /6" ], @@ -15809,26 +10895,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15836,28 +10909,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15866,7 +10926,7 @@ ] }, "fdivr st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf5 /6" ], @@ -15882,26 +10942,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15909,28 +10956,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -15939,7 +10973,7 @@ ] }, "fdivr st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf6 /6" ], @@ -15955,26 +10989,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -15982,28 +11003,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16012,7 +11020,7 @@ ] }, "fdivr st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf7 /6" ], @@ -16028,26 +11036,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -16055,28 +11050,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16085,7 +11067,7 @@ ] }, "db 0xdc, 0xf8": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "fdiv st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -16103,26 +11085,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16130,28 +11099,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16160,7 +11116,7 @@ ] }, "fdiv st1, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xf9 /7" ], @@ -16176,26 +11132,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16203,28 +11146,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16233,7 +11163,7 @@ ] }, "fdiv st2, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfa /7" ], @@ -16249,26 +11179,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16276,28 +11193,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16306,7 +11210,7 @@ ] }, "fdiv st3, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfb /7" ], @@ -16322,26 +11226,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16349,28 +11240,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16379,7 +11257,7 @@ ] }, "fdiv st4, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfc /7" ], @@ -16395,26 +11273,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16422,28 +11287,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16452,7 +11304,7 @@ ] }, "fdiv st5, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfd /7" ], @@ -16468,26 +11320,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16495,28 +11334,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16525,7 +11351,7 @@ ] }, "fdiv st6, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xfe /7" ], @@ -16541,26 +11367,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16568,28 +11381,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16598,7 +11398,7 @@ ] }, "fdiv st7, st0": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdc 11b 0xff /7" ], @@ -16614,26 +11414,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -16641,28 +11428,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16671,7 +11445,7 @@ ] }, "fld qword [rax]": { - "ExpectedInstructionCount": 65, + "ExpectedInstructionCount": 39, "Comment": [ "0xdd !11b /0" ], @@ -16682,52 +11456,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -16744,7 +11492,7 @@ ] }, "fisttp qword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdd !11b /1" ], @@ -16756,53 +11504,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1232]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "str x21, [x4]", "ldrb w21, [x28, #1026]", @@ -16816,7 +11538,7 @@ ] }, "fst qword [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdd !11b /2" ], @@ -16828,59 +11550,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x4]" ] }, "fstp qword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdd !11b /3" ], @@ -16892,53 +11588,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x4]", "ldrb w21, [x28, #1026]", @@ -17646,7 +12316,7 @@ ] }, "fucom st0": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe0 /4" ], @@ -17663,26 +12333,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17690,28 +12347,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x22, x20, #1, #1", "ubfx x23, x20, #0, #1", @@ -17725,7 +12369,7 @@ ] }, "fucom st1": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe1 /4" ], @@ -17741,26 +12385,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17768,28 +12399,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17804,7 +12422,7 @@ ] }, "fucom st2": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe2 /4" ], @@ -17820,26 +12438,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17847,28 +12452,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17883,7 +12475,7 @@ ] }, "fucom st3": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe3 /4" ], @@ -17899,26 +12491,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -17926,28 +12505,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -17962,7 +12528,7 @@ ] }, "fucom st4": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe4 /4" ], @@ -17978,26 +12544,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18005,28 +12558,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18041,7 +12581,7 @@ ] }, "fucom st5": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe5 /4" ], @@ -18057,26 +12597,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18084,28 +12611,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18120,7 +12634,7 @@ ] }, "fucom st6": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe6 /4" ], @@ -18136,26 +12650,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18163,28 +12664,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18199,7 +12687,7 @@ ] }, "fucom st7": { - "ExpectedInstructionCount": 71, + "ExpectedInstructionCount": 45, "Comment": [ "0xdd 11b 0xe7 /4" ], @@ -18215,26 +12703,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18242,28 +12717,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -18278,7 +12740,7 @@ ] }, "fucomp st0": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xe8 /5" ], @@ -18295,26 +12757,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18322,28 +12771,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -18365,7 +12801,7 @@ ] }, "fucomp st1": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xe9 /5" ], @@ -18382,26 +12818,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18409,28 +12832,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -18452,7 +12862,7 @@ ] }, "fucomp st2": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xea /5" ], @@ -18468,26 +12878,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18495,28 +12892,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18539,7 +12923,7 @@ ] }, "fucomp st3": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xeb /5" ], @@ -18555,26 +12939,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18582,28 +12953,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18626,7 +12984,7 @@ ] }, "fucomp st4": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xec /5" ], @@ -18642,26 +13000,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18669,28 +13014,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18713,7 +13045,7 @@ ] }, "fucomp st5": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xed /5" ], @@ -18729,26 +13061,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18756,28 +13075,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18800,7 +13106,7 @@ ] }, "fucomp st6": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xee /5" ], @@ -18816,26 +13122,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18843,28 +13136,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18887,7 +13167,7 @@ ] }, "fucomp st7": { - "ExpectedInstructionCount": 79, + "ExpectedInstructionCount": 53, "Comment": [ "0xdd 11b 0xef /5" ], @@ -18903,26 +13183,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -18930,28 +13197,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -18974,7 +13228,7 @@ ] }, "fiadd word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /0" ], @@ -18985,52 +13239,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19040,26 +13268,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19067,28 +13282,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19097,7 +13299,7 @@ ] }, "fimul word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /1" ], @@ -19108,52 +13310,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19163,26 +13339,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19190,28 +13353,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19220,7 +13370,7 @@ ] }, "ficom word [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xde !11b /2" ], @@ -19231,52 +13381,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19286,26 +13410,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19313,28 +13424,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x20, x0", "ubfx x21, x20, #1, #1", "ubfx x22, x20, #0, #1", @@ -19349,7 +13447,7 @@ ] }, "ficomp word [rax]": { - "ExpectedInstructionCount": 129, + "ExpectedInstructionCount": 77, "Comment": [ "0xde !11b /3" ], @@ -19360,52 +13458,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19415,26 +13487,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19442,28 +13501,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -19486,7 +13532,7 @@ ] }, "fisub word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /4" ], @@ -19497,52 +13543,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19552,26 +13572,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19579,28 +13586,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19609,7 +13603,7 @@ ] }, "fisubr word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /5" ], @@ -19620,52 +13614,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19675,26 +13643,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -19702,28 +13657,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19732,7 +13674,7 @@ ] }, "fidiv word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /6" ], @@ -19743,52 +13685,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19798,26 +13714,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -19825,28 +13728,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19855,7 +13745,7 @@ ] }, "fidivr word [rax]": { - "ExpectedInstructionCount": 115, + "ExpectedInstructionCount": 63, "Comment": [ "0xde !11b /7" ], @@ -19866,52 +13756,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "sxth w1, w21", "ldrh w0, [x28, #1024]", "ldr x2, [x28, #1304]", "blr x2", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19921,26 +13785,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -19948,28 +13799,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -19978,7 +13816,7 @@ ] }, "faddp st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xd8 11b 0xc0 /0" ], @@ -19994,26 +13832,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20021,28 +13846,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20059,7 +13871,7 @@ ] }, "faddp st1": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc1 /0" ], @@ -20076,26 +13888,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20103,28 +13902,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20140,7 +13926,7 @@ ] }, "faddp st2": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc2 /0" ], @@ -20156,26 +13942,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20183,28 +13956,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20221,7 +13981,7 @@ ] }, "faddp st3": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc3 /0" ], @@ -20237,26 +13997,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20264,28 +14011,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20302,7 +14036,7 @@ ] }, "faddp st4": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc4 /0" ], @@ -20318,26 +14052,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20345,28 +14066,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20383,7 +14091,7 @@ ] }, "faddp st5": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc5 /0" ], @@ -20399,26 +14107,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20426,28 +14121,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20464,7 +14146,7 @@ ] }, "faddp st6": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc6 /0" ], @@ -20480,26 +14162,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20507,28 +14176,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20545,7 +14201,7 @@ ] }, "faddp st7": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc7 /0" ], @@ -20561,26 +14217,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20588,28 +14231,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1400]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20626,7 +14256,7 @@ ] }, "fmulp st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc8 /1" ], @@ -20642,26 +14272,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20669,28 +14286,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20707,7 +14311,7 @@ ] }, "fmulp st1": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xc9 /1" ], @@ -20724,26 +14328,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20751,28 +14342,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20788,7 +14366,7 @@ ] }, "fmulp st2": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xca /1" ], @@ -20804,26 +14382,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20831,28 +14396,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20869,7 +14421,7 @@ ] }, "fmulp st3": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcb /1" ], @@ -20885,26 +14437,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20912,28 +14451,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -20950,7 +14476,7 @@ ] }, "fmulp st4": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcc /1" ], @@ -20966,26 +14492,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -20993,28 +14506,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21031,7 +14531,7 @@ ] }, "fmulp st5": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcd /1" ], @@ -21047,26 +14547,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21074,28 +14561,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21112,7 +14586,7 @@ ] }, "fmulp st6": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xce /1" ], @@ -21128,26 +14602,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21155,28 +14616,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21193,7 +14641,7 @@ ] }, "fmulp st7": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xcf /1" ], @@ -21209,26 +14657,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21236,28 +14671,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1416]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21274,7 +14696,7 @@ ] }, "fcompp": { - "ExpectedInstructionCount": 84, + "ExpectedInstructionCount": 58, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -21291,26 +14713,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21318,28 +14727,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -21366,7 +14762,7 @@ ] }, "db 0xde, 0xe0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fsubrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -21384,26 +14780,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21411,28 +14794,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21449,7 +14819,7 @@ ] }, "fsubrp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe1 /4" ], @@ -21466,26 +14836,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21493,28 +14850,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21530,7 +14874,7 @@ ] }, "fsubrp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe2 /4" ], @@ -21546,26 +14890,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21573,28 +14904,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21611,7 +14929,7 @@ ] }, "fsubrp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe3 /4" ], @@ -21627,26 +14945,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21654,28 +14959,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21692,7 +14984,7 @@ ] }, "fsubrp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe4 /4" ], @@ -21708,26 +15000,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21735,28 +15014,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21773,7 +15039,7 @@ ] }, "fsubrp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe5 /4" ], @@ -21789,26 +15055,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21816,28 +15069,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21854,7 +15094,7 @@ ] }, "fsubrp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe6 /4" ], @@ -21870,26 +15110,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21897,28 +15124,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -21935,7 +15149,7 @@ ] }, "fsubrp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe7 /4" ], @@ -21951,26 +15165,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -21978,28 +15179,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22016,7 +15204,7 @@ ] }, "db 0xde, 0xe8": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fsubp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -22034,26 +15222,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22061,28 +15236,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22099,7 +15261,7 @@ ] }, "fsubp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xe9 /5" ], @@ -22116,26 +15278,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22143,28 +15292,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22180,7 +15316,7 @@ ] }, "fsubp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xea /5" ], @@ -22196,26 +15332,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22223,28 +15346,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22261,7 +15371,7 @@ ] }, "fsubp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xeb /5" ], @@ -22277,26 +15387,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22304,28 +15401,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22342,7 +15426,7 @@ ] }, "fsubp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xec /5" ], @@ -22358,26 +15442,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22385,28 +15456,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22423,7 +15481,7 @@ ] }, "fsubp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xed /5" ], @@ -22439,26 +15497,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22466,28 +15511,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22504,7 +15536,7 @@ ] }, "fsubp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xee /5" ], @@ -22520,26 +15552,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22547,28 +15566,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22585,7 +15591,7 @@ ] }, "fsubp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xef /5" ], @@ -22601,26 +15607,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -22628,28 +15621,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1408]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22666,7 +15646,7 @@ ] }, "db 0xde, 0xf0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fdivrp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -22684,26 +15664,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22711,28 +15678,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22749,7 +15703,7 @@ ] }, "fdivrp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf1 /6" ], @@ -22766,26 +15720,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22793,28 +15734,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22830,7 +15758,7 @@ ] }, "fdivrp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf2 /6" ], @@ -22846,26 +15774,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22873,28 +15788,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22911,7 +15813,7 @@ ] }, "fdivrp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf3 /6" ], @@ -22927,26 +15829,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -22954,28 +15843,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -22992,7 +15868,7 @@ ] }, "fdivrp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf4 /6" ], @@ -23008,26 +15884,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23035,28 +15898,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23073,7 +15923,7 @@ ] }, "fdivrp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf5 /6" ], @@ -23089,26 +15939,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23116,28 +15953,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23154,7 +15978,7 @@ ] }, "fdivrp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf6 /6" ], @@ -23170,26 +15994,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23197,28 +16008,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23235,7 +16033,7 @@ ] }, "fdivrp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf7 /6" ], @@ -23251,26 +16049,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -23278,28 +16063,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23316,7 +16088,7 @@ ] }, "db 0xde, 0xf8": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "fdivp st0, st0", "Needs manual encoding since otherwise nasm will emit the 0xd8 variant.", @@ -23334,26 +16106,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23361,28 +16120,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23399,7 +16145,7 @@ ] }, "fdivp st1, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xf9 /7" ], @@ -23416,26 +16162,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23443,28 +16176,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23480,7 +16200,7 @@ ] }, "fdivp st2, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfa /7" ], @@ -23496,26 +16216,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23523,28 +16230,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23561,7 +16255,7 @@ ] }, "fdivp st3, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfb /7" ], @@ -23577,26 +16271,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23604,28 +16285,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23642,7 +16310,7 @@ ] }, "fdivp st4, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfc /7" ], @@ -23658,26 +16326,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23685,28 +16340,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23723,7 +16365,7 @@ ] }, "fdivp st5, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfd /7" ], @@ -23739,26 +16381,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23766,28 +16395,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23804,7 +16420,7 @@ ] }, "fdivp st6, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xfe /7" ], @@ -23820,26 +16436,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23847,28 +16450,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -23885,7 +16475,7 @@ ] }, "fdivp st7, st0": { - "ExpectedInstructionCount": 73, + "ExpectedInstructionCount": 47, "Comment": [ "0xde 11b 0xff /7" ], @@ -23901,26 +16491,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", @@ -23928,28 +16505,15 @@ "umov w4, v3.h[4]", "ldr x5, [x28, #1424]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -24009,7 +16573,7 @@ ] }, "fisttp word [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /1" ], @@ -24021,53 +16585,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1216]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x21, w0", "strh w21, [x4]", "ldrb w21, [x28, #1026]", @@ -24081,7 +16619,7 @@ ] }, "fist word [rax]": { - "ExpectedInstructionCount": 56, + "ExpectedInstructionCount": 30, "Comment": [ "0xdf !11b /2" ], @@ -24093,59 +16631,33 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1192]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x20, w0", "strh w20, [x4]" ] }, "fistp word [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdf !11b /3" ], @@ -24157,53 +16669,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1192]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "sxth x21, w0", "strh w21, [x4]", "ldrb w21, [x28, #1026]", @@ -24217,7 +16703,7 @@ ] }, "fbld tword [rax]": { - "ExpectedInstructionCount": 66, + "ExpectedInstructionCount": 40, "Comment": [ "0xdf !11b /4" ], @@ -24236,53 +16722,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1392]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -24291,7 +16751,7 @@ ] }, "fbstp tword [rax]": { - "ExpectedInstructionCount": 68, + "ExpectedInstructionCount": 42, "Comment": [ "0xdf !11b /6" ], @@ -24303,53 +16763,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1384]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -24483,7 +16917,7 @@ ] }, "fucomip st0": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xe8 /5" ], @@ -24499,26 +16933,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24526,28 +16947,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24569,7 +16977,7 @@ ] }, "fucomip st1": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xe9 /5" ], @@ -24586,26 +16994,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24613,28 +17008,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -24655,7 +17037,7 @@ ] }, "fucomip st2": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xea /5" ], @@ -24671,26 +17053,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24698,28 +17067,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24741,7 +17097,7 @@ ] }, "fucomip st3": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xeb /5" ], @@ -24757,26 +17113,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24784,28 +17127,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24827,7 +17157,7 @@ ] }, "fucomip st4": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xec /5" ], @@ -24843,26 +17173,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24870,28 +17187,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24913,7 +17217,7 @@ ] }, "fucomip st5": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xed /5" ], @@ -24929,26 +17233,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -24956,28 +17247,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -24999,7 +17277,7 @@ ] }, "fucomip st6": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xee /5" ], @@ -25015,26 +17293,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25042,28 +17307,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25085,7 +17337,7 @@ ] }, "fucomip st7": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xef /5" ], @@ -25101,26 +17353,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25128,28 +17367,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25171,7 +17397,7 @@ ] }, "fcomip st0": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf0 /6" ], @@ -25187,26 +17413,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25214,28 +17427,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25257,7 +17457,7 @@ ] }, "fcomip st1": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf1 /6" ], @@ -25274,26 +17474,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25301,28 +17488,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x22, x0", "ubfx x23, x22, #1, #1", "ubfx x24, x22, #0, #1", @@ -25343,7 +17517,7 @@ ] }, "fcomip st2": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf2 /6" ], @@ -25359,26 +17533,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25386,28 +17547,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25429,7 +17577,7 @@ ] }, "fcomip st3": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf3 /6" ], @@ -25445,26 +17593,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25472,28 +17607,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25515,7 +17637,7 @@ ] }, "fcomip st4": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf4 /6" ], @@ -25531,26 +17653,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25558,28 +17667,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25601,7 +17697,7 @@ ] }, "fcomip st5": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf5 /6" ], @@ -25617,26 +17713,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25644,28 +17727,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25687,7 +17757,7 @@ ] }, "fcomip st6": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf6 /6" ], @@ -25703,26 +17773,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25730,28 +17787,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", @@ -25773,7 +17817,7 @@ ] }, "fcomip st7": { - "ExpectedInstructionCount": 78, + "ExpectedInstructionCount": 52, "Comment": [ "0xdf 11b 0xf7 /6" ], @@ -25789,26 +17833,13 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", @@ -25816,28 +17847,15 @@ "umov w4, v2.h[4]", "ldr x5, [x28, #1296]", "blr x5", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov x21, x0", "ubfx x22, x21, #1, #1", "ubfx x23, x21, #0, #1", diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index 3b11084fb..c2b7bb07a 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -4208,7 +4208,7 @@ ] }, "fld tword [rax]": { - "ExpectedInstructionCount": 64, + "ExpectedInstructionCount": 38, "Comment": [ "0xdb !11b /5" ], @@ -4219,53 +4219,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "mov w21, #0x1", "sub w20, w20, #0x1 (1)", @@ -4280,7 +4254,7 @@ ] }, "fstp tword [rax]": { - "ExpectedInstructionCount": 67, + "ExpectedInstructionCount": 41, "Comment": [ "0xdb !11b /7" ], @@ -4292,52 +4266,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -6575,7 +6523,7 @@ ] }, "frstor [rax]": { - "ExpectedInstructionCount": 533, + "ExpectedInstructionCount": 325, "Comment": [ "0xdd !11b /4" ], @@ -6648,53 +6596,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6707,53 +6629,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6766,53 +6662,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6825,53 +6695,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6884,53 +6728,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -6943,53 +6761,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v3.d[0]", "umov w2, v3.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #768]", @@ -7002,53 +6794,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d2, [x0, #768]", @@ -7062,53 +6828,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d2, [x0, #768]", @@ -7116,7 +6856,7 @@ ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 543, + "ExpectedInstructionCount": 335, "Comment": [ "0xdd !11b /6" ], @@ -7190,52 +6930,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7249,52 +6963,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7308,52 +6996,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7367,52 +7029,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7426,52 +7062,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7485,52 +7095,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7544,52 +7128,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -7603,52 +7161,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -10133,7 +9665,7 @@ ] }, "fbld tword [rax]": { - "ExpectedInstructionCount": 118, + "ExpectedInstructionCount": 66, "Comment": [ "0xdf !11b /4" ], @@ -10152,53 +9684,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1392]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -10206,60 +9712,34 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1184]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x20, lsl #4", "str d2, [x0, #768]" ] }, "fbstp tword [rax]": { - "ExpectedInstructionCount": 121, + "ExpectedInstructionCount": 69, "Comment": [ "0xdf !11b /6" ], @@ -10271,52 +9751,26 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "mov v0.8b, v2.8b", "ldrh w0, [x28, #1024]", "ldr x1, [x28, #1168]", "blr x1", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", @@ -10324,53 +9778,27 @@ "str w0, [x28, #728]", "stp x4, x5, [x28, #8]", "stp x6, x7, [x28, #24]", - "stp x8, x9, [x28, #40]", - "stp x10, x11, [x28, #56]", - "stp x12, x13, [x28, #72]", - "stp x14, x15, [x28, #88]", + "str x8, [x28, #40]", "stp x16, x17, [x28, #104]", - "stp x19, x29, [x28, #120]", - "str x26, [x28, #752]", - "str x27, [x28, #760]", - "add x0, x28, #0xc0 (192)", - "st1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x0], #64", - "st1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x0], #64", - "st1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x0], #64", - "st1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x0], #64", - "sub sp, sp, #0xf0 (240)", + "sub sp, sp, #0x70 (112)", "mov x0, sp", "st1 {v2.2d, v3.2d}, [x0], #32", "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "st1 {v8.2d, v9.2d, v10.2d, v11.2d}, [x0], #64", - "st1 {v12.2d, v13.2d, v14.2d, v15.2d}, [x0], #64", - "str x30, [x0]", + "str x30, [x0], #16", "ldrh w0, [x28, #1024]", "mov x1, v2.d[0]", "umov w2, v2.h[4]", "ldr x3, [x28, #1384]", "blr x3", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64", - "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64", - "ldr x30, [sp], #16", "ldr w4, [x28, #728]", "msr nzcv, x4", - "add x4, x28, #0xc0 (192)", - "ld1 {v16.2d, v17.2d, v18.2d, v19.2d}, [x4], #64", - "ld1 {v20.2d, v21.2d, v22.2d, v23.2d}, [x4], #64", - "ld1 {v24.2d, v25.2d, v26.2d, v27.2d}, [x4], #64", - "ld1 {v28.2d, v29.2d, v30.2d, v31.2d}, [x4], #64", "ldp x4, x5, [x28, #8]", "ldp x6, x7, [x28, #24]", - "ldp x8, x9, [x28, #40]", - "ldp x10, x11, [x28, #56]", - "ldp x12, x13, [x28, #72]", - "ldp x14, x15, [x28, #88]", + "ldr x8, [x28, #40]", "ldp x16, x17, [x28, #104]", - "ldp x19, x29, [x28, #120]", - "ldr x26, [x28, #752]", - "ldr x27, [x28, #760]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x30, [sp], #16", "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1",