From fb2cdc85417a9969c13fb2fe5601e290dca3b373 Mon Sep 17 00:00:00 2001 From: LC Date: Sun, 12 Jul 2026 18:49:25 -0400 Subject: [PATCH] Crypto: Clarify zero vector size in SHA1RNDS4Op() This ends up zeroing out the whole 128-bit vector. --- FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp index 780534702..a7bc09cdd 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Crypto.cpp @@ -107,7 +107,7 @@ void OpDispatchBuilder::SHA1RNDS4Op(OpcodeArgs) { break; } - const auto ZeroRegister = LoadZeroVector(OpSize::i32Bit); + const auto ZeroRegister = LoadZeroVector(OpSize::i128Bit); Ref Src1 = SHADataShuffle(Dest); Ref Src2 = SHADataShuffle(Src);