diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
index b613713e7..2b0659d8a 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
@@ -258,11 +258,11 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x22, x0, x2",
-        "add x23, x1, x2",
-        "mov x10, x23",
-        "mov x11, x22",
+        "add x23, x0, x2",
+        "add x22, x1, x2",
         "strb w21, [x28, #986]",
+        "mov x11, x23",
+        "mov x10, x22",
         "mov x5, x20"
       ]
     },
@@ -315,11 +315,11 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x22, x0, x2, lsl #1",
-        "add x23, x1, x2, lsl #1",
-        "mov x10, x23",
-        "mov x11, x22",
+        "add x23, x0, x2, lsl #1",
+        "add x22, x1, x2, lsl #1",
         "strb w21, [x28, #986]",
+        "mov x11, x23",
+        "mov x10, x22",
         "mov x5, x20"
       ]
     },
@@ -372,11 +372,11 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x22, x0, x2, lsl #2",
-        "add x23, x1, x2, lsl #2",
-        "mov x10, x23",
-        "mov x11, x22",
+        "add x23, x0, x2, lsl #2",
+        "add x22, x1, x2, lsl #2",
         "strb w21, [x28, #986]",
+        "mov x11, x23",
+        "mov x10, x22",
         "mov x5, x20"
       ]
     },
@@ -429,11 +429,11 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x22, x0, x2, lsl #3",
-        "add x23, x1, x2, lsl #3",
-        "mov x10, x23",
-        "mov x11, x22",
+        "add x23, x0, x2, lsl #3",
+        "add x22, x1, x2, lsl #3",
         "strb w21, [x28, #986]",
+        "mov x11, x23",
+        "mov x10, x22",
         "mov x5, x20"
       ]
     },
@@ -490,11 +490,11 @@
         "mov x1, x10",
         "mov x2, x5",
         "sub x22, x0, x2",
-        "sub x23, x1, x2",
-        "mov x10, x23",
-        "mov x11, x22",
+        "sub x21, x1, x2",
         "mov w5, #0x0",
-        "strb w20, [x28, #986]"
+        "strb w20, [x28, #986]",
+        "mov x11, x22",
+        "mov x10, x21"
       ]
     },
     "negative rep movsw": {
@@ -550,11 +550,11 @@
         "mov x1, x10",
         "mov x2, x5",
         "sub x22, x0, x2, lsl #1",
-        "sub x23, x1, x2, lsl #1",
-        "mov x10, x23",
-        "mov x11, x22",
+        "sub x21, x1, x2, lsl #1",
         "mov w5, #0x0",
-        "strb w20, [x28, #986]"
+        "strb w20, [x28, #986]",
+        "mov x11, x22",
+        "mov x10, x21"
       ]
     },
     "negative rep movsd": {
@@ -610,11 +610,11 @@
         "mov x1, x10",
         "mov x2, x5",
         "sub x22, x0, x2, lsl #2",
-        "sub x23, x1, x2, lsl #2",
-        "mov x10, x23",
-        "mov x11, x22",
+        "sub x21, x1, x2, lsl #2",
         "mov w5, #0x0",
-        "strb w20, [x28, #986]"
+        "strb w20, [x28, #986]",
+        "mov x11, x22",
+        "mov x10, x21"
       ]
     },
     "negative rep movsq": {
@@ -670,11 +670,11 @@
         "mov x1, x10",
         "mov x2, x5",
         "sub x22, x0, x2, lsl #3",
-        "sub x23, x1, x2, lsl #3",
-        "mov x10, x23",
-        "mov x11, x22",
+        "sub x21, x1, x2, lsl #3",
         "mov w5, #0x0",
-        "strb w20, [x28, #986]"
+        "strb w20, [x28, #986]",
+        "mov x11, x22",
+        "mov x10, x21"
       ]
     },
     "positive rep stosb": {
@@ -1024,7 +1024,7 @@
       ]
     },
     "Sekiro spill block": {
-      "ExpectedInstructionCount": 134,
+      "ExpectedInstructionCount": 126,
       "Comment": [
         "This block of code came from the settings screen when it loaded",
         "It was originally at RIP: 0x14232cca0 and has been deobfuscated"
@@ -1268,22 +1268,14 @@
         "mvn w27, w8",
         "adds x26, x8, #0x18 (24)",
         "mov x8, x26",
-        "ldr x29, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x19, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x17, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x16, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x11, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x10, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x9, [x8]",
-        "add x8, x8, #0x8 (8)",
-        "ldr x7, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x29, [x8], #8",
+        "ldr x19, [x8], #8",
+        "ldr x17, [x8], #8",
+        "ldr x16, [x8], #8",
+        "ldr x11, [x8], #8",
+        "ldr x10, [x8], #8",
+        "ldr x9, [x8], #8",
+        "ldr x7, [x8], #8",
         "cfinv"
       ]
     }
diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json
index 81ffbf6ea..3fa53caa2 100644
--- a/unittests/InstructionCountCI/FlagM/FlagOpts.json
+++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json
@@ -285,33 +285,23 @@
       ]
     },
     "Dead cmpxchg flags": {
-      "ExpectedInstructionCount": 23,
+      "ExpectedInstructionCount": 13,
       "x86Insts": [
         "cmpxchg8b [rbp]",
         "test rax, rax"
       ],
       "ExpectedArm64ASM": [
-        "mov w20, w4",
-        "mov w21, w6",
-        "mov w20, w20",
-        "mov w21, w21",
-        "mov w22, w7",
-        "mov w23, w5",
-        "mov w22, w22",
-        "mov w23, w23",
-        "mov w2, w20",
-        "mov w3, w21",
-        "caspal w2, w3, w22, w23, [x9]",
-        "mov w22, w2",
-        "mov w23, w3",
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x20, x4",
+        "mov x21, x6",
+        "caspal w20, w21, w0, w1, [x9]",
         "mrs x0, nzcv",
-        "cmp w22, w20",
-        "ccmp w23, w21, #nzcv, eq",
+        "cmp w20, w4",
+        "ccmp w21, w6, #nzcv, eq",
         "rmif x0, #0, #NzCV",
-        "mov w20, w23",
-        "mov w21, w22",
-        "csel x4, x21, x4, ne",
-        "csel x6, x20, x6, ne",
+        "csel x4, x20, x4, ne",
+        "csel x6, x21, x6, ne",
         "ands x26, x4, x4",
         "cfinv"
       ]
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
index 393d69859..de489fd9e 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
@@ -79,7 +79,7 @@
       ]
     },
     "dxvk hotblock from MGRR": {
-      "ExpectedInstructionCount": 34,
+      "ExpectedInstructionCount": 29,
       "Comment": [
         "Hottest block in Metal Gear Rising: Revengeance render thread"
       ],
@@ -117,27 +117,22 @@
         "stur w5, [x9, #-48]",
         "ldur w5, [x9, #-44]",
         "add w20, w10, #0x8 (8)",
-        "mov w22, w4",
-        "mov w23, w6",
-        "mov w24, w7",
-        "mov w25, w5",
-        "mov w2, w22",
-        "mov w3, w23",
-        "caspal w2, w3, w24, w25, [x20]",
-        "mov w20, w2",
-        "mov w21, w3",
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x22, x4",
+        "mov x23, x6",
+        "caspal w22, w23, w0, w1, [x20]",
         "mrs x0, nzcv",
-        "cmp w20, w22",
-        "ccmp w21, w23, #nzcv, eq",
+        "cmp w22, w4",
+        "ccmp w23, w6, #nzcv, eq",
         "rmif x0, #0, #NzCV",
-        "mov w22, w21",
-        "csel x4, x20, x4, ne",
-        "csel x6, x22, x6, ne",
+        "csel x4, x22, x4, ne",
+        "csel x6, x23, x6, ne",
         "cfinv"
       ]
     },
     "Psychonauts matrix swizzle": {
-      "ExpectedInstructionCount": 145,
+      "ExpectedInstructionCount": 144,
       "Comment": [
         "Hottest block in Windows Psychonauts",
         "Doing a 4x4 32-bit float matrix swizzle",
@@ -384,8 +379,7 @@
         "str s2, [x20]",
         "ldr w4, [x9, #8]",
         "mov x8, x9",
-        "ldr w9, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w9, [x8], #4",
         "ldrb w20, [x28, #1019]",
         "add w20, w20, #0x7 (7)",
         "and w20, w20, #0x7",
diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json
index 37f41c46d..9cf11e265 100644
--- a/unittests/InstructionCountCI/FlagM/Primary.json
+++ b/unittests/InstructionCountCI/FlagM/Primary.json
@@ -1791,11 +1791,10 @@
       ]
     },
     "popf": {
-      "ExpectedInstructionCount": 34,
+      "ExpectedInstructionCount": 33,
       "Comment": "0x9d",
       "ExpectedArm64ASM": [
-        "ldr x20, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x20, [x8], #8",
         "mov w21, #0x202",
         "orr x27, x20, x21",
         "mvn w20, w27",
diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
index e9e1b3e84..5f02fdca5 100644
--- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
@@ -21,11 +21,10 @@
       ]
     },
     "pop es": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x07",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #928]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -50,11 +49,10 @@
       ]
     },
     "pop ss": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x17",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #932]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -71,11 +69,10 @@
       ]
     },
     "pop ds": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x1f",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #934]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -276,43 +273,35 @@
       ]
     },
     "popa": {
-      "ExpectedInstructionCount": 14,
+      "ExpectedInstructionCount": 10,
       "Comment": "0x61",
       "ExpectedArm64ASM": [
-        "ldr w11, [x8]",
-        "add x20, x8, #0x4 (4)",
-        "ldr w10, [x20]",
+        "mov x20, x8",
+        "ldr w11, [x20], #4",
+        "ldr w10, [x20], #4",
+        "ldr w9, [x20], #4",
         "add x20, x20, #0x4 (4)",
-        "ldr w9, [x20]",
-        "add x20, x20, #0x8 (8)",
-        "ldr w7, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w6, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w5, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w4, [x20]",
-        "add x8, x20, #0x4 (4)"
+        "mov x8, x20",
+        "ldr w7, [x8], #4",
+        "ldr w6, [x8], #4",
+        "ldr w5, [x8], #4",
+        "ldr w4, [x8], #4"
       ]
     },
     "popad": {
-      "ExpectedInstructionCount": 14,
+      "ExpectedInstructionCount": 10,
       "Comment": "0x61",
       "ExpectedArm64ASM": [
-        "ldr w11, [x8]",
-        "add x20, x8, #0x4 (4)",
-        "ldr w10, [x20]",
+        "mov x20, x8",
+        "ldr w11, [x20], #4",
+        "ldr w10, [x20], #4",
+        "ldr w9, [x20], #4",
         "add x20, x20, #0x4 (4)",
-        "ldr w9, [x20]",
-        "add x20, x20, #0x8 (8)",
-        "ldr w7, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w6, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w5, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w4, [x20]",
-        "add x8, x20, #0x4 (4)"
+        "mov x8, x20",
+        "ldr w7, [x8], #4",
+        "ldr w6, [x8], #4",
+        "ldr w5, [x8], #4",
+        "ldr w4, [x8], #4"
       ]
     },
     "aam": {
diff --git a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
index 0866b4729..bac69edfc 100644
--- a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
+++ b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
@@ -711,53 +711,37 @@
       ]
     },
     "cmpxchg8b [rbp]": {
-      "ExpectedInstructionCount": 21,
+      "ExpectedInstructionCount": 11,
       "Comment": "GROUP9 0x0F 0xC7 /1",
       "ExpectedArm64ASM": [
-        "mov w20, w4",
-        "mov w21, w6",
-        "mov w20, w20",
-        "mov w21, w21",
-        "mov w22, w7",
-        "mov w23, w5",
-        "mov w22, w22",
-        "mov w23, w23",
-        "mov w2, w20",
-        "mov w3, w21",
-        "caspal w2, w3, w22, w23, [x9]",
-        "mov w22, w2",
-        "mov w23, w3",
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x20, x4",
+        "mov x21, x6",
+        "caspal w20, w21, w0, w1, [x9]",
         "mrs x0, nzcv",
-        "cmp w22, w20",
-        "ccmp w23, w21, #nzcv, eq",
+        "cmp w20, w4",
+        "ccmp w21, w6, #nzcv, eq",
         "rmif x0, #0, #NzCV",
-        "mov w20, w23",
-        "mov w21, w22",
-        "csel x4, x21, x4, ne",
-        "csel x6, x20, x6, ne"
+        "csel x4, x20, x4, ne",
+        "csel x6, x21, x6, ne"
       ]
     },
     "cmpxchg16b [rbp]": {
-      "ExpectedInstructionCount": 17,
+      "ExpectedInstructionCount": 11,
       "Comment": "GROUP9 0x0F 0xC7 /1",
       "ExpectedArm64ASM": [
+        "mov x0, x7",
+        "mov x1, x5",
         "mov x20, x4",
         "mov x21, x6",
-        "mov x22, x7",
-        "mov x23, x5",
-        "mov x2, x20",
-        "mov x3, x21",
-        "caspal x2, x3, x22, x23, [x9]",
-        "mov x22, x2",
-        "mov x23, x3",
+        "caspal x20, x21, x0, x1, [x9]",
         "mrs x0, nzcv",
-        "cmp w22, w20",
-        "ccmp w23, w21, #nzcv, eq",
+        "cmp x20, x4",
+        "ccmp x21, x6, #nzcv, eq",
         "rmif x0, #0, #NzCV",
-        "mov x20, x23",
-        "mov x21, x22",
-        "csel x4, x21, x4, ne",
-        "csel x6, x20, x6, ne"
+        "csel x4, x20, x4, ne",
+        "csel x6, x21, x6, ne"
       ]
     },
     "rdrand ax": {
diff --git a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
index 567419d01..a766933a0 100644
--- a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
@@ -14,7 +14,7 @@
   },
   "Instructions": {
     "xgetbv": {
-      "ExpectedInstructionCount": 54,
+      "ExpectedInstructionCount": 52,
       "Comment": "0xF 0x01 /2 RM-0",
       "ExpectedArm64ASM": [
         "sub sp, sp, #0xf0 (240)",
@@ -67,10 +67,8 @@
         "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64",
         "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64",
         "ldr x30, [sp], #16",
-        "mov w20, w0",
-        "lsr x21, x0, #32",
-        "mov w6, w21",
-        "mov w4, w20"
+        "mov w4, w0",
+        "lsr x6, x0, #32"
       ]
     },
     "rdtscp": {
diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
index 1fa4496c6..651bda320 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
@@ -26712,7 +26712,7 @@
       ]
     },
     "Block2": {
-      "ExpectedInstructionCount": 16636,
+      "ExpectedInstructionCount": 16635,
       "x86Insts": [
         "mov eax,dword [ebp + 0x8]",
         "fld dword [eax + 0x40]",
@@ -43978,8 +43978,7 @@
         "fmov s2, s0",
         "str s2, [x20]",
         "mov x8, x9",
-        "ldr w9, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w9, [x8], #4",
         "cfinv",
         "strb wzr, [x28, #1298]"
       ]
diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
index 521db216b..6a9e30f17 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
@@ -73422,7 +73422,7 @@
       ]
     },
     "Block8": {
-      "ExpectedInstructionCount": 8485,
+      "ExpectedInstructionCount": 8481,
       "x86Insts": [
         "fadd dword [esp + 0x40]",
         "lea edx,[ecx + ecx*0x2]",
@@ -82116,10 +82116,8 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w11, [x8]",
-        "add x8, x8, #0x4 (4)",
-        "ldr w10, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w11, [x8], #4",
+        "ldr w10, [x8], #4",
         "ldrb w22, [x28, #1298]",
         "lsl w23, w21, w20",
         "bic w22, w22, w23",
@@ -82127,8 +82125,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w9, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w9, [x8], #4",
         "ldrb w22, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w22, w21",
@@ -82136,8 +82133,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w7, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w7, [x8], #4",
         "mvn w27, w8",
         "adds w26, w8, #0x74 (116)",
         "cfinv",
@@ -82145,7 +82141,7 @@
       ]
     },
     "Block9": {
-      "ExpectedInstructionCount": 8404,
+      "ExpectedInstructionCount": 8400,
       "x86Insts": [
         "fadd dword [esp + 0x40]",
         "lea edx,[ecx + ecx*0x2]",
@@ -90749,10 +90745,8 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w11, [x8]",
-        "add x8, x8, #0x4 (4)",
-        "ldr w10, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w11, [x8], #4",
+        "ldr w10, [x8], #4",
         "ldrb w22, [x28, #1298]",
         "lsl w23, w21, w20",
         "bic w22, w22, w23",
@@ -90760,8 +90754,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w9, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w9, [x8], #4",
         "ldrb w22, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w22, w21",
@@ -90769,8 +90762,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr w7, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w7, [x8], #4",
         "mvn w27, w8",
         "adds w26, w8, #0x74 (116)",
         "cfinv",
diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json
index 84eb2f9bb..7d7927b7e 100644
--- a/unittests/InstructionCountCI/Primary.json
+++ b/unittests/InstructionCountCI/Primary.json
@@ -1780,20 +1780,18 @@
       ]
     },
     "pop ax": {
-      "ExpectedInstructionCount": 3,
+      "ExpectedInstructionCount": 2,
       "Comment": "0x8f",
       "ExpectedArm64ASM": [
-        "ldrh w20, [x8]",
-        "add x8, x8, #0x2 (2)",
+        "ldrh w20, [x8], #2",
         "bfxil x4, x20, #0, #16"
       ]
     },
     "pop rax": {
-      "ExpectedInstructionCount": 2,
+      "ExpectedInstructionCount": 1,
       "Comment": "0x8f",
       "ExpectedArm64ASM": [
-        "ldr x4, [x8]",
-        "add x8, x8, #0x8 (8)"
+        "ldr x4, [x8], #8"
       ]
     },
     "movsxd rax, ebx": {
@@ -2505,20 +2503,18 @@
       "Comment": "0x8e"
     },
     "pop word [rax]": {
-      "ExpectedInstructionCount": 3,
+      "ExpectedInstructionCount": 2,
       "Comment": "0x8f",
       "ExpectedArm64ASM": [
-        "ldrh w20, [x8]",
-        "add x8, x8, #0x2 (2)",
+        "ldrh w20, [x8], #2",
         "strh w20, [x4]"
       ]
     },
     "pop qword [rax]": {
-      "ExpectedInstructionCount": 3,
+      "ExpectedInstructionCount": 2,
       "Comment": "0x8f",
       "ExpectedArm64ASM": [
-        "ldr x20, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x20, [x8], #8",
         "str x20, [x4]"
       ]
     },
@@ -2698,11 +2694,10 @@
       ]
     },
     "popf": {
-      "ExpectedInstructionCount": 39,
+      "ExpectedInstructionCount": 38,
       "Comment": "0x9d",
       "ExpectedArm64ASM": [
-        "ldr x20, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x20, [x8], #8",
         "mov w21, #0x202",
         "orr x27, x20, x21",
         "mvn w20, w27",
@@ -2893,11 +2888,11 @@
       "ExpectedInstructionCount": 83,
       "Comment": "0xa4",
       "ExpectedArm64ASM": [
-        "ldrsb x20, [x28, #986]",
+        "ldrsb x22, [x28, #986]",
         "mov x0, x5",
         "mov x1, x11",
         "mov x2, x10",
-        "tbnz w20, #1, #+0x94",
+        "tbnz w22, #1, #+0x94",
         "cbz x0, #+0x78",
         "sub x3, x1, x2",
         "tbz x3, #63, #+0x8",
@@ -2931,8 +2926,8 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x20, x0, x2",
-        "add x21, x1, x2",
+        "add x21, x0, x2",
+        "add x20, x1, x2",
         "b #+0xa0",
         "cbz x0, #+0x88",
         "sub x3, x1, x2",
@@ -2971,22 +2966,22 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "sub x20, x0, x2",
-        "sub x21, x1, x2",
-        "mov x10, x21",
-        "mov x11, x20",
-        "mov w5, #0x0"
+        "sub x21, x0, x2",
+        "sub x20, x1, x2",
+        "mov w5, #0x0",
+        "mov x11, x21",
+        "mov x10, x20"
       ]
     },
     "rep movsw": {
       "ExpectedInstructionCount": 83,
       "Comment": "0xa5",
       "ExpectedArm64ASM": [
-        "ldrsb x20, [x28, #986]",
+        "ldrsb x22, [x28, #986]",
         "mov x0, x5",
         "mov x1, x11",
         "mov x2, x10",
-        "tbnz w20, #1, #+0x94",
+        "tbnz w22, #1, #+0x94",
         "cbz x0, #+0x78",
         "sub x3, x1, x2",
         "tbz x3, #63, #+0x8",
@@ -3020,8 +3015,8 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x20, x0, x2, lsl #1",
-        "add x21, x1, x2, lsl #1",
+        "add x21, x0, x2, lsl #1",
+        "add x20, x1, x2, lsl #1",
         "b #+0xa0",
         "cbz x0, #+0x88",
         "sub x3, x1, x2",
@@ -3060,22 +3055,22 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "sub x20, x0, x2, lsl #1",
-        "sub x21, x1, x2, lsl #1",
-        "mov x10, x21",
-        "mov x11, x20",
-        "mov w5, #0x0"
+        "sub x21, x0, x2, lsl #1",
+        "sub x20, x1, x2, lsl #1",
+        "mov w5, #0x0",
+        "mov x11, x21",
+        "mov x10, x20"
       ]
     },
     "rep movsd": {
       "ExpectedInstructionCount": 83,
       "Comment": "0xa5",
       "ExpectedArm64ASM": [
-        "ldrsb x20, [x28, #986]",
+        "ldrsb x22, [x28, #986]",
         "mov x0, x5",
         "mov x1, x11",
         "mov x2, x10",
-        "tbnz w20, #1, #+0x94",
+        "tbnz w22, #1, #+0x94",
         "cbz x0, #+0x78",
         "sub x3, x1, x2",
         "tbz x3, #63, #+0x8",
@@ -3109,8 +3104,8 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x20, x0, x2, lsl #2",
-        "add x21, x1, x2, lsl #2",
+        "add x21, x0, x2, lsl #2",
+        "add x20, x1, x2, lsl #2",
         "b #+0xa0",
         "cbz x0, #+0x88",
         "sub x3, x1, x2",
@@ -3149,22 +3144,22 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "sub x20, x0, x2, lsl #2",
-        "sub x21, x1, x2, lsl #2",
-        "mov x10, x21",
-        "mov x11, x20",
-        "mov w5, #0x0"
+        "sub x21, x0, x2, lsl #2",
+        "sub x20, x1, x2, lsl #2",
+        "mov w5, #0x0",
+        "mov x11, x21",
+        "mov x10, x20"
       ]
     },
     "rep movsq": {
       "ExpectedInstructionCount": 83,
       "Comment": "0xa5",
       "ExpectedArm64ASM": [
-        "ldrsb x20, [x28, #986]",
+        "ldrsb x22, [x28, #986]",
         "mov x0, x5",
         "mov x1, x11",
         "mov x2, x10",
-        "tbnz w20, #1, #+0x94",
+        "tbnz w22, #1, #+0x94",
         "cbz x0, #+0x78",
         "sub x3, x1, x2",
         "tbz x3, #63, #+0x8",
@@ -3198,8 +3193,8 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "add x20, x0, x2, lsl #3",
-        "add x21, x1, x2, lsl #3",
+        "add x21, x0, x2, lsl #3",
+        "add x20, x1, x2, lsl #3",
         "b #+0xa0",
         "cbz x0, #+0x88",
         "sub x3, x1, x2",
@@ -3238,11 +3233,11 @@
         "mov x0, x11",
         "mov x1, x10",
         "mov x2, x5",
-        "sub x20, x0, x2, lsl #3",
-        "sub x21, x1, x2, lsl #3",
-        "mov x10, x21",
-        "mov x11, x20",
-        "mov w5, #0x0"
+        "sub x21, x0, x2, lsl #3",
+        "sub x20, x1, x2, lsl #3",
+        "mov w5, #0x0",
+        "mov x11, x21",
+        "mov x10, x20"
       ]
     },
     "cmpsb": {
diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json
index ebd50e449..c30adfe29 100644
--- a/unittests/InstructionCountCI/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/Primary_32Bit.json
@@ -20,11 +20,10 @@
       ]
     },
     "pop es": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x07",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #928]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -49,11 +48,10 @@
       ]
     },
     "pop ss": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x17",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #932]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -70,11 +68,10 @@
       ]
     },
     "pop ds": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x1f",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #934]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -291,43 +288,35 @@
       ]
     },
     "popa": {
-      "ExpectedInstructionCount": 14,
+      "ExpectedInstructionCount": 10,
       "Comment": "0x61",
       "ExpectedArm64ASM": [
-        "ldr w11, [x8]",
-        "add x20, x8, #0x4 (4)",
-        "ldr w10, [x20]",
+        "mov x20, x8",
+        "ldr w11, [x20], #4",
+        "ldr w10, [x20], #4",
+        "ldr w9, [x20], #4",
         "add x20, x20, #0x4 (4)",
-        "ldr w9, [x20]",
-        "add x20, x20, #0x8 (8)",
-        "ldr w7, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w6, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w5, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w4, [x20]",
-        "add x8, x20, #0x4 (4)"
+        "mov x8, x20",
+        "ldr w7, [x8], #4",
+        "ldr w6, [x8], #4",
+        "ldr w5, [x8], #4",
+        "ldr w4, [x8], #4"
       ]
     },
     "popad": {
-      "ExpectedInstructionCount": 14,
+      "ExpectedInstructionCount": 10,
       "Comment": "0x61",
       "ExpectedArm64ASM": [
-        "ldr w11, [x8]",
-        "add x20, x8, #0x4 (4)",
-        "ldr w10, [x20]",
+        "mov x20, x8",
+        "ldr w11, [x20], #4",
+        "ldr w10, [x20], #4",
+        "ldr w9, [x20], #4",
         "add x20, x20, #0x4 (4)",
-        "ldr w9, [x20]",
-        "add x20, x20, #0x8 (8)",
-        "ldr w7, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w6, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w5, [x20]",
-        "add x20, x20, #0x4 (4)",
-        "ldr w4, [x20]",
-        "add x8, x20, #0x4 (4)"
+        "mov x8, x20",
+        "ldr w7, [x8], #4",
+        "ldr w6, [x8], #4",
+        "ldr w5, [x8], #4",
+        "ldr w4, [x8], #4"
       ]
     },
     "aam": {
diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json
index 5ca2bf494..f05cf3dd7 100644
--- a/unittests/InstructionCountCI/Secondary.json
+++ b/unittests/InstructionCountCI/Secondary.json
@@ -1292,11 +1292,10 @@
       ]
     },
     "pop fs": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x0f 0xa1",
       "ExpectedArm64ASM": [
-        "ldr x20, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x20, [x8], #8",
         "strh w20, [x28, #938]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -1683,11 +1682,10 @@
       ]
     },
     "pop gs": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x0f 0xa9",
       "ExpectedArm64ASM": [
-        "ldr x20, [x8]",
-        "add x8, x8, #0x8 (8)",
+        "ldr x20, [x8], #8",
         "strh w20, [x28, #936]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json
index e63a4785d..94849777a 100644
--- a/unittests/InstructionCountCI/SecondaryGroup.json
+++ b/unittests/InstructionCountCI/SecondaryGroup.json
@@ -843,57 +843,41 @@
       ]
     },
     "cmpxchg8b [rbp]": {
-      "ExpectedInstructionCount": 23,
+      "ExpectedInstructionCount": 13,
       "Comment": "GROUP9 0x0F 0xC7 /1",
       "ExpectedArm64ASM": [
-        "mov w20, w4",
-        "mov w21, w6",
-        "mov w20, w20",
-        "mov w21, w21",
-        "mov w22, w7",
-        "mov w23, w5",
-        "mov w22, w22",
-        "mov w23, w23",
-        "mov w2, w20",
-        "mov w3, w21",
-        "caspal w2, w3, w22, w23, [x9]",
-        "mov w22, w2",
-        "mov w23, w3",
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x20, x4",
+        "mov x21, x6",
+        "caspal w20, w21, w0, w1, [x9]",
         "mrs x0, nzcv",
-        "cmp w22, w20",
-        "ccmp w23, w21, #nzcv, eq",
+        "cmp w20, w4",
+        "ccmp w21, w6, #nzcv, eq",
         "cset w1, eq",
         "bfi w0, w1, #30, #1",
         "msr nzcv, x0",
-        "mov w20, w23",
-        "mov w21, w22",
-        "csel x4, x21, x4, ne",
-        "csel x6, x20, x6, ne"
+        "csel x4, x20, x4, ne",
+        "csel x6, x21, x6, ne"
       ]
     },
     "cmpxchg16b [rbp]": {
-      "ExpectedInstructionCount": 19,
+      "ExpectedInstructionCount": 13,
       "Comment": "GROUP9 0x0F 0xC7 /1",
       "ExpectedArm64ASM": [
+        "mov x0, x7",
+        "mov x1, x5",
         "mov x20, x4",
         "mov x21, x6",
-        "mov x22, x7",
-        "mov x23, x5",
-        "mov x2, x20",
-        "mov x3, x21",
-        "caspal x2, x3, x22, x23, [x9]",
-        "mov x22, x2",
-        "mov x23, x3",
+        "caspal x20, x21, x0, x1, [x9]",
         "mrs x0, nzcv",
-        "cmp w22, w20",
-        "ccmp w23, w21, #nzcv, eq",
+        "cmp x20, x4",
+        "ccmp x21, x6, #nzcv, eq",
         "cset w1, eq",
         "bfi w0, w1, #30, #1",
         "msr nzcv, x0",
-        "mov x20, x23",
-        "mov x21, x22",
-        "csel x4, x21, x4, ne",
-        "csel x6, x20, x6, ne"
+        "csel x4, x20, x4, ne",
+        "csel x6, x21, x6, ne"
       ]
     },
     "rdrand ax": {
diff --git a/unittests/InstructionCountCI/SecondaryModRM.json b/unittests/InstructionCountCI/SecondaryModRM.json
index a475925b3..b9e268db8 100644
--- a/unittests/InstructionCountCI/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/SecondaryModRM.json
@@ -14,7 +14,7 @@
   },
   "Instructions": {
     "xgetbv": {
-      "ExpectedInstructionCount": 54,
+      "ExpectedInstructionCount": 52,
       "Comment": "0xF 0x01 /2 RM-0",
       "ExpectedArm64ASM": [
         "sub sp, sp, #0xf0 (240)",
@@ -67,10 +67,8 @@
         "ld1 {v8.2d, v9.2d, v10.2d, v11.2d}, [sp], #64",
         "ld1 {v12.2d, v13.2d, v14.2d, v15.2d}, [sp], #64",
         "ldr x30, [sp], #16",
-        "mov w20, w0",
-        "lsr x21, x0, #32",
-        "mov w6, w21",
-        "mov w4, w20"
+        "mov w4, w0",
+        "lsr x6, x0, #32"
       ]
     },
     "rdtscp": {
diff --git a/unittests/InstructionCountCI/Secondary_32Bit.json b/unittests/InstructionCountCI/Secondary_32Bit.json
index e1b360885..b5f079324 100644
--- a/unittests/InstructionCountCI/Secondary_32Bit.json
+++ b/unittests/InstructionCountCI/Secondary_32Bit.json
@@ -18,11 +18,10 @@
       ]
     },
     "pop fs": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x0f 0xa1",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #938]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",
@@ -39,11 +38,10 @@
       ]
     },
     "pop gs": {
-      "ExpectedInstructionCount": 7,
+      "ExpectedInstructionCount": 6,
       "Comment": "0x0f 0xa9",
       "ExpectedArm64ASM": [
-        "ldr w20, [x8]",
-        "add x8, x8, #0x4 (4)",
+        "ldr w20, [x8], #4",
         "strh w20, [x28, #936]",
         "ubfx w20, w20, #3, #13",
         "add x0, x28, x20, lsl #2",