diff --git a/CMakeLists.txt b/CMakeLists.txt
index bba9c70b4..021478d6d 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -145,6 +145,39 @@ if (CMAKE_SYSTEM_PROCESSOR MATCHES "^arm64ec")
   set(ENABLE_JEMALLOC TRUE)
 endif()
 
+include(CheckCXXSourceCompiles)
+set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
+check_cxx_source_compiles(
+  "
+  __attribute__((preserve_all))
+  int Testy(int a, int b, int c, int d, int e, int f) {
+  return a + b + c + d + e + f;
+  }
+  int main() {
+  return Testy(0, 1, 2, 3, 4, 5);
+  }"
+  HAS_CLANG_PRESERVE_ALL)
+unset(CMAKE_REQUIRED_FLAGS)
+if (HAS_CLANG_PRESERVE_ALL)
+  if (MINGW_BUILD)
+    message(STATUS "Ignoring broken clang::preserve_all support")
+    set(HAS_CLANG_PRESERVE_ALL FALSE)
+  else()
+    message(STATUS "Has clang::preserve_all")
+  endif()
+endif ()
+
+if (_M_ARM_64 AND HAS_CLANG_PRESERVE_ALL)
+  add_definitions("-DFEX_PRESERVE_ALL_ATTR=__attribute__((preserve_all))" "-DFEX_HAS_PRESERVE_ALL_ATTR=1")
+else()
+  add_definitions("-DFEX_PRESERVE_ALL_ATTR=" "-DFEX_HAS_PRESERVE_ALL_ATTR=0")
+endif()
+
+if (ENABLE_VIXL_SIMULATOR)
+  # We can run the simulator on both x86-64 or AArch64 hosts
+  add_definitions(-DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
+endif()
+
 if (ENABLE_CCACHE)
   find_program(CCACHE_PROGRAM ccache)
   if(CCACHE_PROGRAM)
@@ -282,8 +315,6 @@ include_directories(External/json-maker/)
 add_subdirectory(External/tiny-json/)
 include_directories(External/tiny-json/)
 
-include_directories(External/xbyak/)
-
 include_directories(Source/)
 include_directories("${CMAKE_BINARY_DIR}/Source/")
 
diff --git a/FEXCore/CMakeLists.txt b/FEXCore/CMakeLists.txt
index 2db0dc60a..baa6541f9 100644
--- a/FEXCore/CMakeLists.txt
+++ b/FEXCore/CMakeLists.txt
@@ -24,27 +24,6 @@ include(CheckCXXCompilerFlag)
 include(CheckIncludeFileCXX)
 include(CheckCXXSourceCompiles)
 
-set(CMAKE_REQUIRED_FLAGS "-std=c++11 -Wattributes -Werror=attributes")
-check_cxx_source_compiles(
-  "
-  __attribute__((preserve_all))
-  int Testy(int a, int b, int c, int d, int e, int f) {
-  return a + b + c + d + e + f;
-  }
-  int main() {
-  return Testy(0, 1, 2, 3, 4, 5);
-  }"
-  HAS_CLANG_PRESERVE_ALL)
-unset(CMAKE_REQUIRED_FLAGS)
-if (HAS_CLANG_PRESERVE_ALL)
-  if (MINGW_BUILD)
-    message(STATUS "Ignoring broken clang::preserve_all support")
-    set(HAS_CLANG_PRESERVE_ALL FALSE)
-  else()
-    message(STATUS "Has clang::preserve_all")
-  endif()
-endif ()
-
 if (EXISTS ${CMAKE_CURRENT_DIR}/External/vixl/)
     # Useful to have for freestanding libFEXCore
     add_subdirectory(External/vixl/)
diff --git a/FEXCore/Source/CMakeLists.txt b/FEXCore/Source/CMakeLists.txt
index 511492591..f044514b3 100644
--- a/FEXCore/Source/CMakeLists.txt
+++ b/FEXCore/Source/CMakeLists.txt
@@ -90,7 +90,6 @@ set (SRCS
   Interface/Core/CPUBackend.cpp
   Interface/Core/CPUID.cpp
   Interface/Core/Frontend.cpp
-  Interface/Core/HostFeatures.cpp
   Interface/Core/ObjectCache/JobHandling.cpp
   Interface/Core/ObjectCache/NamedRegionObjectHandler.cpp
   Interface/Core/ObjectCache/ObjectCacheService.cpp
@@ -169,11 +168,6 @@ if (_M_ARM_64)
   list(APPEND DEFINES -D_M_ARM_64=1)
 endif()
 
-if (ENABLE_VIXL_SIMULATOR)
-  # We can run the simulator on both x86-64 or AArch64 hosts
-  list(APPEND DEFINES -DVIXL_SIMULATOR=1 -DVIXL_INCLUDE_SIMULATOR_AARCH64=1)
-endif()
-
 if (ENABLE_VIXL_DISASSEMBLER)
   list(APPEND DEFINES -DVIXL_DISASSEMBLER=1)
 endif()
diff --git a/FEXCore/Source/Interface/Context/Context.cpp b/FEXCore/Source/Interface/Context/Context.cpp
index 0d5f252e7..330f8726d 100644
--- a/FEXCore/Source/Interface/Context/Context.cpp
+++ b/FEXCore/Source/Interface/Context/Context.cpp
@@ -6,6 +6,7 @@
 #include <FEXCore/Core/CoreState.h>
 #include <FEXCore/Core/Context.h>
 #include <FEXCore/Core/CPUID.h>
+#include <FEXCore/Core/HostFeatures.h>
 #include <FEXCore/Core/SignalDelegator.h>
 #include "FEXCore/Debug/InternalThreadState.h"
 
@@ -42,8 +43,8 @@ void FEXCore::Context::ContextImpl::SetCustomCPUBackendFactory(CustomCPUFactoryT
   CustomCPUFactory = std::move(Factory);
 }
 
-HostFeatures FEXCore::Context::ContextImpl::GetHostFeatures() const {
-  return HostFeatures;
+void FEXCore::Context::ContextImpl::SetHostFeatures(const FEXCore::HostFeatures& Features) {
+  HostFeatures = Features;
 }
 
 void FEXCore::Context::ContextImpl::SetSignalDelegator(FEXCore::SignalDelegator* _SignalDelegation) {
diff --git a/FEXCore/Source/Interface/Context/Context.h b/FEXCore/Source/Interface/Context/Context.h
index 129331f92..8e668c590 100644
--- a/FEXCore/Source/Interface/Context/Context.h
+++ b/FEXCore/Source/Interface/Context/Context.h
@@ -96,7 +96,7 @@ public:
 
   void SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) override;
 
-  HostFeatures GetHostFeatures() const override;
+  void SetHostFeatures(const FEXCore::HostFeatures& Features) override;
 
   void HandleCallback(FEXCore::Core::InternalThreadState* Thread, uint64_t RIP) override;
 
diff --git a/FEXCore/include/FEXCore/Core/Context.h b/FEXCore/include/FEXCore/Core/Context.h
index 288638a5b..9d0558ca9 100644
--- a/FEXCore/include/FEXCore/Core/Context.h
+++ b/FEXCore/include/FEXCore/Core/Context.h
@@ -20,7 +20,7 @@
 
 namespace FEXCore {
 class CodeLoader;
-class HostFeatures;
+struct HostFeatures;
 class ForkableSharedMutex;
 } // namespace FEXCore
 
@@ -165,12 +165,11 @@ public:
   FEX_DEFAULT_VISIBILITY virtual void SetCustomCPUBackendFactory(CustomCPUFactoryType Factory) = 0;
 
   /**
-   * @brief Retrieves a feature struct indicating certain supported aspects from
-   *        the hose.
+   * @brief Informs the context what features the host supports.
    *
-   * @param CTX A valid non-null context instance.
+   * @param Features Filled out HostFeatures structure to copy
    */
-  FEX_DEFAULT_VISIBILITY virtual HostFeatures GetHostFeatures() const = 0;
+  FEX_DEFAULT_VISIBILITY virtual void SetHostFeatures(const FEXCore::HostFeatures& Features) = 0;
 
   FEX_DEFAULT_VISIBILITY virtual void HandleCallback(FEXCore::Core::InternalThreadState* Thread, uint64_t RIP) = 0;
 
diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h
index 7a6e5d648..48315984f 100644
--- a/FEXCore/include/FEXCore/Core/HostFeatures.h
+++ b/FEXCore/include/FEXCore/Core/HostFeatures.h
@@ -3,10 +3,7 @@
 #include <cstdint>
 
 namespace FEXCore {
-class HostFeatures final {
-public:
-  HostFeatures();
-
+struct HostFeatures {
   /**
    * @brief Backend features that change how codegen is generated from IR
    *
diff --git a/Source/Common/CMakeLists.txt b/Source/Common/CMakeLists.txt
index 112b8c0c1..1563eb656 100644
--- a/Source/Common/CMakeLists.txt
+++ b/Source/Common/CMakeLists.txt
@@ -5,6 +5,7 @@ set(SRCS
   Config.cpp
   ArgumentLoader.cpp
   EnvironmentLoader.cpp
+  HostFeatures.cpp
   JSONPool.cpp
   StringUtil.cpp)
 
@@ -18,3 +19,4 @@ add_library(${NAME} STATIC ${SRCS})
 target_link_libraries(${NAME} FEXCore_Base cpp-optparse tiny-json json-maker FEXHeaderUtils)
 target_include_directories(${NAME} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/External/cpp-optparse/)
 target_include_directories(${NAME} PRIVATE ${CMAKE_BINARY_DIR}/generated)
+target_include_directories(${NAME} PRIVATE ${CMAKE_SOURCE_DIR}/External/xbyak/)
diff --git a/FEXCore/Source/Interface/Core/HostFeatures.cpp b/Source/Common/HostFeatures.cpp
similarity index 68%
rename from FEXCore/Source/Interface/Core/HostFeatures.cpp
rename to Source/Common/HostFeatures.cpp
index b243840d7..f71614e67 100644
--- a/FEXCore/Source/Interface/Core/HostFeatures.cpp
+++ b/Source/Common/HostFeatures.cpp
@@ -1,11 +1,8 @@
 // SPDX-License-Identifier: MIT
-#include "Interface/Core/CPUID.h"
+#include <FEXCore/Config/Config.h>
 #include <FEXCore/Core/HostFeatures.h>
 
-#include "aarch64/assembler-aarch64.h"
 #include "aarch64/cpu-aarch64.h"
-#include "aarch64/disasm-aarch64.h"
-#include "aarch64/assembler-aarch64.h"
 
 #ifdef _M_X86_64
 #define XBYAK64
@@ -18,7 +15,7 @@
 #include <xbyak/xbyak_util.h>
 #endif
 
-namespace FEXCore {
+namespace FEX {
 
 // Data Zero Prohibited flag
 // 0b0 = ZVA/GVA/GZVA permitted
@@ -59,6 +56,7 @@ __attribute__((naked)) static uint64_t ReadSVEVectorLengthInBits() {
   )");
 }
 #else
+[[maybe_unused]]
 static uint32_t GetDCZID() {
   // Return unsupported
   return DCZID_DZP_MASK;
@@ -70,7 +68,7 @@ static int ReadSVEVectorLengthInBits() {
 }
 #endif
 
-static void OverrideFeatures(HostFeatures* Features, uint64_t ForceSVEWidth) {
+static void OverrideFeatures(FEXCore::HostFeatures* Features, uint64_t ForceSVEWidth) {
   // Override features if the user has specifically called for it.
   FEX_CONFIG_OPT(HostFeatures, HOSTFEATURES);
   if (!HostFeatures()) {
@@ -132,7 +130,8 @@ static void OverrideFeatures(HostFeatures* Features, uint64_t ForceSVEWidth) {
   Features->SupportsSVE256 = ForceSVEWidth && ForceSVEWidth >= 256;
 }
 
-HostFeatures::HostFeatures() {
+FEXCore::HostFeatures FetchHostFeatures() {
+  FEXCore::HostFeatures HostFeatures;
 #ifdef VIXL_SIMULATOR
   auto Features = vixl::CPUFeatures::All();
   // Vixl simulator doesn't support AFP.
@@ -149,44 +148,44 @@ HostFeatures::HostFeatures() {
   FEX_CONFIG_OPT(ForceSVEWidth, FORCESVEWIDTH);
   FEX_CONFIG_OPT(Is64BitMode, IS64BIT_MODE);
 
-  SupportsAES = Features.Has(vixl::CPUFeatures::Feature::kAES);
-  SupportsCRC = Features.Has(vixl::CPUFeatures::Feature::kCRC32);
-  SupportsSHA = Features.Has(vixl::CPUFeatures::Feature::kSHA1) && Features.Has(vixl::CPUFeatures::Feature::kSHA2);
-  SupportsAtomics = Features.Has(vixl::CPUFeatures::Feature::kAtomics);
-  SupportsRAND = Features.Has(vixl::CPUFeatures::Feature::kRNG);
+  HostFeatures.SupportsAES = Features.Has(vixl::CPUFeatures::Feature::kAES);
+  HostFeatures.SupportsCRC = Features.Has(vixl::CPUFeatures::Feature::kCRC32);
+  HostFeatures.SupportsSHA = Features.Has(vixl::CPUFeatures::Feature::kSHA1) && Features.Has(vixl::CPUFeatures::Feature::kSHA2);
+  HostFeatures.SupportsAtomics = Features.Has(vixl::CPUFeatures::Feature::kAtomics);
+  HostFeatures.SupportsRAND = Features.Has(vixl::CPUFeatures::Feature::kRNG);
 
   // Only supported when FEAT_AFP is supported
-  SupportsAFP = Features.Has(vixl::CPUFeatures::Feature::kAFP);
-  SupportsRCPC = Features.Has(vixl::CPUFeatures::Feature::kRCpc);
-  SupportsTSOImm9 = Features.Has(vixl::CPUFeatures::Feature::kRCpcImm);
-  SupportsPMULL_128Bit = Features.Has(vixl::CPUFeatures::Feature::kPmull1Q);
-  SupportsCSSC = Features.Has(vixl::CPUFeatures::Feature::kCSSC);
-  SupportsFCMA = Features.Has(vixl::CPUFeatures::Feature::kFcma);
-  SupportsFlagM = Features.Has(vixl::CPUFeatures::Feature::kFlagM);
-  SupportsFlagM2 = Features.Has(vixl::CPUFeatures::Feature::kAXFlag);
-  SupportsRPRES = Features.Has(vixl::CPUFeatures::Feature::kRPRES);
-  SupportsSVEBitPerm = Features.Has(vixl::CPUFeatures::Feature::kSVEBitPerm);
+  HostFeatures.SupportsAFP = Features.Has(vixl::CPUFeatures::Feature::kAFP);
+  HostFeatures.SupportsRCPC = Features.Has(vixl::CPUFeatures::Feature::kRCpc);
+  HostFeatures.SupportsTSOImm9 = Features.Has(vixl::CPUFeatures::Feature::kRCpcImm);
+  HostFeatures.SupportsPMULL_128Bit = Features.Has(vixl::CPUFeatures::Feature::kPmull1Q);
+  HostFeatures.SupportsCSSC = Features.Has(vixl::CPUFeatures::Feature::kCSSC);
+  HostFeatures.SupportsFCMA = Features.Has(vixl::CPUFeatures::Feature::kFcma);
+  HostFeatures.SupportsFlagM = Features.Has(vixl::CPUFeatures::Feature::kFlagM);
+  HostFeatures.SupportsFlagM2 = Features.Has(vixl::CPUFeatures::Feature::kAXFlag);
+  HostFeatures.SupportsRPRES = Features.Has(vixl::CPUFeatures::Feature::kRPRES);
+  HostFeatures.SupportsSVEBitPerm = Features.Has(vixl::CPUFeatures::Feature::kSVEBitPerm);
 
-  Supports3DNow = true;
-  SupportsSSE4A = true;
+  HostFeatures.Supports3DNow = true;
+  HostFeatures.SupportsSSE4A = true;
 
 #ifdef VIXL_SIMULATOR
   // Hardcode enable SVE with 256-bit wide registers.
-  SupportsSVE128 = ForceSVEWidth() ? ForceSVEWidth() >= 128 : true;
-  SupportsSVE256 = ForceSVEWidth() ? ForceSVEWidth() >= 256 : true;
+  HostFeatures.SupportsSVE128 = ForceSVEWidth() ? ForceSVEWidth() >= 128 : true;
+  HostFeatures.SupportsSVE256 = ForceSVEWidth() ? ForceSVEWidth() >= 256 : true;
 #else
-  SupportsSVE128 = Features.Has(vixl::CPUFeatures::Feature::kSVE2);
-  SupportsSVE256 = Features.Has(vixl::CPUFeatures::Feature::kSVE2) && ReadSVEVectorLengthInBits() >= 256;
+  HostFeatures.SupportsSVE128 = Features.Has(vixl::CPUFeatures::Feature::kSVE2);
+  HostFeatures.SupportsSVE256 = Features.Has(vixl::CPUFeatures::Feature::kSVE2) && ReadSVEVectorLengthInBits() >= 256;
 #endif
-  SupportsAVX = true;
+  HostFeatures.SupportsAVX = true;
 
-  SupportsAES256 = SupportsAVX && SupportsAES;
+  HostFeatures.SupportsAES256 = HostFeatures.SupportsAVX && HostFeatures.SupportsAES;
 
-  SupportsBMI1 = true;
-  SupportsBMI2 = true;
-  SupportsCLWB = true;
+  HostFeatures.SupportsBMI1 = true;
+  HostFeatures.SupportsBMI2 = true;
+  HostFeatures.SupportsCLWB = true;
 
-  if (!SupportsAtomics) {
+  if (!HostFeatures.SupportsAtomics) {
     WARN_ONCE_FMT("Host CPU doesn't support atomics. Expect bad performance");
   }
 
@@ -196,8 +195,8 @@ HostFeatures::HostFeatures() {
   uint64_t CTR;
   __asm volatile("mrs %[ctr], ctr_el0" : [ctr] "=r"(CTR));
 
-  DCacheLineSize = 4 << ((CTR >> 16) & 0xF);
-  ICacheLineSize = 4 << (CTR & 0xF);
+  HostFeatures.DCacheLineSize = 4 << ((CTR >> 16) & 0xF);
+  HostFeatures.ICacheLineSize = 4 << (CTR & 0xF);
 
   // Test if this CPU supports float exception trapping by attempting to enable
   // On unsupported these bits are architecturally defined as RAZ/WI
@@ -212,12 +211,12 @@ HostFeatures::HostFeatures() {
   uint32_t FPCR = OriginalFPCR | ExceptionEnableTraps;
   SetFPCR(FPCR);
   FPCR = GetFPCR();
-  SupportsFloatExceptions = (FPCR & ExceptionEnableTraps) == ExceptionEnableTraps;
+  HostFeatures.SupportsFloatExceptions = (FPCR & ExceptionEnableTraps) == ExceptionEnableTraps;
 
   // Set FPCR back to original just in case anything changed
   SetFPCR(OriginalFPCR);
 
-  if (SupportsRAND) {
+  if (HostFeatures.SupportsRAND) {
     const auto MIDR = GetMIDR();
     constexpr uint32_t Implementer_QCOM = 0x51;
     constexpr uint32_t PartNum_Oryon1 = 0x001;
@@ -231,16 +230,16 @@ HostFeatures::HostFeatures() {
       // This is contrary to x86 RNG behaviour where it allows spurious failure with RDSEED, but guarantees eventual success.
       // This manifested itself on Linux when an x86 processor failed to guarantee forward progress and boot of services would infinite
       // loop. Just disable this extension if this CPU is detected.
-      SupportsRAND = false;
+      HostFeatures.SupportsRAND = false;
     }
   }
 #endif
 
 #ifdef VIXL_SIMULATOR
   // simulator doesn't support dc(ZVA)
-  SupportsCLZERO = false;
+  HostFeatures.SupportsCLZERO = false;
   // Simulator doesn't support SHA
-  SupportsSHA = false;
+  HostFeatures.SupportsSHA = false;
 #else
   // Check if we can support cacheline clears
   uint32_t DCZID = GetDCZID();
@@ -249,31 +248,32 @@ HostFeatures::HostFeatures() {
     uint32_t DCZID_Bytes = (1 << DCZID_Log2) * sizeof(uint32_t);
     // If the DC ZVA size matches the emulated cache line size
     // This means we can use the instruction
-    SupportsCLZERO = DCZID_Bytes == CPUIDEmu::CACHELINE_SIZE;
+    constexpr static uint64_t CACHELINE_SIZE = 64;
+    HostFeatures.SupportsCLZERO = DCZID_Bytes == CACHELINE_SIZE;
   }
 #endif
 
 #if defined(_M_X86_64)
   // Hardcoded cacheline size.
-  DCacheLineSize = 64U;
-  ICacheLineSize = 64U;
+  HostFeatures.DCacheLineSize = 64U;
+  HostFeatures.ICacheLineSize = 64U;
 
 #if !defined(VIXL_SIMULATOR)
   Xbyak::util::Cpu X86Features {};
-  SupportsAES = X86Features.has(Xbyak::util::Cpu::tAESNI);
-  SupportsCRC = X86Features.has(Xbyak::util::Cpu::tSSE42);
-  SupportsRAND = X86Features.has(Xbyak::util::Cpu::tRDRAND) && X86Features.has(Xbyak::util::Cpu::tRDSEED);
-  SupportsRCPC = true;
-  SupportsTSOImm9 = true;
-  Supports3DNow = X86Features.has(Xbyak::util::Cpu::t3DN) && X86Features.has(Xbyak::util::Cpu::tE3DN);
-  SupportsSSE4A = X86Features.has(Xbyak::util::Cpu::tSSE4a);
-  SupportsAVX = true;
-  SupportsSHA = X86Features.has(Xbyak::util::Cpu::tSHA);
-  SupportsBMI1 = X86Features.has(Xbyak::util::Cpu::tBMI1);
-  SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2);
-  SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB);
-  SupportsPMULL_128Bit = X86Features.has(Xbyak::util::Cpu::tPCLMULQDQ);
-  SupportsAES256 = SupportsAES && X86Features.has(Xbyak::util::Cpu::tVAES);
+  HostFeatures.SupportsAES = X86Features.has(Xbyak::util::Cpu::tAESNI);
+  HostFeatures.SupportsCRC = X86Features.has(Xbyak::util::Cpu::tSSE42);
+  HostFeatures.SupportsRAND = X86Features.has(Xbyak::util::Cpu::tRDRAND) && X86Features.has(Xbyak::util::Cpu::tRDSEED);
+  HostFeatures.SupportsRCPC = true;
+  HostFeatures.SupportsTSOImm9 = true;
+  HostFeatures.Supports3DNow = X86Features.has(Xbyak::util::Cpu::t3DN) && X86Features.has(Xbyak::util::Cpu::tE3DN);
+  HostFeatures.SupportsSSE4A = X86Features.has(Xbyak::util::Cpu::tSSE4a);
+  HostFeatures.SupportsAVX = true;
+  HostFeatures.SupportsSHA = X86Features.has(Xbyak::util::Cpu::tSHA);
+  HostFeatures.SupportsBMI1 = X86Features.has(Xbyak::util::Cpu::tBMI1);
+  HostFeatures.SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2);
+  HostFeatures.SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB);
+  HostFeatures.SupportsPMULL_128Bit = X86Features.has(Xbyak::util::Cpu::tPCLMULQDQ);
+  HostFeatures.SupportsAES256 = HostFeatures.SupportsAES && X86Features.has(Xbyak::util::Cpu::tVAES);
 
   // xbyak doesn't know how to check for CLZero
   // First ensure we support a new enough extended CPUID function range
@@ -283,14 +283,14 @@ HostFeatures::HostFeatures() {
   if (data[0] >= 0x8000'0008U) {
     // CLZero defined in 8000_00008_EBX[bit 0]
     Xbyak::util::Cpu::getCpuid(0x8000'0008, data);
-    SupportsCLZERO = data[1] & 1;
+    HostFeatures.SupportsCLZERO = data[1] & 1;
   }
 
-  SupportsAFP = true;
-  SupportsFloatExceptions = true;
+  HostFeatures.SupportsAFP = true;
+  HostFeatures.SupportsFloatExceptions = true;
 #endif
 #endif
-  SupportsPreserveAllABI = FEXCORE_HAS_PRESERVE_ALL_ATTR;
+  HostFeatures.SupportsPreserveAllABI = FEX_HAS_PRESERVE_ALL_ATTR;
 
   if (!Is64BitMode()) {
     ///< Always disable AVX and AVX2 in 32-bit mode.
@@ -299,9 +299,10 @@ HostFeatures::HostFeatures() {
     //   - 32bytes * 16 registers = 512 bytes for YMM registers.
     // There are known game failures on real x86 hardware where a 32-bit game is running up against the wall on stack space on non-AVX
     // hardware and then explodes when run on AVX hardware. This is to guard against that.
-    SupportsAVX = false;
+    HostFeatures.SupportsAVX = false;
   }
 
-  OverrideFeatures(this, ForceSVEWidth());
+  OverrideFeatures(&HostFeatures, ForceSVEWidth());
+  return HostFeatures;
 }
-} // namespace FEXCore
+} // namespace FEX
diff --git a/Source/Common/HostFeatures.h b/Source/Common/HostFeatures.h
new file mode 100644
index 000000000..29a85042c
--- /dev/null
+++ b/Source/Common/HostFeatures.h
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: MIT
+#pragma once
+#include <FEXCore/Core/HostFeatures.h>
+
+namespace FEX {
+FEXCore::HostFeatures FetchHostFeatures();
+}
diff --git a/Source/Tools/CodeSizeValidation/Main.cpp b/Source/Tools/CodeSizeValidation/Main.cpp
index 7017f35b7..d35197ade 100644
--- a/Source/Tools/CodeSizeValidation/Main.cpp
+++ b/Source/Tools/CodeSizeValidation/Main.cpp
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: MIT
 #include "DummyHandlers.h"
+#include "Common/HostFeatures.h"
 #include "FEXCore/Core/Context.h"
 #include "FEXCore/Debug/InternalThreadState.h"
 #include <FEXCore/Config/Config.h>
@@ -598,6 +599,11 @@ int main(int argc, char** argv, char** const envp) {
   // Create FEXCore context.
   auto CTX = FEXCore::Context::Context::CreateNewContext();
 
+  {
+    auto HostFeatures = FEX::FetchHostFeatures();
+    CTX->SetHostFeatures(HostFeatures);
+  }
+
   auto SignalDelegation = FEX::DummyHandlers::CreateSignalDelegator();
   auto SyscallHandler = FEX::DummyHandlers::CreateSyscallHandler();
 
diff --git a/Source/Tools/FEXLoader/FEXLoader.cpp b/Source/Tools/FEXLoader/FEXLoader.cpp
index e38921274..c3612824f 100644
--- a/Source/Tools/FEXLoader/FEXLoader.cpp
+++ b/Source/Tools/FEXLoader/FEXLoader.cpp
@@ -10,6 +10,7 @@ $end_info$
 #include "Common/ArgumentLoader.h"
 #include "Common/FEXServerClient.h"
 #include "Common/Config.h"
+#include "Common/HostFeatures.h"
 #include "ELFCodeLoader.h"
 #include "VDSO_Emulation.h"
 #include "LinuxSyscalls/GdbServer.h"
@@ -454,6 +455,11 @@ int main(int argc, char** argv, char** const envp) {
 
   auto CTX = FEXCore::Context::Context::CreateNewContext();
 
+  {
+    auto HostFeatures = FEX::FetchHostFeatures();
+    CTX->SetHostFeatures(HostFeatures);
+  }
+
   // Setup TSO hardware emulation immediately after initializing the context.
   FEX::TSO::SetupTSOEmulation(CTX.get());
 
diff --git a/Source/Tools/TestHarnessRunner/CMakeLists.txt b/Source/Tools/TestHarnessRunner/CMakeLists.txt
index d18bd0a01..da29e6e80 100644
--- a/Source/Tools/TestHarnessRunner/CMakeLists.txt
+++ b/Source/Tools/TestHarnessRunner/CMakeLists.txt
@@ -22,3 +22,4 @@ target_link_libraries(TestHarnessRunner
     ${LIBS}
     ${PTHREAD_LIB}
 )
+target_include_directories(TestHarnessRunner PRIVATE ${CMAKE_SOURCE_DIR}/External/xbyak/)
diff --git a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
index 45fe76392..926d01029 100644
--- a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
+++ b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp
@@ -18,6 +18,7 @@ $end_info$
 #endif
 
 #include "Common/ArgumentLoader.h"
+#include "Common/HostFeatures.h"
 #include "HarnessHelpers.h"
 #include "TestHarnessRunner/HostRunner.h"
 
@@ -247,7 +248,9 @@ int main(int argc, char** argv, char** const envp) {
 
   FEXCore::Context::InitializeStaticTables(Loader.Is64BitMode() ? FEXCore::Context::MODE_64BIT : FEXCore::Context::MODE_32BIT);
 
+  auto HostFeatures = FEX::FetchHostFeatures();
   auto CTX = FEXCore::Context::Context::CreateNewContext();
+  CTX->SetHostFeatures(HostFeatures);
 
 #ifndef _WIN32
   auto SignalDelegation = FEX::HLE::CreateSignalDelegator(CTX.get(), {});
@@ -260,7 +263,6 @@ int main(int argc, char** argv, char** const envp) {
 #endif
 
   // Skip any tests that the host doesn't support features for
-  auto HostFeatures = CTX->GetHostFeatures();
   SupportsAVX = HostFeatures.SupportsAVX;
 
   bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) || (!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) ||
diff --git a/Source/Windows/ARM64EC/Module.cpp b/Source/Windows/ARM64EC/Module.cpp
index 8f74518e0..0d8f0fbb9 100644
--- a/Source/Windows/ARM64EC/Module.cpp
+++ b/Source/Windows/ARM64EC/Module.cpp
@@ -25,6 +25,7 @@ $end_info$
 #include <FEXCore/Utils/TypeDefines.h>
 
 #include "Common/Config.h"
+#include "Common/HostFeatures.h"
 #include "Common/InvalidationTracker.h"
 #include "Common/TSOHandlerConfig.h"
 #include "Common/CPUFeatures.h"
@@ -468,6 +469,11 @@ NTSTATUS ProcessInit() {
   Exception::HandlerConfig.emplace();
 
   CTX = FEXCore::Context::Context::CreateNewContext();
+  {
+    auto HostFeatures = FEX::FetchHostFeatures();
+    CTX->SetHostFeatures(HostFeatures);
+  }
+
   CTX->SetSignalDelegator(SignalDelegator.get());
   CTX->SetSyscallHandler(SyscallHandler.get());
   CTX->InitCore();
diff --git a/Source/Windows/WOW64/Module.cpp b/Source/Windows/WOW64/Module.cpp
index 5837b669e..d334cbbd6 100644
--- a/Source/Windows/WOW64/Module.cpp
+++ b/Source/Windows/WOW64/Module.cpp
@@ -26,6 +26,7 @@ $end_info$
 #include <FEXCore/Utils/TypeDefines.h>
 
 #include "Common/Config.h"
+#include "Common/HostFeatures.h"
 #include "Common/TSOHandlerConfig.h"
 #include "Common/InvalidationTracker.h"
 #include "Common/CPUFeatures.h"
@@ -434,6 +435,11 @@ void BTCpuProcessInit() {
   Context::HandlerConfig.emplace();
 
   CTX = FEXCore::Context::Context::CreateNewContext();
+  {
+    auto HostFeatures = FEX::FetchHostFeatures();
+    CTX->SetHostFeatures(HostFeatures);
+  }
+
   CTX->SetSignalDelegator(SignalDelegator.get());
   CTX->SetSyscallHandler(SyscallHandler.get());
   CTX->InitCore();