diff --git a/.clang-format-ignore b/.clang-format-ignore
index 33d78802c..1e70ce6bb 100644
--- a/.clang-format-ignore
+++ b/.clang-format-ignore
@@ -7,3 +7,6 @@ FEXCore/Source/Interface/Core/X86Tables/*
 # Inline headers with list-like content that can't be processed individually
 Source/Tools/LinuxEmulation/LinuxSyscalls/x*/SyscallsNames.inl
 Source/Tools/LinuxEmulation/LinuxSyscalls/x*/Ioctl/*.inl
+
+# Include files in unittests
+unittests/*ASM/Includes/*.inc
diff --git a/FEXCore/Source/Common/SoftFloat.h b/FEXCore/Source/Common/SoftFloat.h
index aa81c8a61..66e56a469 100644
--- a/FEXCore/Source/Common/SoftFloat.h
+++ b/FEXCore/Source/Common/SoftFloat.h
@@ -504,6 +504,47 @@ struct FEX_PACKED X80SoftFloat {
     return FEXCore::BitCast<float>(Result);
   }
 
+  bool IsSignalingNaN() const {
+    return (Exponent == 0x7FFF) && (Significand & 0x8000000000000000ULL) && !(Significand & 0x4000000000000000ULL) && // Bit 62 clear (signaling)
+           (Significand & 0x3FFFFFFFFFFFFFFFULL);
+  }
+
+  bool IsQuietNaN() const {
+    return (Exponent == 0x7FFF) && (Significand & 0x8000000000000000ULL) && (Significand & 0x4000000000000000ULL); // Bit 62 set (quiet)
+  }
+
+  // Helper to detect if this is any NaN
+  bool IsNaN() const {
+    return IsSignalingNaN() || IsQuietNaN();
+  }
+
+  // X87 value to F64 while preserving signaling nan property
+  double ToF64_PreserveNan(softfloat_state* state) const {
+    if (IsSignalingNaN()) {
+      // we keep it as a signaling nan in ieee754 in 64bits
+      uint64_t sign_bit = Sign ? 0x8000000000000000ULL : 0;
+      uint64_t exp_bits = 0x7FF0000000000000ULL;
+      uint64_t x87_frac = Significand & 0x3FFFFFFFFFFFFFFFULL;
+      uint64_t ieee_frac = (x87_frac >> 11) & 0x0007FFFFFFFFFFFFULL;
+
+      if (ieee_frac == 0) {
+        ieee_frac = 1;
+      }
+      ieee_frac &= ~0x0008000000000000ULL;
+
+      uint64_t result_bits = sign_bit | exp_bits | ieee_frac;
+      return FEXCore::BitCast<double>(result_bits);
+    } else if (IsQuietNaN()) {
+      const float64_t Result = extF80_to_f64(state, *this);
+      uint64_t result_bits = FEXCore::BitCast<uint64_t>(Result);
+      result_bits |= 0x0008000000000000ULL;
+      return FEXCore::BitCast<double>(result_bits);
+    } else {
+      const float64_t Result = extF80_to_f64(state, *this);
+      return FEXCore::BitCast<double>(Result);
+    }
+  }
+
   double ToF64(softfloat_state* state) const {
     const float64_t Result = extF80_to_f64(state, *this);
     return FEXCore::BitCast<double>(Result);
@@ -584,6 +625,39 @@ struct FEX_PACKED X80SoftFloat {
     *this = f64_to_extF80(state, FEXCore::BitCast<float64_t>(rhs));
   }
 
+  // Create X80SoftFloat from double while preserving NaN signaling properties
+  static X80SoftFloat FromF64_PreserveNaN(softfloat_state* state, double value) {
+    uint64_t bits = FEXCore::BitCast<uint64_t>(value);
+
+    // Check if it's a nan
+    if ((bits & 0x7FF0000000000000ULL) == 0x7FF0000000000000ULL && (bits & 0x000FFFFFFFFFFFFFULL) != 0) {
+
+      X80SoftFloat result;
+      result.Sign = (bits >> 63) & 1;
+      result.Exponent = 0x7FFF;
+
+      bool is_signaling = !(bits & 0x0008000000000000ULL);
+      uint64_t ieee_payload = bits & 0x0007FFFFFFFFFFFFULL;
+
+      // set bit 63 required for x87
+      result.Significand = 0x8000000000000000ULL;
+
+      if (is_signaling) { // clear bit 62 for signaling nan
+        result.Significand &= ~0x4000000000000000ULL;
+      } else { // clear bit 62 for quiet nan
+        result.Significand |= 0x4000000000000000ULL;
+      }
+
+      // ieee754 51-bit payload -> x87 62-bit payload
+      result.Significand |= (ieee_payload << 11) & 0x3FFFFFFFFFFFFFFFULL;
+
+      return result;
+    }
+
+    // For non-NaN values, use standard conversion
+    return X80SoftFloat(state, value);
+  }
+
   X80SoftFloat(softfloat_state* state, BIGFLOAT rhs) {
 #if BIGFLOATSIZE == 16
     *this = f128_to_extF80(state, FEXCore::BitCast<float128_t>(rhs));
diff --git a/FEXCore/Source/Interface/Config/Config.json.in b/FEXCore/Source/Interface/Config/Config.json.in
index b214a9efb..6507854b9 100644
--- a/FEXCore/Source/Interface/Config/Config.json.in
+++ b/FEXCore/Source/Interface/Config/Config.json.in
@@ -396,6 +396,14 @@
           "Emulates X87 floating point using 64-bit precision. This reduces emulation accuracy and may result in rendering bugs."
         ]
       },
+      "X87StrictReducedPrecision": {
+        "Type": "bool",
+        "Default": "false",
+        "Desc": [
+          "Enables stricter X87 floating point behavior when X87ReducedPrecision is enabled.",
+          "Adds additional checks and implementations like NaN propagation for better compatibility."
+        ]
+      },
       "ABILocalFlags": {
         "Type": "bool",
         "Default": "false",
diff --git a/FEXCore/Source/Interface/Context/Context.h b/FEXCore/Source/Interface/Context/Context.h
index b44dd3075..2b5188399 100644
--- a/FEXCore/Source/Interface/Context/Context.h
+++ b/FEXCore/Source/Interface/Context/Context.h
@@ -207,6 +207,7 @@ public:
     FEX_CONFIG_OPT(GDBSymbols, GDBSYMBOLS);
     FEX_CONFIG_OPT(ParanoidTSO, PARANOIDTSO);
     FEX_CONFIG_OPT(x87ReducedPrecision, X87REDUCEDPRECISION);
+    FEX_CONFIG_OPT(x87StrictReducedPrecision, X87STRICTREDUCEDPRECISION);
     FEX_CONFIG_OPT(DisableTelemetry, DISABLETELEMETRY);
     FEX_CONFIG_OPT(DisableVixlIndirectCalls, DISABLE_VIXL_INDIRECT_RUNTIME_CALLS);
     FEX_CONFIG_OPT(SmallTSCScale, SMALLTSCSCALE);
@@ -322,6 +323,13 @@ protected:
     }
   }
 
+  void UpdateX87PrecisionConfig() {
+    // If strict reduced precision is enabled, automatically enable reduced precision
+    if (Config.x87StrictReducedPrecision() && !Config.x87ReducedPrecision()) {
+      FEXCore::Config::Set(FEXCore::Config::CONFIG_X87REDUCEDPRECISION, "1");
+    }
+  }
+
 private:
   /**
    * @brief Initializes the JIT compilers for the thread
diff --git a/FEXCore/Source/Interface/Core/Core.cpp b/FEXCore/Source/Interface/Core/Core.cpp
index 29ddbab75..49ba8a7be 100644
--- a/FEXCore/Source/Interface/Core/Core.cpp
+++ b/FEXCore/Source/Interface/Core/Core.cpp
@@ -57,20 +57,13 @@ $end_info$
 #include <algorithm>
 #include <array>
 #include <atomic>
-#include <chrono>
-#include <condition_variable>
 #include <fcntl.h>
 #include <functional>
 #include <mutex>
-#include <queue>
 #include <shared_mutex>
-#include <signal.h>
 #include <stdio.h>
-#include <string_view>
 #include <sys/stat.h>
-#include <type_traits>
 #include <unistd.h>
-#include <unordered_map>
 #include <utility>
 #include <xxhash.h>
 
@@ -100,6 +93,8 @@ ContextImpl::ContextImpl(const FEXCore::HostFeatures& Features)
 
   // Track atomic TSO emulation configuration.
   UpdateAtomicTSOEmulationConfig();
+  // Ensure X87 precision constraints are respected.
+  UpdateX87PrecisionConfig();
 }
 
 struct GetFrameBlockInfoResult {
diff --git a/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/F80Fallbacks.h b/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/F80Fallbacks.h
index 06f03fde5..1865564a7 100644
--- a/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/F80Fallbacks.h
+++ b/FEXCore/Source/Interface/Core/Interpreter/Fallbacks/F80Fallbacks.h
@@ -2,11 +2,13 @@
 #pragma once
 #include "Common/SoftFloat.h"
 
+#include "Interface/Context/Context.h"
 #include "Interface/Core/Interpreter/Fallbacks/FallbackOpHandler.h"
 #include "Interface/IR/IR.h"
 
 #include <FEXCore/Debug/InternalThreadState.h>
 #include <FEXCore/Utils/SHMStats.h>
+#include <FEXCore/Config/Config.h>
 
 namespace FEXCore::CPU {
 FEXCORE_PRESERVE_ALL_ATTR static softfloat_state SoftFloatStateFromFCW(uint16_t FCW, bool Force80BitPrecision = false) {
@@ -77,6 +79,12 @@ struct OpHandlers<IR::OP_F80CVTTO> {
   FEXCORE_PRESERVE_ALL_ATTR static VectorRegType handle8(uint16_t FCW, double src, FEXCore::Core::CpuStateFrame* Frame) {
     FEXCORE_PROFILE_INSTANT_INCREMENT(Frame->Thread, AccumulatedFloatFallbackCount, 1);
     ScopedSoftFloatState State {FCW, Frame};
+    auto Context = static_cast<Context::ContextImpl*>(Frame->Thread->CTX);
+    auto ReducedPrecisionMode = Context->Config.x87ReducedPrecision;
+    auto StrictReducedPrecisionMode = Context->Config.x87StrictReducedPrecision;
+    if (!ReducedPrecisionMode || StrictReducedPrecisionMode) {
+      return X80SoftFloat::FromF64_PreserveNaN(&State.State, src);
+    }
     return X80SoftFloat(&State.State, src);
   }
 };
@@ -115,6 +123,12 @@ struct OpHandlers<IR::OP_F80CVT> {
   FEXCORE_PRESERVE_ALL_ATTR static double handle8(uint16_t FCW, VectorRegType src, FEXCore::Core::CpuStateFrame* Frame) {
     FEXCORE_PROFILE_INSTANT_INCREMENT(Frame->Thread, AccumulatedFloatFallbackCount, 1);
     ScopedSoftFloatState State {FCW, Frame};
+    auto Context = static_cast<Context::ContextImpl*>(Frame->Thread->CTX);
+    auto ReducedPrecisionMode = Context->Config.x87ReducedPrecision;
+    auto StrictReducedPrecisionMode = Context->Config.x87StrictReducedPrecision;
+    if (!ReducedPrecisionMode || StrictReducedPrecisionMode) {
+      return X80SoftFloat(src).ToF64_PreserveNan(&State.State);
+    }
     return X80SoftFloat(src).ToF64(&State.State);
   }
 };
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
index 1d229e25b..d55aa4f36 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
@@ -1329,6 +1329,7 @@ protected:
 
 private:
   FEX_CONFIG_OPT(ReducedPrecisionMode, X87REDUCEDPRECISION);
+  FEX_CONFIG_OPT(StrictReducedPrecisionMode, X87STRICTREDUCEDPRECISION);
 
   struct JumpTargetInfo {
     Ref BlockEntry;
diff --git a/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp
index 6ecd1c10e..c367bbaeb 100644
--- a/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp
+++ b/FEXCore/Source/Interface/IR/Passes/x87StackOptimizationPass.cpp
@@ -158,7 +158,9 @@ public:
     : Features(Features)
     , GPROpSize(GPROpSize) {
     FEX_CONFIG_OPT(ReducedPrecision, X87REDUCEDPRECISION);
+    FEX_CONFIG_OPT(StrictReducedPrecision, X87STRICTREDUCEDPRECISION);
     ReducedPrecisionMode = ReducedPrecision;
+    StrictReducedPrecisionMode = StrictReducedPrecision;
   }
   void Run(IREmitter* Emit) override;
 
@@ -166,10 +168,12 @@ private:
   const FEXCore::HostFeatures& Features;
   const OpSize GPROpSize;
   bool ReducedPrecisionMode;
+  bool StrictReducedPrecisionMode;
   FEX_CONFIG_OPT(DisableVixlIndirectCalls, DISABLE_VIXL_INDIRECT_RUNTIME_CALLS);
 
   // Helpers
   Ref RotateRight8(uint32_t V, Ref Amount);
+  Ref SilenceNaN(Ref Value);
 
   void F80SplitStore_Helper(const IROp_StoreStackMem* Op, Ref StackNode) {
     Ref AddrNode = IR->GetNode(Op->Addr);
@@ -204,6 +208,9 @@ private:
     case OpSize::i32Bit:
     case OpSize::i64Bit: {
       StackNode = IREmit->_F80CVT(Op->StoreSize, StackNode);
+      if (!ReducedPrecisionMode || StrictReducedPrecisionMode) {
+        StackNode = SilenceNaN(StackNode);
+      }
       IREmit->_StoreMem(FPRClass, Op->StoreSize, StackNode, AddrNode, Offset, Align, OffsetType, OffsetScale);
       break;
     }
@@ -235,6 +242,10 @@ private:
     MemOffsetType OffsetType = Op->OffsetType;
     uint8_t OffsetScale = Op->OffsetScale;
 
+    if ((!ReducedPrecisionMode || StrictReducedPrecisionMode) && Op->StoreSize != OpSize::f80Bit) {
+      StackNode = SilenceNaN(StackNode);
+    }
+
     switch (Op->StoreSize) {
     case OpSize::i32Bit: {
       StackNode = IREmit->_Float_FToF(OpSize::i32Bit, OpSize::i64Bit, StackNode);
@@ -489,6 +500,15 @@ inline Ref X87StackOptimization::RotateRight8(uint32_t V, Ref Amount) {
   return IREmit->_Lshr(OpSize::i32Bit, GetConstant(V | (V << 8)), Amount);
 }
 
+inline Ref X87StackOptimization::SilenceNaN(Ref Value) {
+  Ref GPRValue = IREmit->_VExtractToGPR(OpSize::i64Bit, OpSize::i64Bit, Value, 0);
+
+  IREmit->_FCmp(OpSize::i64Bit, Value, Value); // Comparison with itself should set VS if nan
+  Ref QuietNaNGPR = IREmit->_Or(OpSize::i64Bit, GPRValue, IREmit->_Constant(0x0008000000000000ULL));
+  Ref SilencedValue = IREmit->_VCastFromGPR(OpSize::i64Bit, OpSize::i64Bit, QuietNaNGPR);
+  return IREmit->_NZCVSelectV(OpSize::i64Bit, CondClassType {COND_VS}, SilencedValue, Value);
+}
+
 inline std::optional<X87StackOptimization::StackMemberInfo> X87StackOptimization::MigrateToSlowPath_IfInvalid(uint8_t Offset) {
   const auto& [Valid, StackMember] = StackData.top(Offset);
   MigrateToSlowPathIf(Valid != StackSlot::VALID);
diff --git a/Source/Tools/FEXConfig/main.qml b/Source/Tools/FEXConfig/main.qml
index d23b16783..2437dcbe0 100644
--- a/Source/Tools/FEXConfig/main.qml
+++ b/Source/Tools/FEXConfig/main.qml
@@ -721,10 +721,17 @@ ApplicationWindow {
             }
 
             ConfigCheckBox {
+                id: x87ReducedPrecisionCheckbox
                 text: qsTr("Reduced x87 precision")
                 config: "X87ReducedPrecision"
             }
 
+            ConfigCheckBox {
+                text: qsTr("Strict reduced x87 precision")
+                config: "X87StrictReducedPrecision"
+                enabled: x87ReducedPrecisionCheckbox.checked
+            }
+
             ConfigCheckBox {
                 text: qsTr("Unsafe local flags optimization")
                 config: "ABILocalFlags"
diff --git a/unittests/32Bit_ASM/CMakeLists.txt b/unittests/32Bit_ASM/CMakeLists.txt
index 462b319d4..bce760836 100644
--- a/unittests/32Bit_ASM/CMakeLists.txt
+++ b/unittests/32Bit_ASM/CMakeLists.txt
@@ -38,7 +38,7 @@ foreach(ASM_SRC ${ASM_SOURCES})
 
   add_custom_command(OUTPUT ${OUTPUT_NAME}
     DEPENDS "${TMP_FILE}"
-    COMMAND "nasm" ARGS "${TMP_FILE}" "-o" "${OUTPUT_NAME}")
+    COMMAND "nasm" ARGS "-i" "${CMAKE_SOURCE_DIR}/unittests/32Bit_ASM/Includes/" "${TMP_FILE}" "-o" "${OUTPUT_NAME}")
 
   add_custom_command(OUTPUT ${OUTPUT_CONFIG_NAME}
     DEPENDS "${ASM_SRC}"
diff --git a/unittests/32Bit_ASM/Includes/nan_test_macros.inc b/unittests/32Bit_ASM/Includes/nan_test_macros.inc
new file mode 100644
index 000000000..c730fc915
--- /dev/null
+++ b/unittests/32Bit_ASM/Includes/nan_test_macros.inc
@@ -0,0 +1,130 @@
+; NaN Testing Macros for 32-bit Assembly Tests
+; Implements NaN triple testing system:
+; - Bit 2: 1 if value is NaN
+; - Bit 1: 1 if quiet NaN
+; - Bit 0: 1 if signaling NaN
+;
+; Triple values:
+; 0b000 (0): Not a NaN
+; 0b101 (5): Signaling NaN
+; 0b110 (6): Quiet NaN
+;
+; ASSUMPTION: All input pointers (edx) are valid and non-null
+
+; Macro: CHECK_NAN_TRIPLE_32
+; Checks 32-bit float NaN classification and returns triple in EAX
+; Input: 32-bit float value in xmm0
+; Output: NaN triple in EAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_32 0
+  push ecx
+  push esi
+  push edx
+  
+  xor eax, eax
+  ucomiss xmm0, xmm0
+  setp al
+  mov ecx, eax
+  shl ecx, 2
+  
+  ; Extract and check quiet bit (bit 22)
+  movd edx, xmm0
+  and edx, 0x00400000
+  mov esi, edx
+  shr esi, 22
+  and esi, eax
+  and esi, 1
+  shl esi, 1
+  add ecx, esi
+  
+  ; Check for signaling NaN (NaN but not quiet)
+  test edx, edx
+  sete dl
+  and dl, al
+  movzx eax, dl
+  or eax, ecx
+  
+  pop edx
+  pop esi
+  pop ecx
+%endmacro
+
+; Macro: CHECK_NAN_TRIPLE_64
+; Checks 64-bit double NaN classification and returns triple in EAX
+; Input: 64-bit double value should be pre-stored at [edx] by caller
+; Output: NaN triple in EAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_64 0
+  push ebx
+  push esi
+  sub esp, 12
+  
+  ; Load 64-bit double and use SSE for NaN comparison
+  movsd xmm0, qword [edx]
+  xor eax, eax
+  ucomisd xmm0, xmm0
+  setp al
+  
+  mov ecx, eax
+  movsd qword [esp], xmm0
+  mov edx, 524288
+  and edx, [esp + 4]
+  shl ecx, 2
+  
+  ; Extract quiet bit (bit 51)
+  mov ebx, edx
+  shr ebx, 19
+  and bl, al
+  movzx esi, bl
+  lea ecx, [ecx + 2*esi]
+  
+  ; Check for signaling NaN (NaN but not quiet)
+  test edx, edx
+  sete dl
+  and dl, al
+  movzx eax, dl
+  or eax, ecx
+  
+  add esp, 12
+  pop esi
+  pop ebx
+%endmacro
+
+; Macro: CHECK_NAN_TRIPLE_80
+; Checks 80-bit extended precision NaN classification and returns triple in EAX
+; Input: 80-bit extended precision value in memory at [eax] (10 bytes)
+; Output: NaN triple in EAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_80 0
+  push ebx
+  push esi
+  sub esp, 20
+  
+  ; Load the 80-bit value and store copy for bit manipulation
+  fld tword [eax]
+  fld st0
+  fstp tword [esp]
+  
+  ; Get bits 63:32 from stored significand
+  mov ecx, [esp + 4]
+  xor eax, eax
+  fucomip st0
+  setp al
+  mov edx, eax
+  shl edx, 2
+  
+  ; Extract quiet bit (bit 30 in high dword)
+  mov ebx, ecx
+  shr ebx, 30
+  and bl, al
+  movzx esi, bl
+  lea edx, [edx + 2*esi]
+  
+  ; Check for signaling NaN using bt instruction
+  bt ecx, 30
+  setae cl
+  and cl, al
+  movzx eax, cl
+  or eax, edx
+  
+  add esp, 20
+  pop esi
+  pop ebx
+%endmacro
diff --git a/unittests/32Bit_ASM/X87/x87_32bit_qnan_preservation.asm b/unittests/32Bit_ASM/X87/x87_32bit_qnan_preservation.asm
new file mode 100644
index 000000000..bc216b046
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_32bit_qnan_preservation.asm
@@ -0,0 +1,36 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 quiet NaN preservation in non-reduced precision mode (32-bit)
+; This test verifies that FLDT loads a quiet NaN and preserves its nature
+; We test that loading a quiet nan preserves it
+; that then storing it as 32bit, keeps it as a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea edx, [.data]
+fld tword [edx] ; load qnan 80bit
+fstp dword [edx + 16] ; store qnan as 32bit
+
+; Check the stored 32-bit value using NaN triple macro
+lea edx, [.data + 16]
+movss xmm0, [edx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+.data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dd 0                   ; space for 32-bit result
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/x87_32bit_snan_preservation.asm b/unittests/32Bit_ASM/X87/x87_32bit_snan_preservation.asm
new file mode 100644
index 000000000..96b5e4d22
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_32bit_snan_preservation.asm
@@ -0,0 +1,36 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in non-reduced precision mode (32-bit)
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 32bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN (converted from signaling)
+
+finit
+lea edx, [.data]
+fld tword [edx] ; load snan
+fstp dword [edx + 16] ; store snan as 32bit qnan
+
+; Check the stored 32-bit value using NaN triple macro
+lea edx, [.data + 16]
+movss xmm0, [edx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+.data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dd 0                   ; space for 32-bit result
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/x87_neg_snan_roundtrip.asm b/unittests/32Bit_ASM/X87/x87_neg_snan_roundtrip.asm
new file mode 100644
index 000000000..933d40d5e
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_neg_snan_roundtrip.asm
@@ -0,0 +1,34 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling negative NaN round-trip preservation in non-reduced precision mode (32-bit)
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+lea edx, [.data]
+fld tword [edx] ; load snan 80bit
+fstp tword [edx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+lea eax, [.data + 16]
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+.data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0xffff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/x87_qnan_preservation.asm b/unittests/32Bit_ASM/X87/x87_qnan_preservation.asm
new file mode 100644
index 000000000..f07898b70
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_qnan_preservation.asm
@@ -0,0 +1,34 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 quiet NaN preservation in non-reduced precision mode (32-bit)
+; This test verifies that quiet NaNs remain quiet during conversion
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea edx, [.data]
+fld tword [edx] ; load qnan 80bit
+fstp qword [edx + 16] ; store qnan as 64bit
+
+; Check the stored 64-bit value using NaN triple macro
+lea edx, [.data + 16]
+movsd xmm0, [edx]    ; Load 64-bit double into xmm0
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+.data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dq 0                   ; space for 64-bit result
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/x87_snan_preservation.asm b/unittests/32Bit_ASM/X87/x87_snan_preservation.asm
new file mode 100644
index 000000000..08eb75ee0
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_snan_preservation.asm
@@ -0,0 +1,36 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in non-reduced precision mode (32-bit)
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 64bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+mov edx, .data
+fld tword [edx] ; load snan
+fstp qword [edx + 16] ; store snan as 64bit qnan
+
+; Check the stored 64-bit value using NaN triple macro
+mov edx, .data
+add edx, 16
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+.data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dq 0                   ; space for 64-bit result
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/x87_snan_roundtrip.asm b/unittests/32Bit_ASM/X87/x87_snan_roundtrip.asm
new file mode 100644
index 000000000..15f84b650
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/x87_snan_roundtrip.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN round-trip preservation in non-reduced precision mode (32-bit)
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+mov edx, .data
+fld tword [edx] ; load nan 80bit
+fstp tword [edx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+mov eax, edx
+add eax, 16
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+.data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0x7fff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
\ No newline at end of file
diff --git a/unittests/ASM/Includes/nan_test_macros.inc b/unittests/ASM/Includes/nan_test_macros.inc
new file mode 100644
index 000000000..fc623dbe9
--- /dev/null
+++ b/unittests/ASM/Includes/nan_test_macros.inc
@@ -0,0 +1,128 @@
+; NaN Testing Macros for Assembly Tests
+; Implements NaN triple testing system:
+; - Bit 2: 1 if value is NaN
+; - Bit 1: 1 if quiet NaN
+; - Bit 0: 1 if signaling NaN
+;
+; Triple values:
+; 0b000 (0): Not a NaN
+; 0b101 (5): Signaling NaN
+; 0b110 (6): Quiet NaN
+;
+; ASSUMPTION: All input pointers (rdx) are valid and non-null
+
+; Macro: CHECK_NAN_TRIPLE_32
+; Checks 32-bit float NaN classification and returns triple in EAX
+; Input: 32-bit float value in xmm0
+; Output: NaN triple in EAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_32 0
+  push rcx
+  push rsi
+  push rdx
+  
+  xor eax, eax
+  ucomiss xmm0, xmm0
+  setp al
+  lea rcx, [4*rax]
+  
+  ; Extract and check quiet bit (bit 22)
+  movd edx, xmm0
+  and edx, 0x00400000
+  mov esi, edx
+  shr esi, 22
+  and sil, al
+  movzx esi, sil
+  lea rcx, [rcx + 2*rsi]
+  
+  ; Check for signaling NaN (NaN but not quiet)
+  test edx, edx
+  sete dl
+  and dl, al
+  movzx eax, dl
+  or eax, ecx
+  
+  pop rdx
+  pop rsi
+  pop rcx
+%endmacro
+
+; Macro: CHECK_NAN_TRIPLE_64
+; Checks 64-bit double NaN classification and returns triple in RAX
+; Input: 64-bit double value in xmm0
+; Output: NaN triple in RAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_64 0
+  push rcx
+  push rsi
+  push rdx
+  
+  xor eax, eax
+  ucomisd xmm0, xmm0
+  setp al
+  lea rcx, [4*rax]
+  
+  ; Extract and check quiet bit (bit 51)
+  movq rdx, xmm0
+  mov rsi, 0x0008000000000000
+  and rsi, rdx
+  mov rdx, rsi
+  shr rdx, 51
+  and dl, al
+  movzx rdx, dl
+  lea rcx, [rcx + 2*rdx]
+  
+  ; Check for signaling NaN (NaN but not quiet)
+  test rsi, rsi
+  sete dl
+  and dl, al
+  movzx eax, dl
+  or eax, ecx
+  
+  pop rdx
+  pop rsi
+  pop rcx
+%endmacro
+
+; Macro: CHECK_NAN_TRIPLE_80
+; Checks 80-bit extended precision NaN classification and returns triple in RAX
+; Input: 80-bit extended precision value in memory at [rax] (10 bytes)
+; Output: NaN triple in RAX (bits 2:0)
+%macro CHECK_NAN_TRIPLE_80 0
+  push rcx
+  push rdx
+  push rsi
+  
+  ; Load the 80-bit value twice for comparison
+  fld tword [rax]
+  fld tword [rax]
+  
+  ; Store one copy to memory for bit manipulation
+  sub rsp, 16
+  fstp tword [rsp]
+  
+  ; Use fucomip for NaN detection
+  xor eax, eax
+  fucomip st0, st1
+  setp al
+  lea rdx, [4*rax]
+  
+  ; Extract and check quiet bit (bit 62)
+  mov rcx, 0x4000000000000000
+  and rcx, [rsp]
+  mov rsi, rcx
+  shr rsi, 62
+  and sil, al
+  movzx rsi, sil
+  lea rdx, [rdx + 2*rsi]
+  
+  ; Check for signaling NaN (NaN but not quiet)
+  test rcx, rcx
+  sete cl
+  and cl, al
+  movzx eax, cl
+  or eax, edx
+  
+  add rsp, 16
+  pop rsi
+  pop rdx
+  pop rcx
+%endmacro
diff --git a/unittests/ASM/X87/x87_32bit_qnan_preservation.asm b/unittests/ASM/X87/x87_32bit_qnan_preservation.asm
new file mode 100644
index 000000000..180c1589f
--- /dev/null
+++ b/unittests/ASM/X87/x87_32bit_qnan_preservation.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 quiet NaN preservation in non-reduced precision mode
+; This test verifies that FLDT loads a quiet NaN and preserves its nature
+; We test that loading a quiet nan preserves it
+; that then storing it as 32bit, keeps it as a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load qnan 80bit
+fstp dword [rdx + 16] ; store qnan as 32bit
+
+; Check the stored 32-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movss xmm0, [rdx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dd 0                   ; space for 32-bit result
\ No newline at end of file
diff --git a/unittests/ASM/X87/x87_32bit_snan_preservation.asm b/unittests/ASM/X87/x87_32bit_snan_preservation.asm
new file mode 100644
index 000000000..214a11539
--- /dev/null
+++ b/unittests/ASM/X87/x87_32bit_snan_preservation.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in non-reduced precision mode
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 32bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN (converted from signaling)
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan
+fstp dword [rdx + 16] ; store snan as 32bit qnan
+
+; Check the stored 32-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movss xmm0, [rdx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dd 0                   ; space for 32-bit result
diff --git a/unittests/ASM/X87/x87_neg_snan_roundtrip.asm b/unittests/ASM/X87/x87_neg_snan_roundtrip.asm
new file mode 100644
index 000000000..b1ede0433
--- /dev/null
+++ b/unittests/ASM/X87/x87_neg_snan_roundtrip.asm
@@ -0,0 +1,33 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 signaling negative NaN round-trip preservation in non-reduced precision mode
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan 80bit
+fstp tword [rdx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+lea rax, [rel data + 16]
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0xffff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
\ No newline at end of file
diff --git a/unittests/ASM/X87/x87_qnan_preservation.asm b/unittests/ASM/X87/x87_qnan_preservation.asm
new file mode 100644
index 000000000..edafd23e4
--- /dev/null
+++ b/unittests/ASM/X87/x87_qnan_preservation.asm
@@ -0,0 +1,33 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 quiet NaN preservation in non-reduced precision mode
+; This test verifies that quiet NaNs remain quiet during conversion
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load qnan 80bit
+fstp qword [rdx + 16] ; store qnan as 64bit
+
+; Check the stored 64-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movsd xmm0, [rdx]    ; Load 64-bit double into xmm0
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dq 0                   ; space for 64-bit result
\ No newline at end of file
diff --git a/unittests/ASM/X87/x87_snan_preservation.asm b/unittests/ASM/X87/x87_snan_preservation.asm
new file mode 100644
index 000000000..934bbc3fc
--- /dev/null
+++ b/unittests/ASM/X87/x87_snan_preservation.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in non-reduced precision mode
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 64bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan
+fstp qword [rdx + 16] ; store snan as 64bit qnan
+
+; Check the stored 64-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movsd xmm0, [rdx]    ; Load 64-bit double into xmm0
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dq 0                   ; space for 64-bit result
\ No newline at end of file
diff --git a/unittests/ASM/X87/x87_snan_roundtrip.asm b/unittests/ASM/X87/x87_snan_roundtrip.asm
new file mode 100644
index 000000000..ee2c43413
--- /dev/null
+++ b/unittests/ASM/X87/x87_snan_roundtrip.asm
@@ -0,0 +1,33 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov rsp, 0xe0000040
+
+; Test x87 signaling NaN round-trip preservation in non-reduced precision mode
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load nan 80bit
+fstp tword [rdx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+lea rax, [rel data + 16]
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0x7fff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
\ No newline at end of file
diff --git a/unittests/ASM/X87_F64/x87_32bit_qnan_preservation_F64.asm b/unittests/ASM/X87_F64/x87_32bit_qnan_preservation_F64.asm
new file mode 100644
index 000000000..7c0e55f86
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_32bit_qnan_preservation_F64.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Env": { "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 quiet NaN preservation in reduced precision mode
+; This test verifies that quiet NaNs remain quiet during conversion
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load qnan 80bit
+fstp dword [rdx + 16] ; store qnan as 32bit
+
+; Check the stored 32-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movss xmm0, [rdx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dd 0                   ; space for 32-bit result
+
diff --git a/unittests/ASM/X87_F64/x87_32bit_snan_preservation_F64.asm b/unittests/ASM/X87_F64/x87_32bit_snan_preservation_F64.asm
new file mode 100644
index 000000000..b1ecbef95
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_32bit_snan_preservation_F64.asm
@@ -0,0 +1,37 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Env": { "FEX_X87REDUCEDPRECISION" : "1", "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in reduced precision mode
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 32bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN (converted from signaling)
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan
+fstp dword [rdx + 16] ; store snan as 32bit qnan
+
+; Check the stored 32-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movss xmm0, [rdx]    ; Load 32-bit float into xmm0
+CHECK_NAN_TRIPLE_32
+
+hlt
+
+align 8
+data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dd 0                   ; space for 32-bit result
+
diff --git a/unittests/ASM/X87_F64/x87_neg_snan_roundtrip_F64.asm b/unittests/ASM/X87_F64/x87_neg_snan_roundtrip_F64.asm
new file mode 100644
index 000000000..0dac7e0ca
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_neg_snan_roundtrip_F64.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  },
+  "Env": { "FEX_X87REDUCEDPRECISION" : "1", "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling negative NaN round-trip preservation in reduced precision mode
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan 80bit
+fstp tword [rdx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+lea rax, [rel data + 16]
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0xffff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
+
diff --git a/unittests/ASM/X87_F64/x87_qnan_preservation_F64.asm b/unittests/ASM/X87_F64/x87_qnan_preservation_F64.asm
new file mode 100644
index 000000000..4dd09c85c
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_qnan_preservation_F64.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Env": { "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 quiet NaN preservation in reduced precision mode
+; This test verifies that quiet NaNs remain quiet during conversion
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load qnan 80bit
+fstp qword [rdx + 16] ; store qnan as 64bit
+
+; Check the stored 64-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movsd xmm0, [rdx]    ; Load 64-bit double into xmm0
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+data:
+  dq 0xc000000000000000  ; quiet NaN significand
+  dw 0x7fff              ; NaN exponent
+  dq 0                   ; space for 64-bit result
+
diff --git a/unittests/ASM/X87_F64/x87_snan_preservation_F64.asm b/unittests/ASM/X87_F64/x87_snan_preservation_F64.asm
new file mode 100644
index 000000000..4abd58bbe
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_snan_preservation_F64.asm
@@ -0,0 +1,37 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "6"
+  },
+  "Env": { "FEX_X87REDUCEDPRECISION" : "1", "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN non-preservation in reduced precision mode
+; This test verifies that FLDT loads a signaling NaN and DOES NOT preserve its signaling nature
+; We test that loading a signaling nan preserves it but
+; that then storing it as 64bit, transforms it to a quiet nan.
+; Returns NaN triple: 6 (0b110) for quiet NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load snan
+fstp qword [rdx + 16] ; store snan as 64bit qnan
+
+; Check the stored 64-bit value using NaN triple macro
+lea rdx, [rel data + 16]
+movsd xmm0, [rdx]    ; Load 64-bit double into xmm0
+CHECK_NAN_TRIPLE_64
+
+hlt
+
+align 8
+data:
+  dq 0xa000000000000000  ; signaling NaN significand
+  dw 0x7fff              ; signaling NaN exponent  
+  dq 0                   ; space for 64-bit result
+
diff --git a/unittests/ASM/X87_F64/x87_snan_roundtrip_F64.asm b/unittests/ASM/X87_F64/x87_snan_roundtrip_F64.asm
new file mode 100644
index 000000000..f20724b84
--- /dev/null
+++ b/unittests/ASM/X87_F64/x87_snan_roundtrip_F64.asm
@@ -0,0 +1,35 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "5"
+  },
+  "Env": { "FEX_X87REDUCEDPRECISION" : "1", "FEX_X87STRICTREDUCEDPRECISION" : "1" }
+}
+%endif
+
+%include "nan_test_macros.inc"
+
+mov esp, 0xe0000040
+
+; Test x87 signaling NaN round-trip preservation in reduced precision mode
+; This test verifies that FLDT -> FSTPT preserves signaling nan across round-trip
+; Returns NaN triple: 5 (0b101) for signaling NaN
+
+finit
+lea rdx, [rel data]
+fld tword [rdx] ; load nan 80bit
+fstp tword [rdx + 16] ; store nan as 80bit
+
+; Check the stored 80-bit value using NaN triple macro
+lea rax, [rel data + 16]
+CHECK_NAN_TRIPLE_80
+
+hlt
+
+align 16
+data:
+  dq 0xa000000000000000  ; signaling nan significand  
+  dw 0x7fff              ; signaling nan exponent
+  dw 0, 0, 0             ; padding to 16 bytes
+  dq 0, 0                ; space for 80-bit result (16 bytes)
+
diff --git a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
index d7cb79ecb..c4bab3e54 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
@@ -827,7 +827,7 @@
       "ExpectedArm64ASM": [
         "str w9, [x8, #-4]!",
         "mov x9, x8",
-        "subs w26, w8, #0x104 (260)",
+        "sub w26, w8, #0x104 (260)",
         "mov x27, x8",
         "mov x8, x26",
         "ldr w4, [x9, #16]",
@@ -865,6 +865,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-128]",
         "ldr s2, [x4]",
         "str x30, [sp, #-16]!",
@@ -913,6 +918,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr s2, [x4, #120]",
         "str x30, [sp, #-16]!",
@@ -945,6 +955,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-124]",
         "ldr s2, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -993,6 +1008,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr s2, [x4, #116]",
         "str x30, [sp, #-16]!",
@@ -1025,6 +1045,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-120]",
         "ldr s2, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -1073,6 +1098,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-12]",
         "ldr s2, [x4, #112]",
         "str x30, [sp, #-16]!",
@@ -1105,6 +1135,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-116]",
         "ldr s2, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -1153,6 +1188,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-16]",
         "ldr s2, [x4, #108]",
         "str x30, [sp, #-16]!",
@@ -1185,6 +1225,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-112]",
         "ldr s2, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -1233,6 +1278,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-20]",
         "ldr s2, [x4, #104]",
         "str x30, [sp, #-16]!",
@@ -1265,6 +1315,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-108]",
         "ldr s2, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -1313,6 +1368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-24]",
         "ldr s2, [x4, #100]",
         "str x30, [sp, #-16]!",
@@ -1345,6 +1405,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-104]",
         "ldr s2, [x4, #24]",
         "str x30, [sp, #-16]!",
@@ -1393,6 +1458,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-28]",
         "ldr s2, [x4, #96]",
         "str x30, [sp, #-16]!",
@@ -1425,6 +1495,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-100]",
         "ldr s2, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -1473,6 +1548,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-32]",
         "ldr s2, [x4, #92]",
         "str x30, [sp, #-16]!",
@@ -1505,6 +1585,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-96]",
         "ldr s2, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -1553,6 +1638,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-36]",
         "ldr s2, [x4, #88]",
         "str x30, [sp, #-16]!",
@@ -1585,6 +1675,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-92]",
         "ldr s2, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -1633,6 +1728,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-40]",
         "ldr s2, [x4, #84]",
         "str x30, [sp, #-16]!",
@@ -1665,6 +1765,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-88]",
         "ldr s2, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -1713,6 +1818,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-44]",
         "ldr s2, [x4, #80]",
         "str x30, [sp, #-16]!",
@@ -1745,6 +1855,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-84]",
         "ldr s2, [x4, #44]",
         "str x30, [sp, #-16]!",
@@ -1793,6 +1908,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-48]",
         "ldr s2, [x4, #76]",
         "str x30, [sp, #-16]!",
@@ -1825,6 +1945,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-80]",
         "ldr s2, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -1873,6 +1998,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-52]",
         "ldr s2, [x4, #72]",
         "str x30, [sp, #-16]!",
@@ -1905,6 +2035,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-76]",
         "ldr s2, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -1953,6 +2088,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-56]",
         "ldr s2, [x4, #68]",
         "str x30, [sp, #-16]!",
@@ -1985,6 +2125,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-72]",
         "ldr s2, [x4, #56]",
         "str x30, [sp, #-16]!",
@@ -2033,6 +2178,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-60]",
         "ldr s2, [x4, #64]",
         "str x30, [sp, #-16]!",
@@ -2065,6 +2215,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-68]",
         "ldr s2, [x4, #60]",
         "str x30, [sp, #-16]!",
@@ -2116,6 +2271,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-64]",
         "ldur s2, [x9, #-68]",
         "str x30, [sp, #-16]!",
@@ -2148,6 +2308,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-256]",
         "ldur s2, [x9, #-128]",
         "str x30, [sp, #-16]!",
@@ -2196,6 +2361,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-196]",
         "ldur s2, [x9, #-72]",
         "str x30, [sp, #-16]!",
@@ -2228,6 +2398,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-252]",
         "ldur s2, [x9, #-124]",
         "str x30, [sp, #-16]!",
@@ -2276,6 +2451,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-200]",
         "ldur s2, [x9, #-76]",
         "str x30, [sp, #-16]!",
@@ -2308,6 +2488,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-248]",
         "ldur s2, [x9, #-120]",
         "str x30, [sp, #-16]!",
@@ -2356,6 +2541,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-204]",
         "ldur s2, [x9, #-80]",
         "str x30, [sp, #-16]!",
@@ -2388,6 +2578,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-244]",
         "ldur s2, [x9, #-116]",
         "str x30, [sp, #-16]!",
@@ -2436,6 +2631,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-208]",
         "ldur s2, [x9, #-84]",
         "str x30, [sp, #-16]!",
@@ -2468,6 +2668,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-240]",
         "ldur s2, [x9, #-112]",
         "str x30, [sp, #-16]!",
@@ -2516,6 +2721,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-212]",
         "ldur s2, [x9, #-88]",
         "str x30, [sp, #-16]!",
@@ -2548,6 +2758,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-236]",
         "ldur s2, [x9, #-108]",
         "str x30, [sp, #-16]!",
@@ -2596,6 +2811,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-216]",
         "ldur s2, [x9, #-92]",
         "str x30, [sp, #-16]!",
@@ -2628,6 +2848,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-232]",
         "ldur s2, [x9, #-104]",
         "str x30, [sp, #-16]!",
@@ -2676,6 +2901,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-220]",
         "ldur s2, [x9, #-96]",
         "str x30, [sp, #-16]!",
@@ -2708,6 +2938,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-228]",
         "ldur s2, [x9, #-100]",
         "str x30, [sp, #-16]!",
@@ -2756,6 +2991,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-224]",
         "ldur s2, [x9, #-64]",
         "str x30, [sp, #-16]!",
@@ -2788,6 +3028,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-192]",
         "ldur s2, [x9, #-4]",
         "str x30, [sp, #-16]!",
@@ -2836,6 +3081,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-132]",
         "ldur s2, [x9, #-60]",
         "str x30, [sp, #-16]!",
@@ -2868,6 +3118,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-188]",
         "ldur s2, [x9, #-8]",
         "str x30, [sp, #-16]!",
@@ -2916,6 +3171,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-136]",
         "ldur s2, [x9, #-56]",
         "str x30, [sp, #-16]!",
@@ -2948,6 +3208,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-184]",
         "ldur s2, [x9, #-12]",
         "str x30, [sp, #-16]!",
@@ -2996,6 +3261,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-140]",
         "ldur s2, [x9, #-52]",
         "str x30, [sp, #-16]!",
@@ -3028,6 +3298,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-180]",
         "ldur s2, [x9, #-16]",
         "str x30, [sp, #-16]!",
@@ -3076,6 +3351,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-144]",
         "ldur s2, [x9, #-48]",
         "str x30, [sp, #-16]!",
@@ -3108,6 +3388,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-176]",
         "ldur s2, [x9, #-20]",
         "str x30, [sp, #-16]!",
@@ -3156,6 +3441,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-148]",
         "ldur s2, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -3188,6 +3478,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-172]",
         "ldur s2, [x9, #-24]",
         "str x30, [sp, #-16]!",
@@ -3236,6 +3531,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-152]",
         "ldur s2, [x9, #-40]",
         "str x30, [sp, #-16]!",
@@ -3268,6 +3568,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-168]",
         "ldur s2, [x9, #-28]",
         "str x30, [sp, #-16]!",
@@ -3316,6 +3621,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-156]",
         "ldur s2, [x9, #-36]",
         "str x30, [sp, #-16]!",
@@ -3348,6 +3658,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-164]",
         "ldur s2, [x9, #-32]",
         "str x30, [sp, #-16]!",
@@ -3399,6 +3714,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-160]",
         "ldur s2, [x9, #-228]",
         "str x30, [sp, #-16]!",
@@ -3431,6 +3751,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-128]",
         "ldur s2, [x9, #-256]",
         "str x30, [sp, #-16]!",
@@ -3479,6 +3804,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-100]",
         "ldur s2, [x9, #-232]",
         "str x30, [sp, #-16]!",
@@ -3511,6 +3841,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-124]",
         "ldur s2, [x9, #-252]",
         "str x30, [sp, #-16]!",
@@ -3559,6 +3894,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-104]",
         "ldur s2, [x9, #-236]",
         "str x30, [sp, #-16]!",
@@ -3591,6 +3931,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-120]",
         "ldur s2, [x9, #-248]",
         "str x30, [sp, #-16]!",
@@ -3639,6 +3984,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-108]",
         "ldur s2, [x9, #-240]",
         "str x30, [sp, #-16]!",
@@ -3671,6 +4021,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-116]",
         "ldur s2, [x9, #-244]",
         "str x30, [sp, #-16]!",
@@ -3719,6 +4074,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-112]",
         "ldur s2, [x9, #-224]",
         "str x30, [sp, #-16]!",
@@ -3751,6 +4111,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-96]",
         "ldur s2, [x9, #-196]",
         "str x30, [sp, #-16]!",
@@ -3799,6 +4164,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-68]",
         "ldur s2, [x9, #-220]",
         "str x30, [sp, #-16]!",
@@ -3831,6 +4201,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-92]",
         "ldur s2, [x9, #-200]",
         "str x30, [sp, #-16]!",
@@ -3879,6 +4254,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-72]",
         "ldur s2, [x9, #-216]",
         "str x30, [sp, #-16]!",
@@ -3911,6 +4291,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-88]",
         "ldur s2, [x9, #-204]",
         "str x30, [sp, #-16]!",
@@ -3959,6 +4344,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-76]",
         "ldur s2, [x9, #-212]",
         "str x30, [sp, #-16]!",
@@ -3991,6 +4381,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-84]",
         "ldur s2, [x9, #-208]",
         "str x30, [sp, #-16]!",
@@ -4039,6 +4434,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-80]",
         "ldur s2, [x9, #-164]",
         "str x30, [sp, #-16]!",
@@ -4071,6 +4471,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-64]",
         "ldur s2, [x9, #-192]",
         "str x30, [sp, #-16]!",
@@ -4119,6 +4524,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-36]",
         "ldur s2, [x9, #-168]",
         "str x30, [sp, #-16]!",
@@ -4151,6 +4561,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-60]",
         "ldur s2, [x9, #-188]",
         "str x30, [sp, #-16]!",
@@ -4199,6 +4614,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-40]",
         "ldur s2, [x9, #-172]",
         "str x30, [sp, #-16]!",
@@ -4231,6 +4651,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-56]",
         "ldur s2, [x9, #-184]",
         "str x30, [sp, #-16]!",
@@ -4279,6 +4704,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-44]",
         "ldur s2, [x9, #-176]",
         "str x30, [sp, #-16]!",
@@ -4311,6 +4741,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-52]",
         "ldur s2, [x9, #-180]",
         "str x30, [sp, #-16]!",
@@ -4359,6 +4794,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-48]",
         "ldur s2, [x9, #-160]",
         "str x30, [sp, #-16]!",
@@ -4391,6 +4831,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-32]",
         "ldur s2, [x9, #-132]",
         "str x30, [sp, #-16]!",
@@ -4439,6 +4884,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldur s2, [x9, #-156]",
         "str x30, [sp, #-16]!",
@@ -4471,6 +4921,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-28]",
         "ldur s2, [x9, #-136]",
         "str x30, [sp, #-16]!",
@@ -4519,6 +4974,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldur s2, [x9, #-152]",
         "str x30, [sp, #-16]!",
@@ -4551,6 +5011,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-24]",
         "ldur s2, [x9, #-140]",
         "str x30, [sp, #-16]!",
@@ -4599,6 +5064,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-12]",
         "ldur s2, [x9, #-148]",
         "str x30, [sp, #-16]!",
@@ -4631,6 +5101,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-20]",
         "ldur s2, [x9, #-144]",
         "str x30, [sp, #-16]!",
@@ -4682,6 +5157,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-16]",
         "ldr s2, [x4]",
         "str s2, [x9, #16]",
@@ -4719,6 +5199,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-256]",
         "ldur s2, [x9, #-128]",
         "str x30, [sp, #-16]!",
@@ -4768,6 +5253,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-244]",
         "ldur s2, [x9, #-120]",
         "str x30, [sp, #-16]!",
@@ -4800,6 +5290,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-252]",
         "ldur s2, [x9, #-124]",
         "str x30, [sp, #-16]!",
@@ -4849,6 +5344,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-248]",
         "ldur s2, [x9, #-100]",
         "str x30, [sp, #-16]!",
@@ -4881,6 +5381,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-240]",
         "ldur s2, [x9, #-100]",
         "str x30, [sp, #-16]!",
@@ -4921,6 +5426,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-228]",
         "ldur s2, [x9, #-104]",
         "str x30, [sp, #-16]!",
@@ -4953,6 +5463,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-236]",
         "ldur s2, [x9, #-104]",
         "str x30, [sp, #-16]!",
@@ -4993,6 +5508,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-232]",
         "ldur s2, [x9, #-84]",
         "str x30, [sp, #-16]!",
@@ -5025,6 +5545,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-224]",
         "ldur s2, [x9, #-96]",
         "str x30, [sp, #-16]!",
@@ -5065,6 +5590,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-212]",
         "ldur s2, [x9, #-88]",
         "str x30, [sp, #-16]!",
@@ -5097,6 +5627,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-220]",
         "ldur s2, [x9, #-92]",
         "str x30, [sp, #-16]!",
@@ -5137,6 +5672,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-216]",
         "ldur s2, [x9, #-68]",
         "str x30, [sp, #-16]!",
@@ -5169,6 +5709,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-208]",
         "ldur s2, [x9, #-68]",
         "str x30, [sp, #-16]!",
@@ -5209,6 +5754,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-196]",
         "ldur s2, [x9, #-72]",
         "str x30, [sp, #-16]!",
@@ -5244,6 +5794,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-204]",
         "ldur s2, [x9, #-72]",
         "str x30, [sp, #-16]!",
@@ -5284,6 +5839,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-200]",
         "ldur s2, [x9, #-64]",
         "str x30, [sp, #-16]!",
@@ -5316,6 +5876,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-192]",
         "ldur s2, [x9, #-64]",
         "str x30, [sp, #-16]!",
@@ -5356,6 +5921,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-180]",
         "ldur s2, [x9, #-60]",
         "str x30, [sp, #-16]!",
@@ -5388,6 +5958,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-188]",
         "ldur s2, [x9, #-60]",
         "str x30, [sp, #-16]!",
@@ -5428,6 +6003,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-184]",
         "ldur s2, [x9, #-48]",
         "str x30, [sp, #-16]!",
@@ -5460,6 +6040,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-176]",
         "ldur s2, [x9, #-36]",
         "str x30, [sp, #-16]!",
@@ -5500,6 +6085,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-164]",
         "ldur s2, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -5532,6 +6122,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-172]",
         "ldur s2, [x9, #-40]",
         "str x30, [sp, #-16]!",
@@ -5572,6 +6167,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-168]",
         "ldur s2, [x9, #-32]",
         "str x30, [sp, #-16]!",
@@ -5604,6 +6204,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-160]",
         "ldur s2, [x9, #-32]",
         "str x30, [sp, #-16]!",
@@ -5644,6 +6249,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-148]",
         "ldur s2, [x9, #-28]",
         "str x30, [sp, #-16]!",
@@ -5676,6 +6286,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-156]",
         "ldur s2, [x9, #-28]",
         "str x30, [sp, #-16]!",
@@ -5716,6 +6331,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-152]",
         "ldur s2, [x9, #-16]",
         "str x30, [sp, #-16]!",
@@ -5748,6 +6368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "stur s2, [x9, #-144]",
         "ldur s2, [x9, #-4]",
         "str x30, [sp, #-16]!",
@@ -5789,6 +6414,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-132]",
         "ldur s2, [x9, #-12]",
         "str x30, [sp, #-16]!",
@@ -5821,6 +6451,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-140]",
         "ldur s2, [x9, #-8]",
         "str x30, [sp, #-16]!",
@@ -5861,6 +6496,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-136]",
         "ldr s2, [x4]",
         "str s2, [x9, #16]",
@@ -5895,6 +6535,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-128]",
         "ldur s2, [x9, #-256]",
         "str x30, [sp, #-16]!",
@@ -5944,6 +6589,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-124]",
         "ldur s2, [x9, #-244]",
         "str x30, [sp, #-16]!",
@@ -5976,6 +6626,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-120]",
         "ldur s2, [x9, #-244]",
         "str x30, [sp, #-16]!",
@@ -6016,6 +6671,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-116]",
         "ldur s2, [x9, #-116]",
         "str x30, [sp, #-16]!",
@@ -6048,6 +6708,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-120]",
         "ldur s2, [x9, #-236]",
         "str x30, [sp, #-16]!",
@@ -6080,6 +6745,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-112]",
         "ldur s2, [x9, #-240]",
         "str x30, [sp, #-16]!",
@@ -6120,6 +6790,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-108]",
         "ldur s2, [x9, #-228]",
         "str x30, [sp, #-16]!",
@@ -6152,6 +6827,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-104]",
         "ldur s2, [x9, #-228]",
         "str x30, [sp, #-16]!",
@@ -6192,6 +6872,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-100]",
         "ldur s2, [x9, #-100]",
         "str x30, [sp, #-16]!",
@@ -6224,6 +6909,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-104]",
         "ldur s2, [x9, #-104]",
         "str x30, [sp, #-16]!",
@@ -6256,6 +6946,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-112]",
         "ldur s2, [x9, #-104]",
         "str x30, [sp, #-16]!",
@@ -6288,6 +6983,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-104]",
         "ldur s2, [x9, #-100]",
         "str x30, [sp, #-16]!",
@@ -6320,6 +7020,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-108]",
         "ldur s2, [x9, #-224]",
         "str x30, [sp, #-16]!",
@@ -6352,6 +7057,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-96]",
         "ldur s2, [x9, #-224]",
         "str x30, [sp, #-16]!",
@@ -6392,6 +7102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-92]",
         "ldur s2, [x9, #-216]",
         "str x30, [sp, #-16]!",
@@ -6424,6 +7139,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-88]",
         "ldur s2, [x9, #-212]",
         "str x30, [sp, #-16]!",
@@ -6464,6 +7184,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-84]",
         "ldur s2, [x9, #-84]",
         "str x30, [sp, #-16]!",
@@ -6496,6 +7221,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-88]",
         "ldur s2, [x9, #-208]",
         "str x30, [sp, #-16]!",
@@ -6528,6 +7258,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-80]",
         "ldur s2, [x9, #-208]",
         "str x30, [sp, #-16]!",
@@ -6568,6 +7303,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-76]",
         "ldur s2, [x9, #-200]",
         "str x30, [sp, #-16]!",
@@ -6600,6 +7340,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-72]",
         "ldur s2, [x9, #-196]",
         "str x30, [sp, #-16]!",
@@ -6640,6 +7385,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x9, #-68]",
         "ldur s2, [x9, #-68]",
         "str x30, [sp, #-16]!",
@@ -6672,6 +7422,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-72]",
         "ldur s4, [x9, #-72]",
         "str x30, [sp, #-16]!",
@@ -6704,6 +7459,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-80]",
         "ldur s4, [x9, #-72]",
         "str x30, [sp, #-16]!",
@@ -6736,6 +7496,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-72]",
         "ldur s4, [x9, #-76]",
         "str x30, [sp, #-16]!",
@@ -6760,6 +7525,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-76]",
         "ldur s4, [x9, #-188]",
         "str x30, [sp, #-16]!",
@@ -6792,6 +7562,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-64]",
         "ldur s4, [x9, #-192]",
         "str x30, [sp, #-16]!",
@@ -6832,6 +7607,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-60]",
         "ldur s4, [x9, #-180]",
         "str x30, [sp, #-16]!",
@@ -6864,6 +7644,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-56]",
         "ldur s4, [x9, #-180]",
         "str x30, [sp, #-16]!",
@@ -6904,6 +7689,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-52]",
         "ldur s4, [x9, #-56]",
         "str x30, [sp, #-16]!",
@@ -6936,6 +7726,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-56]",
         "ldur s4, [x9, #-172]",
         "str x30, [sp, #-16]!",
@@ -6968,6 +7763,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-48]",
         "ldur s4, [x9, #-176]",
         "str x30, [sp, #-16]!",
@@ -7008,6 +7808,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-44]",
         "ldur s4, [x9, #-164]",
         "str x30, [sp, #-16]!",
@@ -7040,6 +7845,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-40]",
         "ldur s4, [x9, #-164]",
         "str x30, [sp, #-16]!",
@@ -7080,6 +7890,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x9, #-36]",
         "ldur s4, [x9, #-40]",
         "str x30, [sp, #-16]!",
@@ -7113,6 +7928,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-40]",
         "ldur s4, [x9, #-48]",
         "str x30, [sp, #-16]!",
@@ -7145,6 +7965,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-48]",
         "ldur s4, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -7177,6 +8002,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-40]",
         "ldur s4, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -7201,6 +8031,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-44]",
         "ldur s4, [x9, #-160]",
         "str x30, [sp, #-16]!",
@@ -7233,6 +8068,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-32]",
         "ldur s4, [x9, #-160]",
         "str x30, [sp, #-16]!",
@@ -7273,6 +8113,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-28]",
         "ldur s4, [x9, #-152]",
         "str x30, [sp, #-16]!",
@@ -7305,6 +8150,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-24]",
         "ldur s4, [x9, #-148]",
         "str x30, [sp, #-16]!",
@@ -7345,6 +8195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-20]",
         "ldur s4, [x9, #-24]",
         "str x30, [sp, #-16]!",
@@ -7377,6 +8232,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-24]",
         "ldur s4, [x9, #-144]",
         "str x30, [sp, #-16]!",
@@ -7409,6 +8269,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-16]",
         "ldr w4, [x9, #8]",
         "ldur s4, [x9, #-144]",
@@ -7451,6 +8316,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-12]",
         "ldur s4, [x9, #-136]",
         "str x30, [sp, #-16]!",
@@ -7483,6 +8353,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x9, #-8]",
         "ldur s4, [x9, #-132]",
         "str x30, [sp, #-16]!",
@@ -7524,6 +8399,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x9, #-4]",
         "ldur s3, [x9, #-8]",
         "str x30, [sp, #-16]!",
@@ -7557,6 +8437,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-8]",
         "ldur s3, [x9, #-16]",
         "str x30, [sp, #-16]!",
@@ -7589,6 +8474,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-16]",
         "ldur s3, [x9, #-12]",
         "str x30, [sp, #-16]!",
@@ -7621,6 +8511,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-8]",
         "ldur s3, [x9, #-12]",
         "str x30, [sp, #-16]!",
@@ -7645,6 +8540,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-12]",
         "ldur s3, [x9, #-128]",
         "str s3, [x4, #1024]",
@@ -7695,6 +8595,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-96]",
         "ldur s3, [x9, #-96]",
         "str s3, [x4, #896]",
@@ -7729,6 +8634,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-80]",
         "ldur s3, [x9, #-80]",
         "str s3, [x4, #640]",
@@ -7763,6 +8673,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-88]",
         "ldur s3, [x9, #-88]",
         "str s3, [x4, #384]",
@@ -7797,6 +8712,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-72]",
         "ldur s3, [x9, #-72]",
         "str s3, [x4, #128]",
@@ -7831,6 +8751,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-92]",
         "ldur s3, [x9, #-92]",
         "str s3, [x7, #128]",
@@ -7865,6 +8790,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-76]",
         "ldur s3, [x9, #-76]",
         "str s3, [x7, #384]",
@@ -7891,6 +8821,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "stur s3, [x9, #-84]",
         "ldur s3, [x9, #-84]",
         "str s3, [x7, #640]",
@@ -7902,6 +8837,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #896]",
         "ldur s2, [x9, #-32]",
         "str x30, [sp, #-16]!",
@@ -7934,6 +8874,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-32]",
         "ldur s2, [x9, #-64]",
         "str x30, [sp, #-16]!",
@@ -7966,6 +8911,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #960]",
         "ldur s2, [x9, #-48]",
         "str x30, [sp, #-16]!",
@@ -7998,6 +8948,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #832]",
         "ldur s2, [x9, #-24]",
         "str x30, [sp, #-16]!",
@@ -8030,6 +8985,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-16]",
         "ldur s2, [x9, #-48]",
         "str x30, [sp, #-16]!",
@@ -8062,6 +9022,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #704]",
         "ldur s2, [x9, #-56]",
         "str x30, [sp, #-16]!",
@@ -8094,6 +9059,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #576]",
         "ldur s2, [x9, #-24]",
         "str x30, [sp, #-16]!",
@@ -8126,6 +9096,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-24]",
         "ldur s2, [x9, #-56]",
         "str x30, [sp, #-16]!",
@@ -8158,6 +9133,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #448]",
         "ldur s2, [x9, #-40]",
         "str x30, [sp, #-16]!",
@@ -8190,6 +9170,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #320]",
         "ldur s2, [x9, #-28]",
         "str x30, [sp, #-16]!",
@@ -8222,6 +9207,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldur s2, [x9, #-40]",
         "str x30, [sp, #-16]!",
@@ -8254,6 +9244,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #192]",
         "ldur s2, [x9, #-60]",
         "str x30, [sp, #-16]!",
@@ -8286,6 +9281,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #64]",
         "ldur s2, [x9, #-28]",
         "str x30, [sp, #-16]!",
@@ -8318,6 +9318,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-28]",
         "ldur s2, [x9, #-60]",
         "str x30, [sp, #-16]!",
@@ -8350,6 +9355,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #64]",
         "ldur s2, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -8382,6 +9392,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #192]",
         "ldur s2, [x9, #-20]",
         "str x30, [sp, #-16]!",
@@ -8414,6 +9429,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-12]",
         "ldur s2, [x9, #-44]",
         "str x30, [sp, #-16]!",
@@ -8446,6 +9466,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #320]",
         "ldur s2, [x9, #-52]",
         "str x30, [sp, #-16]!",
@@ -8478,6 +9503,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #448]",
         "ldur s2, [x9, #-20]",
         "str x30, [sp, #-16]!",
@@ -8502,6 +9532,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-20]",
         "ldur s2, [x9, #-52]",
         "str x30, [sp, #-16]!",
@@ -8534,6 +9569,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #576]",
         "ldur s2, [x9, #-20]",
         "str x30, [sp, #-16]!",
@@ -8558,6 +9598,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #704]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -8575,6 +9620,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #832]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -8583,6 +9633,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #960]",
         "mov x8, x9",
         "ldp w9, w20, [x8], #8",
@@ -8596,7 +9651,7 @@
         "strb w21, [x28, #1186]"
       ],
       "x86InstructionCount": 809,
-      "ExpectedInstructionCount": 7769
+      "ExpectedInstructionCount": 8824
     }
   }
 }
diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
index 5432b406f..9e86381e9 100644
--- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
@@ -14,7 +14,7 @@
   "Instructions": {
     "Block1": {
       "x86InstructionCount": 70,
-      "ExpectedInstructionCount": 412,
+      "ExpectedInstructionCount": 432,
       "x86Insts": [
         "sub esp,0x2c",
         "mov ecx,dword [esp + 0x34]",
@@ -88,7 +88,7 @@
         "fucomi st0,st1"
       ],
       "ExpectedArm64ASM": [
-        "subs w20, w8, #0x2c (44)",
+        "sub w20, w8, #0x2c (44)",
         "mov x27, x8",
         "mov x8, x20",
         "ldr w7, [x8, #52]",
@@ -149,6 +149,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "ldr s7, [x7, #8]",
         "str x30, [sp, #-16]!",
@@ -181,6 +186,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #20]",
         "ldr s9, [x4]",
         "str x30, [sp, #-16]!",
@@ -206,6 +216,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d2, d10, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -231,6 +246,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d5, d10, d5, vs",
         "str s5, [x8, #28]",
         "ldr s5, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -762,7 +782,7 @@
     },
     "Block3": {
       "x86InstructionCount": 32,
-      "ExpectedInstructionCount": 231,
+      "ExpectedInstructionCount": 236,
       "x86Insts": [
         "fld dword [ecx]",
         "fld dword [edx + 0x4]",
@@ -1022,6 +1042,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x23, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d5, x23",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x10]",
         "add w21, w21, #0x1 (1)",
         "and w21, w21, #0x7",
@@ -1033,7 +1058,7 @@
     },
     "Block4": {
       "x86InstructionCount": 54,
-      "ExpectedInstructionCount": 75,
+      "ExpectedInstructionCount": 85,
       "x86Insts": [
         "push ebp",
         "push edi",
@@ -1093,7 +1118,7 @@
       "ExpectedArm64ASM": [
         "stp w11, w9, [x8, #-8]!",
         "stp w6, w10, [x8, #-8]!",
-        "subs w26, w8, #0x4c (76)",
+        "sub w26, w8, #0x4c (76)",
         "mov x27, x8",
         "mov x8, x26",
         "ldr w4, [x8, #104]",
@@ -1138,6 +1163,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -1154,6 +1184,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d2, d0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str d2, [x8]",
         "mov w20, #0x44",
         "movk w20, #0x1, lsl #16",
@@ -1170,7 +1205,7 @@
     },
     "Block5": {
       "x86InstructionCount": 49,
-      "ExpectedInstructionCount": 300,
+      "ExpectedInstructionCount": 325,
       "x86Insts": [
         "fld dword [esp + 0x80]",
         "fsub dword [esp + 0x7c]",
@@ -1258,6 +1293,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #52]",
         "ldr s3, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -1299,6 +1339,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x4]",
         "str x30, [sp, #-16]!",
@@ -1356,6 +1401,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -1412,6 +1462,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -1474,6 +1529,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "movi v2.2d, #0x0",
         "ldr s3, [x8, #40]",
@@ -1868,7 +1928,7 @@
     },
     "Block7": {
       "x86InstructionCount": 25,
-      "ExpectedInstructionCount": 244,
+      "ExpectedInstructionCount": 249,
       "x86Insts": [
         "fld dword [ebx + 0x4]",
         "fld dword [ebx]",
@@ -2131,6 +2191,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x11]",
         "strb w21, [x28, #1019]",
         "str q2, [x20, #1040]",
@@ -2145,7 +2210,7 @@
     },
     "Block8": {
       "x86InstructionCount": 25,
-      "ExpectedInstructionCount": 72,
+      "ExpectedInstructionCount": 92,
       "x86Insts": [
         "fstp st0",
         "fstp st3",
@@ -2204,6 +2269,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x12, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d6, x12",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #56]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -2213,6 +2283,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x12, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d6, x12",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #44]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -2226,6 +2301,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x13, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d7, x13",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -2234,6 +2314,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d6, d0",
+        "mov x13, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d7, x13",
+        "fcsel d6, d7, d6, vs",
         "str d6, [x8]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -2250,7 +2335,7 @@
     },
     "Block9": {
       "x86InstructionCount": 25,
-      "ExpectedInstructionCount": 72,
+      "ExpectedInstructionCount": 92,
       "x86Insts": [
         "fstp st0",
         "fstp st3",
@@ -2309,6 +2394,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x12, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d6, x12",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #56]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -2318,6 +2408,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x12, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d6, x12",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #44]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -2331,6 +2426,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x13, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d7, x13",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -2339,6 +2439,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d6, d0",
+        "mov x13, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d7, x13",
+        "fcsel d6, d7, d6, vs",
         "str d6, [x8]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
index 5f9e57391..9d94218ab 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
@@ -14,7 +14,7 @@
   "Instructions": {
     "Block1": {
       "x86InstructionCount": 911,
-      "ExpectedInstructionCount": 7357,
+      "ExpectedInstructionCount": 8412,
       "x86Insts": [
         "sub esp,0x118",
         "fld dword [ecx + 0x1084]",
@@ -961,6 +961,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8]",
         "ldr s2, [x7, #4224]",
         "str x30, [sp, #-16]!",
@@ -993,6 +998,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x7, #4220]",
         "str x30, [sp, #-16]!",
@@ -1025,6 +1035,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "ldr s2, [x7, #4216]",
         "str x30, [sp, #-16]!",
@@ -1057,6 +1072,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x7, #4212]",
         "str x30, [sp, #-16]!",
@@ -1089,6 +1109,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x7, #4208]",
         "str x30, [sp, #-16]!",
@@ -1121,6 +1146,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x7, #4204]",
         "str x30, [sp, #-16]!",
@@ -1153,6 +1183,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x7, #4200]",
         "str x30, [sp, #-16]!",
@@ -1185,6 +1220,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x7, #4196]",
         "str x30, [sp, #-16]!",
@@ -1217,6 +1257,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #32]",
         "ldr s2, [x7, #4192]",
         "str x30, [sp, #-16]!",
@@ -1249,6 +1294,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #36]",
         "ldr s2, [x7, #4188]",
         "str x30, [sp, #-16]!",
@@ -1281,6 +1331,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #40]",
         "ldr s2, [x7, #4184]",
         "str x30, [sp, #-16]!",
@@ -1313,6 +1368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x7, #4180]",
         "str x30, [sp, #-16]!",
@@ -1345,6 +1405,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x7, #4176]",
         "str x30, [sp, #-16]!",
@@ -1377,6 +1442,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x7, #4172]",
         "str x30, [sp, #-16]!",
@@ -1409,6 +1479,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x7, #4168]",
         "str x30, [sp, #-16]!",
@@ -1441,6 +1516,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -1474,6 +1554,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #68]",
         "ldr s4, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -1507,6 +1592,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #72]",
         "ldr s6, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -1540,6 +1630,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #76]",
         "ldr s8, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -1572,6 +1667,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #80]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -1604,6 +1704,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #84]",
         "ldr s8, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -1636,6 +1741,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #88]",
         "ldr s8, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -1668,6 +1778,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "ldr s8, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -1700,6 +1815,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #96]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -1736,6 +1856,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #100]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -1770,6 +1895,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #104]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -1804,6 +1934,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -1854,6 +1989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #112]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -1904,6 +2044,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #116]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -1954,6 +2099,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #120]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -2004,6 +2154,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #124]",
         "ldr s2, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -2054,6 +2209,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #128]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -2087,6 +2247,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8]",
         "ldr s4, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -2120,6 +2285,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #4]",
         "ldr s6, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -2153,6 +2323,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr s8, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -2185,6 +2360,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -2221,6 +2401,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #16]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -2257,6 +2442,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2292,6 +2482,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d2, d6, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -2343,6 +2538,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -2376,6 +2576,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #32]",
         "ldr s8, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -2408,6 +2613,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #36]",
         "ldr s8, [x8, #120]",
         "str x30, [sp, #-16]!",
@@ -2440,6 +2650,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #40]",
         "ldr s8, [x8, #116]",
         "str x30, [sp, #-16]!",
@@ -2472,6 +2687,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2496,6 +2716,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -2536,6 +2761,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x8, #108]",
         "str x30, [sp, #-16]!",
@@ -2576,6 +2806,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #112]",
         "str x30, [sp, #-16]!",
@@ -2616,6 +2851,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d2, d6, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -2649,6 +2889,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #68]",
         "ldr s7, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -2681,6 +2926,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #72]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -2717,6 +2967,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -2760,6 +3015,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #80]",
         "ldr s2, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -2792,6 +3052,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #84]",
         "ldr s8, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -2824,6 +3089,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #88]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -2856,6 +3126,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #92]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -2896,6 +3171,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #96]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -2928,6 +3208,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #100]",
         "ldr s8, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -2960,6 +3245,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #104]",
         "ldr s8, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -2992,6 +3282,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -3032,6 +3327,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #112]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -3064,6 +3364,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #116]",
         "ldr s8, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -3096,6 +3401,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #120]",
         "ldr s8, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -3128,6 +3438,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #124]",
         "ldr s2, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -3168,6 +3483,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #128]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -3200,6 +3520,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -3243,6 +3568,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -3275,6 +3605,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #8]",
         "ldr s2, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -3315,6 +3650,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -3347,6 +3687,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -3387,6 +3732,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -3419,6 +3769,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -3459,6 +3814,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -3491,6 +3851,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #32]",
         "ldr s2, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -3531,6 +3896,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #36]",
         "ldr s2, [x8, #112]",
         "str x30, [sp, #-16]!",
@@ -3563,6 +3933,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #40]",
         "ldr s2, [x8, #108]",
         "str x30, [sp, #-16]!",
@@ -3603,6 +3978,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #120]",
         "str x30, [sp, #-16]!",
@@ -3635,6 +4015,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #116]",
         "str x30, [sp, #-16]!",
@@ -3675,6 +4060,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -3707,6 +4097,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -3747,6 +4142,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -3780,6 +4180,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #160]",
         "ldr s2, [x8, #160]",
         "str x30, [sp, #-16]!",
@@ -3798,6 +4203,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #140]",
         "ldr s2, [x8, #140]",
         "str x30, [sp, #-16]!",
@@ -3830,6 +4240,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #220]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -3880,6 +4295,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #252]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -3913,6 +4333,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #184]",
         "ldr s2, [x8, #184]",
         "str x30, [sp, #-16]!",
@@ -3945,6 +4370,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #168]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -3993,6 +4423,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #152]",
         "ldr s2, [x8, #152]",
         "str x30, [sp, #-16]!",
@@ -4011,6 +4446,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #132]",
         "ldr s2, [x8, #132]",
         "str x30, [sp, #-16]!",
@@ -4043,6 +4483,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #212]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -4077,6 +4522,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #272]",
         "ldr s9, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -4117,6 +4567,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #64]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -4149,6 +4604,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #228]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -4197,6 +4657,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #260]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -4229,6 +4694,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #244]",
         "ldr s2, [x8]",
         "str x30, [sp, #-16]!",
@@ -4247,6 +4717,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #268]",
         "ldr s2, [x8, #4]",
         "str s2, [x8, #144]",
@@ -4284,6 +4759,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #236]",
         "ldr s2, [x7, #4104]",
         "str x30, [sp, #-16]!",
@@ -4334,6 +4814,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8]",
         "ldr s2, [x7, #4108]",
         "str x30, [sp, #-16]!",
@@ -4384,6 +4869,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x7, #4112]",
         "str x30, [sp, #-16]!",
@@ -4434,6 +4924,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #8]",
         "ldr s2, [x7, #4116]",
         "str x30, [sp, #-16]!",
@@ -4484,6 +4979,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x7, #4120]",
         "str x30, [sp, #-16]!",
@@ -4534,6 +5034,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x7, #4124]",
         "str x30, [sp, #-16]!",
@@ -4584,6 +5089,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x7, #4128]",
         "str x30, [sp, #-16]!",
@@ -4634,6 +5144,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x7, #4132]",
         "str x30, [sp, #-16]!",
@@ -4684,6 +5199,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x7, #4136]",
         "str x30, [sp, #-16]!",
@@ -4734,6 +5254,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #32]",
         "ldr s2, [x7, #4140]",
         "str x30, [sp, #-16]!",
@@ -4784,6 +5309,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #36]",
         "ldr s2, [x7, #4144]",
         "str x30, [sp, #-16]!",
@@ -4834,6 +5364,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #40]",
         "ldr s2, [x7, #4148]",
         "str x30, [sp, #-16]!",
@@ -4884,6 +5419,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x7, #4152]",
         "str x30, [sp, #-16]!",
@@ -4934,6 +5474,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x7, #4156]",
         "str x30, [sp, #-16]!",
@@ -4984,6 +5529,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x7, #4160]",
         "str x30, [sp, #-16]!",
@@ -5034,6 +5584,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x7, #4164]",
         "str x30, [sp, #-16]!",
@@ -5084,6 +5639,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -5116,6 +5676,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -5148,6 +5713,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -5180,6 +5750,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -5212,6 +5787,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #80]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -5244,6 +5824,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #84]",
         "ldr s2, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -5276,6 +5861,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #88]",
         "ldr s2, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -5308,6 +5898,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #92]",
         "ldr s2, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -5340,6 +5935,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #96]",
         "ldr s2, [x8]",
         "str x30, [sp, #-16]!",
@@ -5390,6 +5990,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #100]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -5440,6 +6045,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #104]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -5490,6 +6100,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -5540,6 +6155,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #112]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -5590,6 +6210,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #116]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -5640,6 +6265,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #120]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -5690,6 +6320,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #124]",
         "ldr s2, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -5740,6 +6375,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #128]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -5772,6 +6412,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8]",
         "ldr s2, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -5804,6 +6449,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -5836,6 +6486,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #8]",
         "ldr s2, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -5868,6 +6523,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -5908,6 +6568,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -5948,6 +6613,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -5988,6 +6658,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -6038,6 +6713,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -6070,6 +6750,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #32]",
         "ldr s2, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -6102,6 +6787,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #36]",
         "ldr s2, [x8, #120]",
         "str x30, [sp, #-16]!",
@@ -6134,6 +6824,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #40]",
         "ldr s2, [x8, #116]",
         "str x30, [sp, #-16]!",
@@ -6166,6 +6861,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d2, d9, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -6207,6 +6907,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -6248,6 +6953,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x8, #108]",
         "str x30, [sp, #-16]!",
@@ -6289,6 +6999,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #112]",
         "str x30, [sp, #-16]!",
@@ -6337,6 +7052,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -6370,6 +7090,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #68]",
         "ldr s4, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -6402,6 +7127,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d5, d9, d5, vs",
         "str s5, [x8, #72]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6428,6 +7158,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -6460,6 +7195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #80]",
         "ldr s2, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -6493,6 +7233,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #84]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -6525,6 +7270,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d5, d9, d5, vs",
         "str s5, [x8, #88]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6551,6 +7301,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #92]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -6583,6 +7338,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #96]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -6616,6 +7376,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #100]",
         "ldr s4, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -6648,6 +7413,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d5, d9, d5, vs",
         "str s5, [x8, #104]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6674,6 +7444,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -6706,6 +7481,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #112]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -6739,6 +7519,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #116]",
         "ldr s4, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -6771,6 +7556,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d5, d9, d5, vs",
         "str s5, [x8, #120]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6798,6 +7588,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #124]",
         "ldr s2, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -6830,6 +7625,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #128]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -6863,6 +7663,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -6887,6 +7692,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -6920,6 +7730,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -6944,6 +7759,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -6977,6 +7797,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #16]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7001,6 +7826,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -7034,6 +7864,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #24]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7058,6 +7893,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #28]",
         "ldr s2, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -7091,6 +7931,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #32]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7115,6 +7960,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #36]",
         "ldr s2, [x8, #112]",
         "str x30, [sp, #-16]!",
@@ -7148,6 +7998,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7172,6 +8027,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #120]",
         "str x30, [sp, #-16]!",
@@ -7205,6 +8065,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7229,6 +8094,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #52]",
         "ldr s2, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -7262,6 +8132,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #56]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -7286,6 +8161,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -7319,6 +8199,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #196]",
         "ldr s4, [x8, #196]",
         "str x30, [sp, #-16]!",
@@ -7352,6 +8237,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #188]",
         "ldr s6, [x8, #188]",
         "str x30, [sp, #-16]!",
@@ -7401,6 +8291,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #164]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -7433,6 +8328,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #180]",
         "ldr s6, [x8, #180]",
         "str x30, [sp, #-16]!",
@@ -7457,6 +8357,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #172]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -7489,6 +8394,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #64]",
         "ldr s6, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -7521,6 +8431,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #148]",
         "ldr s6, [x8, #148]",
         "str x30, [sp, #-16]!",
@@ -7539,6 +8454,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #272]",
         "ldr s6, [x8, #272]",
         "str x30, [sp, #-16]!",
@@ -7572,6 +8492,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d6, d9, d6, vs",
         "str s6, [x8, #208]",
         "ldr s6, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -7612,6 +8537,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d6, d9, d6, vs",
         "str s6, [x8, #156]",
         "ldr s6, [x8, #156]",
         "str x30, [sp, #-16]!",
@@ -7630,6 +8560,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d6, d9, d6, vs",
         "str s6, [x8, #136]",
         "ldr s6, [x8, #136]",
         "str x30, [sp, #-16]!",
@@ -7670,6 +8605,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d6, d9, d6, vs",
         "str s6, [x8, #216]",
         "ldr s6, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -7713,6 +8653,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #64]",
         "ldr s5, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -7769,6 +8714,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d7, d9, d7, vs",
         "str s7, [x8, #232]",
         "ldr s7, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -7818,6 +8768,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #224]",
         "ldr s6, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -7874,6 +8829,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d7, d9, d7, vs",
         "str s7, [x8, #240]",
         "ldr s7, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -7918,6 +8878,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #64]",
         "ldr s3, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -7943,6 +8908,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d5, d7, d5, vs",
         "str s5, [x8, #248]",
         "ldr s5, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -7986,6 +8956,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #64]",
         "ldr s5, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -8018,6 +8993,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #264]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -8035,6 +9015,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #256]",
         "ldr s3, [x8, #144]",
         "str s3, [x4]",
@@ -8105,6 +9090,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d3, d10, d3, vs",
         "str s3, [x4, #832]",
         "ldr s3, [x8, #200]",
         "str s3, [x4, #896]",
@@ -8116,6 +9106,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d3, d10, d3, vs",
         "str s3, [x4, #960]",
         "movi v3.2d, #0x0",
         "str x30, [sp, #-16]!",
@@ -8125,6 +9120,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d3, d10, d3, vs",
         "str s3, [x4, #1024]",
         "ldr q3, [x28, #3472]",
         "eor v2.16b, v2.16b, v3.16b",
@@ -8135,6 +9135,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1088]",
         "ldr s2, [x8, #200]",
         "str x30, [sp, #-16]!",
@@ -8153,6 +9158,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1152]",
         "strb wzr, [x28, #1017]",
         "ldr q2, [x28, #3472]",
@@ -8164,6 +9174,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1216]",
         "ldr s2, [x8, #192]",
         "str x30, [sp, #-16]!",
@@ -8182,6 +9197,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1280]",
         "ldr s2, [x8, #188]",
         "str x30, [sp, #-16]!",
@@ -8200,6 +9220,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1344]",
         "strb wzr, [x28, #1017]",
         "ldr q2, [x28, #3472]",
@@ -8211,6 +9236,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1408]",
         "ldr s2, [x8, #180]",
         "str x30, [sp, #-16]!",
@@ -8229,6 +9259,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1472]",
         "strb wzr, [x28, #1017]",
         "ldr q2, [x28, #3472]",
@@ -8240,6 +9275,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1536]",
         "strb wzr, [x28, #1017]",
         "ldr q2, [x28, #3472]",
@@ -8251,6 +9291,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1600]",
         "strb wzr, [x28, #1017]",
         "ldr q2, [x28, #3472]",
@@ -8262,6 +9307,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1664]",
         "ldr q2, [x28, #3472]",
         "eor v2.16b, v5.16b, v2.16b",
@@ -8272,6 +9322,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #1728]",
         "ldr s2, [x8, #140]",
         "str s2, [x4, #1792]",
@@ -8290,7 +9345,7 @@
     },
     "Block2": {
       "x86InstructionCount": 630,
-      "ExpectedInstructionCount": 4711,
+      "ExpectedInstructionCount": 5476,
       "x86Insts": [
         "mov eax,dword [ebp + 0x8]",
         "fld dword [eax + 0x40]",
@@ -8956,6 +10011,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #68]",
         "ldr s3, [x4, #60]",
         "str x30, [sp, #-16]!",
@@ -8981,6 +10041,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #64]",
         "ldr s2, [x4, #56]",
         "str x30, [sp, #-16]!",
@@ -9006,6 +10071,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #60]",
         "ldr s3, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -9031,6 +10101,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #56]",
         "ldr s2, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -9056,6 +10131,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #52]",
         "ldr s3, [x4, #44]",
         "str x30, [sp, #-16]!",
@@ -9081,6 +10161,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #48]",
         "ldr s2, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -9106,6 +10191,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #44]",
         "ldr s3, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -9131,6 +10221,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #40]",
         "ldr s2, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -9156,6 +10251,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #36]",
         "ldr s3, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -9181,6 +10281,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #32]",
         "ldr s2, [x4, #24]",
         "str x30, [sp, #-16]!",
@@ -9206,6 +10311,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #28]",
         "ldr s3, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -9231,6 +10341,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #24]",
         "ldr s2, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -9256,6 +10371,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #20]",
         "ldr s3, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -9281,6 +10401,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #16]",
         "ldr s2, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -9306,6 +10431,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #12]",
         "ldr s3, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -9331,6 +10461,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #8]",
         "ldr s2, [x4]",
         "str x30, [sp, #-16]!",
@@ -9347,6 +10482,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d4, d0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str d4, [x8, #32]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -9364,6 +10504,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -9405,6 +10550,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4, #68]",
         "ldr s5, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -9430,6 +10580,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x4, #60]",
         "ldr s3, [x4, #44]",
         "str x30, [sp, #-16]!",
@@ -9455,6 +10610,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4, #52]",
         "ldr s5, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -9480,6 +10640,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x4, #44]",
         "ldr s3, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -9505,6 +10670,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4, #36]",
         "ldr s5, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -9530,6 +10700,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x4, #28]",
         "ldr s3, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -9555,6 +10730,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -9571,6 +10751,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #4]",
         "ldr s3, [x8, #4]",
         "str s3, [x4, #12]",
@@ -9589,6 +10774,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -9605,6 +10795,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d3, d0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str d3, [x8, #24]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -9621,6 +10816,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d4, d0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str d4, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -9637,6 +10837,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -9661,6 +10866,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d4, d0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str d4, [x8, #128]",
         "ldr s4, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -9766,6 +10976,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x8, #192]",
         "ldr d3, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -9830,6 +11045,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x8, #208]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -9894,6 +11114,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x8, #184]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -9958,6 +11183,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x8, #200]",
         "ldr d3, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -10016,6 +11246,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #128]",
         "ldr s2, [x4, #24]",
         "str x30, [sp, #-16]!",
@@ -10050,6 +11285,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -10066,6 +11306,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d3, d0",
+        "mov x21, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d3, d4, d3, vs",
         "str d3, [x8, #24]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -10082,6 +11327,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d4, d0",
+        "mov x21, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d4, d5, d4, vs",
         "str d4, [x8, #32]",
         "ldr s4, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -10098,6 +11348,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d5, d9, d5, vs",
         "str d5, [x8, #144]",
         "ldr s5, [x4, #56]",
         "str x30, [sp, #-16]!",
@@ -10114,6 +11369,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x21, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #40]",
         "mov w21, #0x7b50",
         "movk w21, #0xa7, lsl #16",
@@ -10203,6 +11463,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #180]",
         "ldr d2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -10268,6 +11533,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d2, d10, d2, vs",
         "str s2, [x8, #196]",
         "ldr d2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -10349,6 +11619,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #168]",
         "ldr d2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -10437,6 +11712,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #144]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -10453,6 +11733,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -10469,6 +11754,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -10485,6 +11775,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #152]",
         "ldr s5, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -10501,6 +11796,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x21, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d11, x21",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #160]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -10517,6 +11817,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -10533,6 +11838,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #32]",
         "ldr s5, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -10549,6 +11859,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #136]",
         "ldr s5, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -10565,6 +11880,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #24]",
         "ldr s5, [x4, #68]",
         "str x30, [sp, #-16]!",
@@ -10581,6 +11901,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d5, d0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d5, d10, d5, vs",
         "str d5, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -10661,6 +11986,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #176]",
         "ldr d2, [x8, #160]",
         "str x30, [sp, #-16]!",
@@ -10749,6 +12079,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #48]",
         "ldr d2, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -10837,6 +12172,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #160]",
         "ldr d2, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -10928,6 +12268,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x21, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d6, x21",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #40]",
         "ldr d5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -11012,6 +12357,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -11044,6 +12394,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d5, x21",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -11132,6 +12487,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x21, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d8, x21",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #20]",
         "ldr s7, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -11148,6 +12508,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d8, d0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d10, x21",
+        "fcsel d8, d10, d8, vs",
         "str d8, [x8, #32]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -11188,6 +12553,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #152]",
         "ldr d7, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -11252,6 +12622,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #136]",
         "ldr d7, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -11317,6 +12692,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #32]",
         "ldr s2, [x8, #180]",
         "str x30, [sp, #-16]!",
@@ -11349,6 +12729,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #8]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -11399,6 +12784,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #4]",
         "ldr s6, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -11431,6 +12821,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #56]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -11447,6 +12842,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #124]",
         "ldr s6, [x8, #196]",
         "str x30, [sp, #-16]!",
@@ -11479,6 +12879,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr s8, [x8, #152]",
         "str x30, [sp, #-16]!",
@@ -11495,6 +12900,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #208]",
         "ldr s9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -11511,6 +12921,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #152]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -11545,6 +12960,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -11569,6 +12989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -11585,6 +13010,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #60]",
         "ldr d9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -11609,6 +13039,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #120]",
         "ldr s8, [x8, #168]",
         "str x30, [sp, #-16]!",
@@ -11625,6 +13060,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #168]",
         "ldr s9, [x8, #184]",
         "str x30, [sp, #-16]!",
@@ -11641,6 +13081,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #184]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -11657,6 +13102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr s8, [x8, #136]",
         "str x30, [sp, #-16]!",
@@ -11673,6 +13123,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #136]",
         "ldr s9, [x8, #160]",
         "str x30, [sp, #-16]!",
@@ -11689,6 +13144,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #160]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -11723,6 +13183,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -11747,6 +13212,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -11763,6 +13233,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #64]",
         "ldr d9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -11787,6 +13262,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #116]",
         "ldr s8, [x8, #144]",
         "str x30, [sp, #-16]!",
@@ -11803,6 +13283,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #144]",
         "ldr s9, [x8, #200]",
         "str x30, [sp, #-16]!",
@@ -11819,6 +13304,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #200]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -11835,6 +13325,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr s8, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -11851,6 +13346,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #32]",
         "ldr s9, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -11867,6 +13367,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -11901,6 +13406,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -11925,6 +13435,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -11941,6 +13456,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #68]",
         "ldr d9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -11965,6 +13485,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #112]",
         "ldr s8, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -11989,6 +13514,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #128]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -12005,6 +13535,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #72]",
         "ldr d9, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -12029,6 +13564,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #108]",
         "ldr d8, [x8, #200]",
         "str x30, [sp, #-16]!",
@@ -12061,6 +13601,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr d8, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -12111,6 +13656,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -12135,6 +13685,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -12151,6 +13706,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #76]",
         "ldr d9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -12175,6 +13735,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #104]",
         "ldr d8, [x8, #184]",
         "str x30, [sp, #-16]!",
@@ -12207,6 +13772,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr d8, [x8, #160]",
         "str x30, [sp, #-16]!",
@@ -12257,6 +13827,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -12281,6 +13856,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d10, d0",
+        "mov x20, v10.d[0]",
+        "fcmp d10, d10",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d11, x20",
+        "fcsel d10, d11, d10, vs",
         "str d10, [x8, #48]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v9.16b",
@@ -12297,6 +13877,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #80]",
         "ldr d9, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -12321,6 +13906,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #100]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -12337,6 +13927,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #8]",
         "ldr d6, [x8, #152]",
         "str x30, [sp, #-16]!",
@@ -12387,6 +13982,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #4]",
         "ldr s6, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -12419,6 +14019,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #84]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -12435,6 +14040,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #96]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -12453,6 +14063,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -12487,6 +14102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -12518,7 +14138,7 @@
         "mov w20, #0x83d0",
         "movk w20, #0xb1, lsl #16",
         "mvn w27, w4",
-        "adds w26, w4, w20",
+        "add w26, w4, w20",
         "mov x4, x26",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -12527,6 +14147,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #88]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -12543,6 +14168,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #92]",
         "ldr s2, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -12577,6 +14207,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7]",
         "ldr s3, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -12612,6 +14247,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x7, #4]",
         "ldr s3, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -12647,6 +14287,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x7, #8]",
         "ldr s3, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -12682,6 +14327,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x7, #12]",
         "ldr s3, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -12717,6 +14367,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d3, d8, d3, vs",
         "str s3, [x7, #16]",
         "ldr s3, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -12752,6 +14407,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #20]",
         "ldr s3, [x4, #24]",
         "str x30, [sp, #-16]!",
@@ -12786,6 +14446,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #24]",
         "ldr s3, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -12820,6 +14485,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #28]",
         "ldr s3, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -12854,6 +14524,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #32]",
         "ldr s3, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -12886,6 +14561,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #36]",
         "ldr s3, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -12918,6 +14598,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #40]",
         "ldr s3, [x4, #44]",
         "str x30, [sp, #-16]!",
@@ -12950,6 +14635,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d3, d9, d3, vs",
         "str s3, [x7, #44]",
         "ldr s3, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -12974,6 +14664,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d3, d8, d3, vs",
         "str s3, [x7, #48]",
         "ldr s3, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -12998,6 +14693,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x7, #52]",
         "ldr s3, [x4, #56]",
         "str x30, [sp, #-16]!",
@@ -13022,6 +14722,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x7, #56]",
         "ldr s3, [x4, #60]",
         "str x30, [sp, #-16]!",
@@ -13046,6 +14751,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x7, #60]",
         "ldr s3, [x4, #64]",
         "str x30, [sp, #-16]!",
@@ -13070,6 +14780,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #64]",
         "ldr s3, [x4, #68]",
         "str x30, [sp, #-16]!",
@@ -13094,6 +14809,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #68]",
         "ldr s2, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -13126,6 +14846,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #72]",
         "ldr s3, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -13158,6 +14883,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x7, #76]",
         "ldr s4, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -13190,6 +14920,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x7, #80]",
         "ldr s5, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -13222,6 +14957,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x7, #84]",
         "ldr s6, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -13254,6 +14994,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x7, #88]",
         "ldr s7, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -13286,6 +15031,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #92]",
         "ldr s8, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -13302,6 +15052,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #24]",
         "ldr s9, [x4, #96]",
         "str x30, [sp, #-16]!",
@@ -13326,6 +15081,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #96]",
         "ldr s8, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -13342,6 +15102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d9, d0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str d9, [x8, #128]",
         "ldr s9, [x4, #100]",
         "str x30, [sp, #-16]!",
@@ -13366,6 +15131,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #100]",
         "ldr s8, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -13398,6 +15168,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x7, #104]",
         "ldr s9, [x4, #108]",
         "str x30, [sp, #-16]!",
@@ -13422,6 +15197,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #108]",
         "ldr s8, [x4, #112]",
         "str x30, [sp, #-16]!",
@@ -13454,6 +15234,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #112]",
         "ldr s8, [x4, #116]",
         "str x30, [sp, #-16]!",
@@ -13486,6 +15271,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x7, #116]",
         "ldr s8, [x4, #120]",
         "str x30, [sp, #-16]!",
@@ -13510,6 +15300,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x7, #120]",
         "ldr s7, [x4, #124]",
         "str x30, [sp, #-16]!",
@@ -13534,6 +15329,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x7, #124]",
         "ldr s6, [x4, #128]",
         "str x30, [sp, #-16]!",
@@ -13558,6 +15358,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x7, #128]",
         "ldr s5, [x4, #132]",
         "str x30, [sp, #-16]!",
@@ -13582,6 +15387,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x7, #132]",
         "ldr s4, [x4, #136]",
         "str x30, [sp, #-16]!",
@@ -13606,6 +15416,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #136]",
         "ldr s3, [x4, #140]",
         "str x30, [sp, #-16]!",
@@ -13630,6 +15445,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7, #140]",
         "mov x8, x9",
         "ldr w9, [x8], #4",
@@ -13639,7 +15459,7 @@
     },
     "Block3": {
       "x86InstructionCount": 649,
-      "ExpectedInstructionCount": 3424,
+      "ExpectedInstructionCount": 4024,
       "x86Insts": [
         "fld dword [esi + 0x64]",
         "mov eax,dword [esi + 0x88]",
@@ -14348,6 +16168,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #140]",
         "ldr s3, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -14372,6 +16197,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #124]",
         "ldr s3, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -14396,6 +16226,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #132]",
         "ldr s2, [x10, #108]",
         "str s2, [x8, #20]",
@@ -14436,6 +16271,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #84]",
         "ldr s3, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -14460,6 +16300,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #80]",
         "ldr s3, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -14484,6 +16329,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #88]",
         "ldr s2, [x10, #256]",
         "str s2, [x8, #40]",
@@ -14518,6 +16368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #40]",
         "ldr s3, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -14551,6 +16406,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #40]",
         "ldr s3, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -14584,6 +16444,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x8, #40]",
         "ldr s3, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -14617,6 +16482,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #76]",
         "ldr s3, [x8, #76]",
         "str s3, [x8, #68]",
@@ -14643,6 +16513,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #140]",
         "ldr s3, [x8, #140]",
         "str s3, [x8, #72]",
@@ -14669,6 +16544,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #88]",
         "ldr s3, [x8, #88]",
         "str s3, [x8, #64]",
@@ -14695,6 +16575,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #80]",
         "ldr s3, [x8, #80]",
         "str s3, [x8, #132]",
@@ -14721,6 +16606,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #84]",
         "ldr s3, [x8, #84]",
         "str s3, [x8, #124]",
@@ -14748,6 +16638,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #40]",
         "ldr s2, [x8, #40]",
         "str s2, [x8, #92]",
@@ -14782,6 +16677,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #132]",
         "ldr s3, [x8, #152]",
         "str x30, [sp, #-16]!",
@@ -14814,6 +16714,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #124]",
         "ldr s7, [x8, #156]",
         "str x30, [sp, #-16]!",
@@ -14846,6 +16751,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "ldr s8, [x8, #132]",
         "str x30, [sp, #-16]!",
@@ -14878,6 +16788,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #68]",
         "ldr s8, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -14910,6 +16825,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #72]",
         "ldr s8, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -14942,6 +16862,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #64]",
         "ldr s8, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -14974,6 +16899,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -15006,6 +16936,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -15038,6 +16973,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #16]",
         "str s8, [x8, #92]",
@@ -15059,6 +16999,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15068,6 +17013,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15077,6 +17027,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #124]",
         "ldr s8, [x8, #76]",
         "str s8, [x8, #64]",
@@ -15113,6 +17068,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15137,6 +17097,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15161,6 +17126,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15193,6 +17163,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15225,6 +17200,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15257,6 +17237,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15289,6 +17274,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15321,6 +17311,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15353,6 +17348,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str s8, [x8, #20]",
@@ -15374,6 +17374,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15383,6 +17388,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15392,6 +17402,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #124]",
         "ldr s8, [x8, #76]",
         "str s8, [x8, #64]",
@@ -15428,6 +17443,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15452,6 +17472,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15476,6 +17501,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15508,6 +17538,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15540,6 +17575,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15572,6 +17612,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15604,6 +17649,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15636,6 +17686,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15668,6 +17723,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str s8, [x8, #20]",
@@ -15689,6 +17749,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d4, d8, d4, vs",
         "str s4, [x8, #92]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15698,6 +17763,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -15707,6 +17777,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #124]",
         "ldr s4, [x8, #76]",
         "str s4, [x8, #64]",
@@ -15744,6 +17819,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15769,6 +17849,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15793,6 +17878,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15825,6 +17915,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15857,6 +17952,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15889,6 +17989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15921,6 +18026,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -15953,6 +18063,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15985,6 +18100,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x8, #20]",
         "str s2, [x8, #20]",
@@ -16052,6 +18172,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #64]",
         "ldr s3, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -16076,6 +18201,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #72]",
         "ldr s3, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -16100,6 +18230,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x6, #108]",
         "str s2, [x8, #92]",
@@ -16140,6 +18275,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #20]",
         "ldr s3, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -16164,6 +18304,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #44]",
         "ldr s3, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -16188,6 +18333,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "ldr s2, [x6, #256]",
         "str s2, [x8, #40]",
@@ -16222,6 +18372,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #20]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16255,6 +18410,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #20]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16288,6 +18448,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x8, #20]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16321,6 +18486,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #40]",
         "ldr s3, [x8, #40]",
         "str s3, [x8, #64]",
@@ -16347,6 +18517,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #84]",
         "ldr s3, [x8, #84]",
         "str s3, [x8, #72]",
@@ -16373,6 +18548,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #80]",
         "ldr s3, [x8, #80]",
         "str s3, [x8, #68]",
@@ -16399,6 +18579,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #88]",
         "ldr s3, [x8, #88]",
         "str s3, [x8, #20]",
@@ -16425,6 +18610,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #140]",
         "ldr s3, [x8, #140]",
         "str s3, [x8, #44]",
@@ -16453,6 +18643,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #76]",
         "str s2, [x8, #16]",
@@ -16487,6 +18682,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x21, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d7, x21",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #20]",
         "ldr s3, [x8, #152]",
         "str x30, [sp, #-16]!",
@@ -16519,6 +18719,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x21, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d8, x21",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #44]",
         "ldr s7, [x8, #156]",
         "str x30, [sp, #-16]!",
@@ -16551,6 +18756,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16583,6 +18793,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -16615,6 +18830,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -16647,6 +18867,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16679,6 +18904,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -16711,6 +18941,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -16743,6 +18978,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str s8, [x8, #112]",
@@ -16764,6 +19004,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -16773,6 +19018,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -16782,6 +19032,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #124]",
         "ldr s8, [x8, #40]",
         "str s8, [x8, #64]",
@@ -16818,6 +19073,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -16842,6 +19102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -16866,6 +19131,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16898,6 +19168,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -16930,6 +19205,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -16962,6 +19242,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -16994,6 +19279,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -17026,6 +19316,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -17058,6 +19353,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str s8, [x8, #112]",
@@ -17079,6 +19379,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -17088,6 +19393,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -17097,6 +19407,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #124]",
         "ldr s8, [x8, #40]",
         "str s8, [x8, #64]",
@@ -17133,6 +19448,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -17157,6 +19477,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -17181,6 +19506,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -17213,6 +19543,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -17245,6 +19580,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -17277,6 +19617,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -17309,6 +19654,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #20]",
         "ldr s8, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -17341,6 +19691,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #44]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -17373,6 +19728,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x21, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d9, x21",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x8, #20]",
         "str s8, [x8, #112]",
@@ -17395,6 +19755,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d4, d8, d4, vs",
         "str s4, [x8, #96]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -17404,6 +19769,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #136]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -17413,6 +19783,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #128]",
         "ldr s4, [x8, #44]",
         "str s4, [x8, #68]",
@@ -17450,6 +19825,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -17475,6 +19855,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -17499,6 +19884,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -17531,6 +19921,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -17563,6 +19958,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -17595,6 +19995,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -17627,6 +20032,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #24]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -17659,6 +20069,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -17691,6 +20106,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "ldr s2, [x8, #24]",
         "str s2, [x8, #116]",
@@ -17720,7 +20140,7 @@
     },
     "Block4": {
       "x86InstructionCount": 2050,
-      "ExpectedInstructionCount": 36,
+      "ExpectedInstructionCount": 41,
       "x86Insts": [
         "fldz",
         "push 0x0",
@@ -19791,6 +22211,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8]",
         "str w20, [x8, #-4]!",
         "mov w20, #0x3c14",
@@ -19814,7 +22239,7 @@
     },
     "Block5": {
       "x86InstructionCount": 368,
-      "ExpectedInstructionCount": 128,
+      "ExpectedInstructionCount": 144,
       "x86Insts": [
         "mov ebx,dword [eax + 0x68]",
         "fld dword [esi + 0x2c]",
@@ -20190,7 +22615,7 @@
         "ldr s2, [x10, #44]",
         "ldr w4, [x9, #104]",
         "mvn w27, w8",
-        "subs w26, w8, #0x14 (20)",
+        "sub w26, w8, #0x14 (20)",
         "mov x8, x26",
         "str s2, [x8, #16]",
         "uxtb w7, w4",
@@ -20203,6 +22628,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "uxtb w5, w6",
         "movi v2.2d, #0x0",
@@ -20213,29 +22643,32 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "ldr w20, [x8, #56]",
         "sxtw x20, w20",
-        "mrs x21, nzcv",
-        "mov w22, #0x0",
+        "mov w21, #0x0",
         "cmp x20, #0x0 (0)",
-        "mov w23, #0x8000",
-        "csel x12, x23, x22, lt",
+        "mov w22, #0x8000",
+        "csel x23, x22, x21, lt",
         "cneg x20, x20, mi",
-        "mov w13, #0x3f",
+        "mov w12, #0x3f",
         "mov x0, #0x3f",
-        "clz x14, x20",
-        "sub x14, x0, x14",
-        "sub x14, x13, x14",
-        "lsl x15, x20, x14",
-        "mov w16, #0x403e",
-        "sub x14, x16, x14",
+        "clz x13, x20",
+        "sub x13, x0, x13",
+        "sub x13, x12, x13",
+        "lsl x14, x20, x13",
+        "mov w15, #0x403e",
+        "sub x13, x15, x13",
         "cmp x20, #0x0 (0)",
-        "csel x20, x22, x14, eq",
-        "orr x20, x12, x20",
-        "fmov d2, x15",
+        "csel x20, x21, x13, eq",
+        "orr x20, x23, x20",
+        "fmov d2, x14",
         "fmov v2.D[1], x20",
-        "msr nzcv, x21",
         "str w4, [x8, #64]",
         "mov w20, #0xddd8",
         "movk w20, #0xa3, lsl #16",
@@ -20263,28 +22696,31 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #56]",
         "str s2, [x8, #4]",
         "str w5, [x8, #56]",
         "ldr w20, [x8, #56]",
         "sxtw x20, w20",
-        "mrs x21, nzcv",
         "cmp x20, #0x0 (0)",
-        "csel x23, x23, x22, lt",
+        "csel x22, x22, x21, lt",
         "cneg x20, x20, mi",
         "mov x0, #0x3f",
-        "clz x12, x20",
-        "sub x12, x0, x12",
-        "sub x12, x13, x12",
-        "lsl x13, x20, x12",
-        "sub x12, x16, x12",
+        "clz x23, x20",
+        "sub x23, x0, x23",
+        "sub x23, x12, x23",
+        "lsl x12, x20, x23",
+        "sub x23, x15, x23",
         "cmp x20, #0x0 (0)",
-        "csel x20, x22, x12, eq",
-        "orr x20, x23, x20",
-        "fmov d2, x13",
+        "csel x20, x21, x23, eq",
+        "orr x20, x22, x20",
+        "fmov d2, x12",
         "fmov v2.D[1], x20",
-        "msr nzcv, x21",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
         "mov v1.16b, v3.16b",
@@ -20300,6 +22736,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #56]",
         "str s2, [x8]",
@@ -20318,7 +22759,7 @@
     },
     "Block6": {
       "x86InstructionCount": 315,
-      "ExpectedInstructionCount": 32,
+      "ExpectedInstructionCount": 37,
       "x86Insts": [
         "mov eax,dword [esp + 0x110]",
         "fldz",
@@ -20657,6 +23098,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8]",
         "mov w20, #0x31",
         "movk w20, #0x1, lsl #16",
@@ -20673,7 +23119,7 @@
     },
     "Block7": {
       "x86InstructionCount": 214,
-      "ExpectedInstructionCount": 1743,
+      "ExpectedInstructionCount": 2053,
       "x86Insts": [
         "fld dword [ecx + 0xc]",
         "fld dword [ecx + 0x18]",
@@ -20922,6 +23368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #24]",
         "ldr s3, [x7]",
         "str x30, [sp, #-16]!",
@@ -20947,6 +23398,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x7, #12]",
         "ldur s2, [x7, #-12]",
         "str x30, [sp, #-16]!",
@@ -20972,6 +23428,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7]",
         "ldur s3, [x7, #-24]",
         "str x30, [sp, #-16]!",
@@ -20997,6 +23458,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "stur s2, [x7, #-12]",
         "ldur s2, [x7, #-36]",
         "str x30, [sp, #-16]!",
@@ -21022,6 +23488,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21063,6 +23534,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x7, #24]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -21079,6 +23555,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21120,6 +23601,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d7, x22",
+        "fcsel d3, d7, d3, vs",
         "str s3, [x8, #4]",
         "add w22, w20, #0x1 (1)",
         "and w22, w22, #0x7",
@@ -21153,6 +23639,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x12, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d9, x12",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "ldr s8, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21180,6 +23671,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x13, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d9, x13",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -21198,6 +23694,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #60]",
         "add w22, w22, #0x1 (1)",
         "and w22, w22, #0x7",
@@ -21232,6 +23733,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x14, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d9, x14",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #56]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -21248,6 +23754,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #64]",
         "add x22, x28, x22, lsl #4",
         "strb wzr, [x28, #1017]",
@@ -21266,6 +23777,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "ldr s2, [x7, #24]",
         "str x30, [sp, #-16]!",
@@ -21290,6 +23806,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21314,6 +23835,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -21330,6 +23856,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #72]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -21364,6 +23895,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x14, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #76]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -21380,6 +23916,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21414,6 +23955,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -21448,6 +23994,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -21482,6 +24033,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -21498,6 +24054,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -21523,6 +24084,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21547,6 +24113,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -21563,6 +24134,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -21588,6 +24164,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21612,6 +24193,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -21628,6 +24214,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #8]",
         "ldr s3, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -21653,6 +24244,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #64]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -21677,6 +24273,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -21711,6 +24312,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -21745,6 +24351,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -21779,6 +24390,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #64]",
         "ldr s2, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -21813,6 +24429,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #68]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -21847,6 +24468,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -21881,6 +24507,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d3, x14",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #76]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -21909,6 +24540,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x14, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #88]",
         "mov w14, #0x7b98",
         "movk w14, #0xa7, lsl #16",
@@ -21936,6 +24572,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #92]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -21973,6 +24614,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #84]",
         "strb wzr, [x28, #1017]",
         "mov w14, #0x7b88",
@@ -22000,6 +24646,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x15, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d6, x15",
+        "fcsel d2, d6, d2, vs",
         "str s2, [x8, #96]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -22036,6 +24687,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #80]",
         "mov w16, #0x7b78",
         "movk w16, #0xa7, lsl #16",
@@ -22062,6 +24718,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x17, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x17, x17, #0x8000000000000",
+        "fmov d6, x17",
+        "fcsel d2, d6, d2, vs",
         "str s2, [x8, #100]",
         "ldr s2, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -22078,6 +24739,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x17, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x17, x17, #0x8000000000000",
+        "fmov d6, x17",
+        "fcsel d2, d6, d2, vs",
         "str s2, [x8, #56]",
         "ldr s2, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -22110,6 +24776,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #60]",
         "ldr s6, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -22135,6 +24806,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #64]",
         "strb wzr, [x28, #1017]",
         "ldr q7, [x28, #3472]",
@@ -22149,7 +24825,7 @@
         "mov v3.16b, v0.16b",
         "add w4, w4, #0x18 (24)",
         "add w7, w7, #0x4 (4)",
-        "subs w26, w5, #0x1 (1)",
+        "sub w26, w5, #0x1 (1)",
         "mov x27, x5",
         "mov x5, x26",
         "str x30, [sp, #-16]!",
@@ -22159,6 +24835,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #68]",
         "strb wzr, [x28, #1017]",
         "ldr q7, [x28, #3472]",
@@ -22178,6 +24859,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d2, d5, d2, vs",
         "str s2, [x8, #72]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -22212,6 +24898,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #76]",
         "ldr d7, [x16]",
         "str x30, [sp, #-16]!",
@@ -22236,6 +24927,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x8, #56]",
         "ldur s2, [x4, #-28]",
         "str x30, [sp, #-16]!",
@@ -22268,6 +24964,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-28]",
         "ldur s2, [x4, #-24]",
         "str x30, [sp, #-16]!",
@@ -22300,6 +25001,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-24]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -22332,6 +25038,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-20]",
         "ldur s2, [x4, #-16]",
         "str x30, [sp, #-16]!",
@@ -22364,6 +25075,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-16]",
         "ldur s2, [x4, #-12]",
         "str x30, [sp, #-16]!",
@@ -22396,6 +25112,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-12]",
         "ldur s2, [x4, #-8]",
         "str x30, [sp, #-16]!",
@@ -22428,6 +25149,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-8]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -22460,6 +25186,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "stur s2, [x4, #-4]",
         "ldr s2, [x4]",
         "str x30, [sp, #-16]!",
@@ -22492,6 +25223,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x4]",
         "ldr s2, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -22524,6 +25260,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x4, #4]",
         "ldr s2, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -22556,6 +25297,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x4, #8]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -22588,6 +25334,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x14, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d2, d7, d2, vs",
         "str s2, [x4, #12]",
         "ldr s2, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -22620,6 +25371,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #16]",
         "strb w20, [x28, #1019]",
         "str q6, [x23, #1040]",
@@ -22638,7 +25394,7 @@
     },
     "Block8": {
       "x86InstructionCount": 229,
-      "ExpectedInstructionCount": 1903,
+      "ExpectedInstructionCount": 2083,
       "x86Insts": [
         "movzx eax,word [esi + edx*0x8]",
         "fld dword [esi + edx*0x8 + 0x4]",
@@ -23000,6 +25756,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #208]",
         "ldr s2, [x8, #168]",
         "str x30, [sp, #-16]!",
@@ -23114,6 +25875,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #212]",
         "ldr s2, [x8, #180]",
         "str x30, [sp, #-16]!",
@@ -23233,6 +25999,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #216]",
         "ldr s2, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -23333,6 +26104,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x8, #232]",
         "ldr s3, [x8, #112]",
         "str x30, [sp, #-16]!",
@@ -23433,6 +26209,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #236]",
         "ldr s6, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -23532,6 +26313,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #240]",
         "add w20, w10, w4",
         "ldr s6, [x20, #4]",
@@ -23606,6 +26392,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #88]",
         "add w20, w10, w4",
         "ldr s6, [x20, #4]",
@@ -23688,6 +26479,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #92]",
         "ldr s6, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -23795,6 +26591,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d6, d8, d6, vs",
         "str s6, [x8, #96]",
         "add w20, w10, w4",
         "ldr s6, [x20]",
@@ -23873,6 +26674,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #76]",
         "add w20, w10, w4",
         "ldr s2, [x20]",
@@ -23955,6 +26761,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #80]",
         "ldr s2, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -24054,6 +26865,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #84]",
         "ldr s2, [x8, #208]",
         "str x30, [sp, #-16]!",
@@ -24087,6 +26903,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #192]",
         "ldr s2, [x8, #212]",
         "str x30, [sp, #-16]!",
@@ -24111,6 +26932,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #196]",
         "ldr s2, [x8, #216]",
         "str x30, [sp, #-16]!",
@@ -24135,6 +26961,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #200]",
         "ldr s2, [x8, #192]",
         "str x30, [sp, #-16]!",
@@ -24169,11 +27000,16 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20]",
         "add w5, w5, #0x1 (1)",
         "ldr w20, [x8, #28]",
         "eor x27, x5, x20",
-        "subs w26, w5, w20",
+        "sub w26, w5, w20",
         "ldr s2, [x8, #196]",
         "str x30, [sp, #-16]!",
         "fmov s0, s2",
@@ -24207,6 +27043,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20, #4]",
         "add w20, w7, #0x8 (8)",
         "add w4, w20, w4",
@@ -24241,6 +27082,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x8, #476]",
         "ldr s2, [x8, #232]",
@@ -24266,6 +27112,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #220]",
         "ldr s2, [x8, #236]",
         "str x30, [sp, #-16]!",
@@ -24290,6 +27141,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #224]",
         "ldr s2, [x8, #240]",
         "str x30, [sp, #-16]!",
@@ -24314,6 +27170,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #228]",
         "ldr s2, [x8, #220]",
         "str x30, [sp, #-16]!",
@@ -24348,6 +27209,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20]",
         "ldr s2, [x8, #224]",
         "str x30, [sp, #-16]!",
@@ -24382,6 +27248,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20, #4]",
         "ldr s2, [x8, #228]",
         "str x30, [sp, #-16]!",
@@ -24416,6 +27287,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20, #8]",
         "ldr s2, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -24440,6 +27316,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #60]",
         "ldr s2, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -24464,6 +27345,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #64]",
         "ldr s2, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -24488,6 +27374,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #68]",
         "add w20, w7, w4",
         "ldr s2, [x20]",
@@ -24522,6 +27413,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20]",
         "ldr s2, [x8, #64]",
         "str x30, [sp, #-16]!",
@@ -24556,6 +27452,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x20, #4]",
         "add w20, w7, #0x8 (8)",
         "add w4, w20, w4",
@@ -24590,6 +27491,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x8, #480]",
         "ldr s2, [x8, #76]",
@@ -24615,6 +27521,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -24639,6 +27550,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -24663,6 +27579,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #52]",
         "add w20, w7, w4",
         "ldr s2, [x20]",
@@ -24697,6 +27618,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x20]",
         "ldr s2, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -24731,6 +27657,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x20, #4]",
         "add w20, w7, #0x8 (8)",
         "add w7, w20, w4",
@@ -24765,6 +27696,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x7]",
         "ldrb w20, [x28, #1019]",
         "ldrb w21, [x28, #1186]",
@@ -24778,7 +27714,7 @@
     },
     "Block9": {
       "x86InstructionCount": 260,
-      "ExpectedInstructionCount": 80,
+      "ExpectedInstructionCount": 90,
       "x86Insts": [
         "fld dword [edi]",
         "fmul st0",
@@ -25065,6 +28001,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -25099,6 +28040,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -25126,7 +28072,7 @@
     },
     "Block10": {
       "x86InstructionCount": 206,
-      "ExpectedInstructionCount": 183,
+      "ExpectedInstructionCount": 233,
       "x86Insts": [
         "fld dword [0x00b42a74]",
         "push ecx",
@@ -25420,6 +28366,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x21, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #72]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25428,6 +28379,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x21, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d4, x21",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #88]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25436,6 +28392,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #104]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -25448,6 +28409,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #76]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25456,6 +28422,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #80]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25464,6 +28435,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #84]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25472,6 +28448,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #92]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25480,6 +28461,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #96]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -25488,6 +28474,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #100]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -25506,6 +28497,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x22, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d4, x22",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8]",
         "mov w22, #0xc5",
         "movk w22, #0x1, lsl #16",
diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
index bbc1717c3..3f359923e 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
@@ -14,7 +14,7 @@
   "Instructions": {
     "Block1": {
       "x86InstructionCount": 520,
-      "ExpectedInstructionCount": 4570,
+      "ExpectedInstructionCount": 5110,
       "x86Insts": [
         "sub esp,0x88",
         "fld dword [ecx + 0x4]",
@@ -662,6 +662,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #8]",
         "ldr s9, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -694,6 +699,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8]",
         "ldr s9, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -734,6 +744,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #4]",
         "ldr s9, [x8]",
         "str x30, [sp, #-16]!",
@@ -774,6 +789,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8]",
         "ldr s9, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -798,6 +818,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #128]",
         "ldr s9, [x8]",
         "str x30, [sp, #-16]!",
@@ -822,6 +847,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #120]",
         "strb wzr, [x28, #1017]",
         "ldr s9, [x8, #4]",
@@ -847,6 +877,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d7, d9, d7, vs",
         "str s7, [x8, #96]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -871,6 +906,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #64]",
         "ldr s7, [x4, #68]",
         "str x30, [sp, #-16]!",
@@ -951,6 +991,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #8]",
         "ldr s9, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -983,6 +1028,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8]",
         "ldr s9, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -1023,6 +1073,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #4]",
         "ldr s9, [x8]",
         "str x30, [sp, #-16]!",
@@ -1063,6 +1118,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8]",
         "ldr s9, [x8]",
         "str x30, [sp, #-16]!",
@@ -1087,6 +1147,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #36]",
         "ldr s9, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -1111,6 +1176,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8, #52]",
         "ldr s9, [x8]",
         "str x30, [sp, #-16]!",
@@ -1135,6 +1205,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d7, d9, d7, vs",
         "str s7, [x8, #92]",
         "ldr s7, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -1159,6 +1234,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #100]",
         "ldr s7, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -1215,6 +1295,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -1255,6 +1340,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -1295,6 +1385,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -1351,6 +1446,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -1407,6 +1507,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8]",
         "str x30, [sp, #-16]!",
@@ -1464,6 +1569,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "ldr s7, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -1496,6 +1606,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #88]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -1528,6 +1643,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #48]",
         "ldr s7, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -1560,6 +1680,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #104]",
         "ldr s7, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -1592,6 +1717,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #80]",
         "ldr s7, [x4, #76]",
         "str x30, [sp, #-16]!",
@@ -1648,6 +1778,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -1704,6 +1839,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -1760,6 +1900,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #108]",
         "str x30, [sp, #-16]!",
@@ -1816,6 +1961,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s9, s0",
+        "mov x20, v9.d[0]",
+        "fcmp d9, d9",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d10, x20",
+        "fcsel d9, d10, d9, vs",
         "str s9, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v8.16b",
@@ -1848,6 +1998,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8]",
         "str x30, [sp, #-16]!",
@@ -1889,6 +2044,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "ldr s7, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -1921,6 +2081,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #68]",
         "ldr s7, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -1953,6 +2118,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #76]",
         "ldr s7, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -1985,6 +2155,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #116]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -2017,6 +2192,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #132]",
         "ldr s7, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -2073,6 +2253,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2113,6 +2298,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2153,6 +2343,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -2209,6 +2404,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2249,6 +2449,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "ldr s8, [x8]",
         "str x30, [sp, #-16]!",
@@ -2290,6 +2495,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "ldr s7, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -2322,6 +2532,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -2354,6 +2569,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #40]",
         "ldr s7, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -2386,6 +2606,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #24]",
         "ldr s7, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -2418,6 +2643,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #56]",
         "ldr s7, [x4, #84]",
         "str x30, [sp, #-16]!",
@@ -2474,6 +2704,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2514,6 +2749,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "ldr s8, [x8]",
         "str x30, [sp, #-16]!",
@@ -2555,6 +2795,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #116]",
         "str x30, [sp, #-16]!",
@@ -2611,6 +2856,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2651,6 +2901,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -2691,6 +2946,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -2723,6 +2983,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #44]",
         "ldr s5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -2755,6 +3020,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #60]",
         "ldr s5, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -2787,6 +3057,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #108]",
         "ldr s5, [x8]",
         "str x30, [sp, #-16]!",
@@ -2819,6 +3094,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #84]",
         "ldr s5, [x4, #24]",
         "str x30, [sp, #-16]!",
@@ -2915,6 +3195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #12]",
         "strb wzr, [x28, #1017]",
         "ldr s7, [x8, #16]",
@@ -3037,6 +3322,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -3070,6 +3360,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8]",
         "ldr s6, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -3102,6 +3397,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #8]",
         "ldr s6, [x8]",
         "str x30, [sp, #-16]!",
@@ -3126,6 +3426,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #112]",
         "ldr s6, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -3158,6 +3463,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "ldr s6, [x8]",
         "str x30, [sp, #-16]!",
@@ -3182,6 +3492,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #72]",
         "ldr s5, [x4, #92]",
         "str x30, [sp, #-16]!",
@@ -3262,6 +3577,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -3383,6 +3703,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #4]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -3456,6 +3781,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -3472,6 +3802,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #16]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -3504,6 +3839,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #124]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -3616,6 +3956,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -3632,6 +3977,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -3656,6 +4006,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -3673,6 +4028,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x4, #8]",
         "ldr s4, [x8]",
         "str x30, [sp, #-16]!",
@@ -3697,6 +4057,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #12]",
         "ldr s4, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -3809,6 +4174,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x4, #16]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -3825,6 +4195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x4, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -3841,6 +4216,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d4, d7, d4, vs",
         "str s4, [x4, #24]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -3858,6 +4238,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #28]",
         "ldr s4, [x8, #96]",
         "str x30, [sp, #-16]!",
@@ -3978,6 +4363,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4018,6 +4408,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #32]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4034,6 +4429,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #36]",
         "strb wzr, [x28, #1017]",
         "ldr s7, [x8, #4]",
@@ -4059,6 +4459,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d4, d7, d4, vs",
         "str s4, [x4, #40]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -4075,6 +4480,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #44]",
         "ldr s4, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -4195,6 +4605,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4227,6 +4642,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #48]",
         "ldr s7, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -4251,6 +4671,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #52]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4267,6 +4692,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x4, #56]",
         "ldr s4, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -4291,6 +4721,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #60]",
         "ldr s4, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -4395,6 +4830,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4411,6 +4851,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #64]",
         "ldr s7, [x8]",
         "str x30, [sp, #-16]!",
@@ -4435,6 +4880,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #68]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -4452,6 +4902,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x4, #72]",
         "ldr s4, [x8]",
         "str x30, [sp, #-16]!",
@@ -4476,6 +4931,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #76]",
         "ldr s4, [x8, #36]",
         "str x30, [sp, #-16]!",
@@ -4588,6 +5048,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x4, #80]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4604,6 +5069,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x4, #84]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -4620,6 +5090,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d4, d7, d4, vs",
         "str s4, [x4, #88]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -4637,6 +5112,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #92]",
         "ldr s4, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -4749,6 +5229,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4789,6 +5274,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #96]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -4805,6 +5295,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x4, #100]",
         "strb wzr, [x28, #1017]",
         "ldr s7, [x8, #4]",
@@ -4830,6 +5325,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d4, d7, d4, vs",
         "str s4, [x4, #104]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -4846,6 +5346,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #108]",
         "ldr s4, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -4878,6 +5383,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #12]",
         "ldr s4, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -4910,6 +5420,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #8]",
         "ldr s4, [x8, #116]",
         "str x30, [sp, #-16]!",
@@ -4974,6 +5489,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #4]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -5014,6 +5534,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #112]",
         "ldr s3, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -5046,6 +5571,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #116]",
         "ldr s3, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -5070,6 +5600,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #120]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -5102,6 +5637,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #124]",
         "adds w26, w8, #0x88 (136)",
         "cfinv",
@@ -5112,7 +5652,7 @@
     },
     "Block2": {
       "x86InstructionCount": 434,
-      "ExpectedInstructionCount": 3932,
+      "ExpectedInstructionCount": 4457,
       "x86Insts": [
         "sub esp,0x90",
         "fld dword [ecx + 0x4]",
@@ -5670,6 +6210,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #4]",
         "str x30, [sp, #-16]!",
@@ -5702,6 +6247,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #4]",
         "ldr s7, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -5758,6 +6308,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x4, #32]",
         "str x30, [sp, #-16]!",
@@ -5790,6 +6345,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x4, #36]",
         "str x30, [sp, #-16]!",
@@ -5822,6 +6382,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -5838,6 +6403,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #84]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -5862,6 +6432,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #100]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -5879,6 +6454,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d5, d7, d5, vs",
         "str s5, [x8, #60]",
         "ldr s5, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -5903,6 +6483,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #68]",
         "ldr s5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -5935,6 +6520,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #96]",
         "ldr s5, [x8]",
         "str x30, [sp, #-16]!",
@@ -5967,6 +6557,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #120]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -5999,6 +6594,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #80]",
         "ldr s5, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -6031,6 +6631,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #40]",
         "ldr s5, [x4, #8]",
         "str x30, [sp, #-16]!",
@@ -6111,6 +6716,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #12]",
         "str x30, [sp, #-16]!",
@@ -6143,6 +6753,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #4]",
         "ldr s7, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -6199,6 +6814,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x4, #40]",
         "str x30, [sp, #-16]!",
@@ -6231,6 +6851,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x4, #44]",
         "str x30, [sp, #-16]!",
@@ -6263,6 +6888,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -6279,6 +6909,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #116]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -6303,6 +6938,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #132]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6320,6 +6960,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d5, d7, d5, vs",
         "str s5, [x8, #32]",
         "ldr s5, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -6344,6 +6989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #36]",
         "ldr s5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -6424,6 +7074,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #104]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -6457,6 +7112,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #136]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -6537,6 +7197,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #128]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6571,6 +7236,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #48]",
         "ldr s5, [x4, #16]",
         "str x30, [sp, #-16]!",
@@ -6651,6 +7321,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #20]",
         "str x30, [sp, #-16]!",
@@ -6683,6 +7358,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #4]",
         "ldr s7, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -6739,6 +7419,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x4, #48]",
         "str x30, [sp, #-16]!",
@@ -6771,6 +7456,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x4, #52]",
         "str x30, [sp, #-16]!",
@@ -6803,6 +7493,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -6819,6 +7514,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #92]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -6843,6 +7543,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #108]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -6860,6 +7565,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d5, d7, d5, vs",
         "str s5, [x8, #76]",
         "ldr s5, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -6884,6 +7594,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #52]",
         "ldr s5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -6956,6 +7671,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #56]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -6980,6 +7700,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #64]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -7052,6 +7777,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #72]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -7076,6 +7806,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #88]",
         "ldr s5, [x4, #88]",
         "str x30, [sp, #-16]!",
@@ -7156,6 +7891,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #8]",
         "ldr s7, [x4, #28]",
         "str x30, [sp, #-16]!",
@@ -7188,6 +7928,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #4]",
         "ldr s7, [x4, #120]",
         "str x30, [sp, #-16]!",
@@ -7244,6 +7989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #16]",
         "ldr s8, [x4, #56]",
         "str x30, [sp, #-16]!",
@@ -7276,6 +8026,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8]",
         "ldr s8, [x4, #60]",
         "str x30, [sp, #-16]!",
@@ -7308,6 +8063,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -7324,6 +8084,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #124]",
         "ldr s8, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -7348,6 +8113,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x20, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d9, x20",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x8, #140]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -7365,6 +8135,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d5, d7, d5, vs",
         "str s5, [x8, #44]",
         "ldr s5, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -7389,6 +8164,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #112]",
         "ldr s5, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -7469,6 +8249,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #28]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -7503,6 +8288,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #20]",
         "ldr s5, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -7583,6 +8373,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x20, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -7664,6 +8459,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #24]",
         "ldr s5, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -7696,6 +8496,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #8]",
         "ldr s5, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -7728,6 +8533,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #4]",
         "ldr s5, [x8, #128]",
         "str x30, [sp, #-16]!",
@@ -7776,6 +8586,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldr s6, [x8]",
         "str x30, [sp, #-16]!",
@@ -7808,6 +8623,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8]",
         "strb wzr, [x28, #1017]",
         "ldr s6, [x8, #48]",
@@ -7833,6 +8653,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x8, #12]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -7850,6 +8675,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x4, #96]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -7882,6 +8712,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d3, d6, d3, vs",
         "str s3, [x4, #100]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -7899,6 +8734,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #104]",
         "ldr s3, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -7931,6 +8771,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #108]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -7963,6 +8808,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #112]",
         "ldr s3, [x8]",
         "str x30, [sp, #-16]!",
@@ -7995,6 +8845,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #116]",
         "ldr s3, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -8027,6 +8882,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #120]",
         "ldr s3, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -8059,6 +8919,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #124]",
         "ldr s3, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -8139,6 +9004,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #8]",
         "ldr s5, [x8, #120]",
         "str x30, [sp, #-16]!",
@@ -8171,6 +9041,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #4]",
         "ldr s5, [x8, #28]",
         "str x30, [sp, #-16]!",
@@ -8227,6 +9102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldr s6, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -8259,6 +9139,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8]",
         "ldr s6, [x8, #136]",
         "str x30, [sp, #-16]!",
@@ -8291,6 +9176,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -8307,6 +9197,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x4, #64]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -8331,6 +9226,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x4, #68]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -8348,6 +9248,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x4, #72]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -8372,6 +9277,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #76]",
         "ldr s3, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -8404,6 +9314,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #80]",
         "ldr s3, [x8]",
         "str x30, [sp, #-16]!",
@@ -8436,6 +9351,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #84]",
         "ldr s3, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -8468,6 +9388,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #88]",
         "ldr s3, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -8500,6 +9425,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x20, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x4, #92]",
         "ldr s3, [x8, #32]",
         "str x30, [sp, #-16]!",
@@ -8572,6 +9502,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v3.16b",
@@ -8660,6 +9595,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x20, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d7, x20",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -8684,6 +9624,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x8, #12]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -8740,6 +9685,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #24]",
         "ldr s4, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -8772,6 +9722,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #8]",
         "ldr s4, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -8804,6 +9759,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #4]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -8828,6 +9788,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #32]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -8852,6 +9817,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x4, #36]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -8876,6 +9846,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #40]",
         "ldr s2, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -8900,6 +9875,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #44]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -8932,6 +9912,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #48]",
         "ldr s2, [x8]",
         "str x30, [sp, #-16]!",
@@ -8964,6 +9949,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #52]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -8996,6 +9986,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #56]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -9028,6 +10023,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #60]",
         "ldr s2, [x8, #92]",
         "str x30, [sp, #-16]!",
@@ -9108,6 +10108,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #8]",
         "ldr s4, [x8, #100]",
         "str x30, [sp, #-16]!",
@@ -9140,6 +10145,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x20, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d5, x20",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #4]",
         "ldr s4, [x8, #124]",
         "str x30, [sp, #-16]!",
@@ -9196,6 +10206,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #16]",
         "ldr s5, [x8, #116]",
         "str x30, [sp, #-16]!",
@@ -9228,6 +10243,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8]",
         "ldr s5, [x8, #132]",
         "str x30, [sp, #-16]!",
@@ -9260,6 +10280,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v4.16b",
@@ -9276,6 +10301,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4]",
         "ldr s5, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -9300,6 +10330,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x20, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d6, x20",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x4, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -9317,6 +10352,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d4, x20",
+        "fcsel d2, d4, d2, vs",
         "str s2, [x4, #8]",
         "ldr s2, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -9341,6 +10381,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #12]",
         "ldr s2, [x8, #8]",
         "str x30, [sp, #-16]!",
@@ -9373,6 +10418,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #16]",
         "ldr s2, [x8]",
         "str x30, [sp, #-16]!",
@@ -9405,6 +10455,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #20]",
         "ldr s2, [x8, #12]",
         "str x30, [sp, #-16]!",
@@ -9437,6 +10492,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #24]",
         "ldr s2, [x8, #4]",
         "str x30, [sp, #-16]!",
@@ -9469,6 +10529,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4, #28]",
         "mvn w27, w8",
         "adds w26, w8, #0x90 (144)",
@@ -10288,7 +11353,7 @@
     },
     "Block4": {
       "x86InstructionCount": 351,
-      "ExpectedInstructionCount": 2809,
+      "ExpectedInstructionCount": 3122,
       "x86Insts": [
         "mov ebp,dword [esp + 0x64]",
         "fadd dword [ebp + 0x8]",
@@ -10688,6 +11753,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -10736,6 +11806,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #104]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -10784,6 +11859,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -10832,6 +11912,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #40]",
         "ldur s2, [x9, #-8]",
         "str x30, [sp, #-16]!",
@@ -10867,6 +11952,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x12, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d4, x12",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #60]",
         "ldur s3, [x11, #-8]",
         "str x30, [sp, #-16]!",
@@ -10955,6 +12045,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #20]",
         "ldur s5, [x5, #-4]",
         "str x30, [sp, #-16]!",
@@ -10987,6 +12082,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #28]",
         "ldr s5, [x11]",
         "str x30, [sp, #-16]!",
@@ -11019,6 +12119,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #68]",
         "ldr s5, [x11, #4]",
         "str x30, [sp, #-16]!",
@@ -11053,6 +12158,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #80]",
         "ldr s5, [x11]",
         "str x30, [sp, #-16]!",
@@ -11085,6 +12195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #84]",
         "ldr s5, [x5, #4]",
         "str x30, [sp, #-16]!",
@@ -11117,6 +12232,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #92]",
         "ldur s5, [x7, #-8]",
         "str x30, [sp, #-16]!",
@@ -11176,6 +12296,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldur s6, [x10, #-8]",
         "str x30, [sp, #-16]!",
@@ -11208,6 +12333,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #32]",
         "ldur s6, [x10, #-4]",
         "str x30, [sp, #-16]!",
@@ -11240,6 +12370,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #24]",
         "ldr s6, [x7]",
         "str x30, [sp, #-16]!",
@@ -11272,6 +12407,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #72]",
         "ldr s6, [x7, #4]",
         "str x30, [sp, #-16]!",
@@ -11304,6 +12444,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #76]",
         "ldr s6, [x10]",
         "str x30, [sp, #-16]!",
@@ -11336,6 +12481,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #96]",
         "ldr s6, [x10, #4]",
         "str x30, [sp, #-16]!",
@@ -11368,6 +12518,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #88]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -11384,6 +12539,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x11, #-8]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -11408,6 +12568,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x11, #-4]",
         "ldr s6, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -11440,6 +12605,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x11]",
         "ldr s6, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -11472,6 +12642,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x11, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -11489,6 +12664,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "stur s3, [x10, #-8]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -11513,6 +12693,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x10, #-4]",
         "ldr s3, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -11545,6 +12730,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x10]",
         "ldr s3, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -11577,6 +12767,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x10, #4]",
         "ldr s3, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -11673,6 +12868,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "stur s5, [x5, #-8]",
         "ldr s5, [x8, #108]",
         "str x30, [sp, #-16]!",
@@ -11721,6 +12921,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x5, #-4]",
         "ldr s3, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -11809,6 +13014,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x5]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -11849,6 +13059,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x5, #4]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -11946,6 +13161,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "stur s5, [x7, #-8]",
         "ldr s5, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -11994,6 +13214,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x7, #-4]",
         "ldr s3, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -12090,6 +13315,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x7]",
         "ldr s5, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -12138,6 +13368,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #4]",
         "ldr s3, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -12225,6 +13460,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #20]",
         "ldr s5, [x9, #12]",
         "str x30, [sp, #-16]!",
@@ -12259,6 +13499,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #28]",
         "ldr s5, [x9]",
         "str x30, [sp, #-16]!",
@@ -12292,6 +13537,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #68]",
         "ldr s5, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -12328,6 +13578,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #80]",
         "ldr s5, [x9]",
         "str x30, [sp, #-16]!",
@@ -12361,6 +13616,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #84]",
         "ldr s5, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -12395,6 +13655,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #92]",
         "ldr s5, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -12451,6 +13716,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldr s6, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -12483,6 +13753,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #32]",
         "ldr s6, [x9, #12]",
         "str x30, [sp, #-16]!",
@@ -12515,6 +13790,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #24]",
         "ldr s6, [x9]",
         "str x30, [sp, #-16]!",
@@ -12547,6 +13827,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #72]",
         "ldr s6, [x6, #4]",
         "str x30, [sp, #-16]!",
@@ -12579,6 +13864,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #76]",
         "ldr s6, [x9]",
         "str x30, [sp, #-16]!",
@@ -12611,6 +13901,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #96]",
         "ldr s6, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -12644,6 +13939,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #88]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -12660,6 +13960,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #8]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -12684,6 +13989,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #12]",
         "ldr s6, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -12716,6 +14026,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9]",
         "ldr s6, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -12748,6 +14063,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #4]",
         "ldr w9, [x8, #112]",
         "strb wzr, [x28, #1017]",
@@ -12766,6 +14086,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x9, #8]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -12790,6 +14115,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #12]",
         "ldr s3, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -12822,6 +14152,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9]",
         "ldr s3, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -12854,6 +14189,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #4]",
         "ldr w9, [x8, #48]",
         "ldr s3, [x8, #24]",
@@ -12951,6 +14291,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x9, #8]",
         "ldr s5, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -12999,6 +14344,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #12]",
         "ldr s3, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -13087,6 +14437,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x9]",
         "sub w9, w9, #0x10 (16)",
         "ldr s5, [x8, #52]",
@@ -13134,6 +14489,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #20]",
         "ldr w9, [x8, #112]",
         "sub w9, w9, #0x10 (16)",
@@ -13147,7 +14507,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v3.16b, v0.16b",
-        "subs w9, w9, #0x10 (16)",
+        "sub w9, w9, #0x10 (16)",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
         "fmov s0, s4",
@@ -13190,9 +14550,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v4.16b, v0.16b",
-        "cset x14, hs",
-        "subs w26, w9, #0x1 (1)",
-        "rmif x14, #63, #nzCv",
+        "sub w26, w9, #0x1 (1)",
         "mov x27, x9",
         "mov x9, x26",
         "ldr s5, [x8, #44]",
@@ -13243,6 +14601,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x6, #24]",
         "ldr s5, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -13291,6 +14654,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x6, #28]",
         "ldr s3, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -13387,6 +14755,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x6, #16]",
         "ldr s5, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -13435,6 +14808,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x6, #20]",
         "strb w20, [x28, #1019]",
         "str q2, [x21, #1040]",
@@ -13456,7 +14834,7 @@
     },
     "Block5": {
       "x86InstructionCount": 346,
-      "ExpectedInstructionCount": 2804,
+      "ExpectedInstructionCount": 3117,
       "x86Insts": [
         "mov ebp,dword [esp + 0x64]",
         "fadd dword [ebp + 0x8]",
@@ -13851,6 +15229,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #108]",
         "ldr s2, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -13899,6 +15282,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #104]",
         "ldr s2, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -13947,6 +15335,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #48]",
         "ldr s2, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -13995,6 +15388,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #44]",
         "ldur s2, [x9, #-8]",
         "str x30, [sp, #-16]!",
@@ -14030,6 +15428,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x12, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d4, x12",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x8, #60]",
         "ldur s3, [x5, #-8]",
         "str x30, [sp, #-16]!",
@@ -14116,6 +15519,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #24]",
         "ldur s5, [x11, #-4]",
         "str x30, [sp, #-16]!",
@@ -14148,6 +15556,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #28]",
         "ldr s5, [x11]",
         "str x30, [sp, #-16]!",
@@ -14180,6 +15593,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #68]",
         "ldr s5, [x11, #4]",
         "str x30, [sp, #-16]!",
@@ -14212,6 +15630,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #76]",
         "ldr s5, [x11]",
         "str x30, [sp, #-16]!",
@@ -14244,6 +15667,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #88]",
         "ldr s5, [x11, #4]",
         "str x30, [sp, #-16]!",
@@ -14276,6 +15704,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #92]",
         "ldur s5, [x7, #-8]",
         "str x30, [sp, #-16]!",
@@ -14335,6 +15768,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldur s6, [x10, #-8]",
         "str x30, [sp, #-16]!",
@@ -14367,6 +15805,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #32]",
         "ldur s6, [x10, #-4]",
         "str x30, [sp, #-16]!",
@@ -14399,6 +15842,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #20]",
         "ldr s6, [x7]",
         "str x30, [sp, #-16]!",
@@ -14431,6 +15879,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #72]",
         "ldr s6, [x7, #4]",
         "str x30, [sp, #-16]!",
@@ -14463,6 +15916,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #80]",
         "ldr s6, [x10]",
         "str x30, [sp, #-16]!",
@@ -14495,6 +15953,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #96]",
         "ldr s6, [x10, #4]",
         "str x30, [sp, #-16]!",
@@ -14527,6 +15990,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #84]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -14543,6 +16011,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x11, #-8]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -14567,6 +16040,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x11, #-4]",
         "ldr s6, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -14599,6 +16077,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x11]",
         "ldr s6, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -14631,6 +16114,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x11, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -14648,6 +16136,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "stur s3, [x10, #-8]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -14672,6 +16165,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x10, #-4]",
         "ldr s3, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -14704,6 +16202,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x10]",
         "ldr s3, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -14736,6 +16239,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x10, #4]",
         "ldr s3, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -14832,6 +16340,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "stur s5, [x5, #-8]",
         "ldr s5, [x8, #108]",
         "str x30, [sp, #-16]!",
@@ -14880,6 +16393,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x5, #-4]",
         "ldr s3, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -14968,6 +16486,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x5]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -15008,6 +16531,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x5, #4]",
         "ldr s3, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -15105,6 +16633,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "stur s5, [x7, #-8]",
         "ldr s5, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -15153,6 +16686,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "stur s3, [x7, #-4]",
         "ldr s3, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -15249,6 +16787,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x7]",
         "ldr s5, [x8, #56]",
         "str x30, [sp, #-16]!",
@@ -15297,6 +16840,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x7, #4]",
         "ldr s3, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -15383,6 +16931,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #24]",
         "ldr s5, [x9, #12]",
         "str x30, [sp, #-16]!",
@@ -15417,6 +16970,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #28]",
         "ldr s5, [x9]",
         "str x30, [sp, #-16]!",
@@ -15451,6 +17009,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #68]",
         "ldr s5, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -15485,6 +17048,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #76]",
         "ldr s5, [x9]",
         "str x30, [sp, #-16]!",
@@ -15519,6 +17087,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #88]",
         "ldr s5, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -15553,6 +17126,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x8, #92]",
         "ldr s5, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -15609,6 +17187,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #16]",
         "ldr s6, [x9, #8]",
         "str x30, [sp, #-16]!",
@@ -15641,6 +17224,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #32]",
         "ldr s6, [x9, #12]",
         "str x30, [sp, #-16]!",
@@ -15673,6 +17261,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #20]",
         "ldr s6, [x6]",
         "str x30, [sp, #-16]!",
@@ -15705,6 +17298,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #72]",
         "ldr s6, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -15737,6 +17335,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #80]",
         "ldr s6, [x9]",
         "str x30, [sp, #-16]!",
@@ -15769,6 +17372,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #96]",
         "ldr s6, [x9, #4]",
         "str x30, [sp, #-16]!",
@@ -15802,6 +17410,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #84]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -15818,6 +17431,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #8]",
         "ldr s6, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15842,6 +17460,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #12]",
         "ldr s6, [x8, #72]",
         "str x30, [sp, #-16]!",
@@ -15874,6 +17497,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9]",
         "ldr s6, [x8, #80]",
         "str x30, [sp, #-16]!",
@@ -15906,6 +17534,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x14, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d7, x14",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x9, #4]",
         "ldr w9, [x8, #112]",
         "strb wzr, [x28, #1017]",
@@ -15924,6 +17557,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d5, x14",
+        "fcsel d3, d5, d3, vs",
         "str s3, [x9, #8]",
         "ldr s3, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -15948,6 +17586,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #12]",
         "ldr s3, [x8, #68]",
         "str x30, [sp, #-16]!",
@@ -15980,6 +17623,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9]",
         "ldr s3, [x8, #76]",
         "str x30, [sp, #-16]!",
@@ -16012,6 +17660,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #4]",
         "ldr w9, [x8, #40]",
         "ldr s3, [x8, #24]",
@@ -16109,6 +17762,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x9, #8]",
         "ldr s5, [x8, #104]",
         "str x30, [sp, #-16]!",
@@ -16157,6 +17815,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #12]",
         "ldr s3, [x8, #88]",
         "str x30, [sp, #-16]!",
@@ -16245,6 +17908,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x9]",
         "ldr s5, [x8, #52]",
         "str x30, [sp, #-16]!",
@@ -16290,6 +17958,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x9, #20]",
         "ldr w9, [x8, #112]",
         "sub w9, w9, #0x10 (16)",
@@ -16355,10 +18028,8 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v5.16b, v0.16b",
-        "subs w6, w6, #0x10 (16)",
-        "cset x14, hs",
-        "subs w26, w9, #0x1 (1)",
-        "rmif x14, #63, #nzCv",
+        "sub w6, w6, #0x10 (16)",
+        "sub w26, w9, #0x1 (1)",
         "mov x27, x9",
         "mov x9, x26",
         "str x30, [sp, #-16]!",
@@ -16401,6 +18072,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x6, #24]",
         "ldr s5, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -16449,6 +18125,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s3, s0",
+        "mov x14, v3.d[0]",
+        "fcmp d3, d3",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d4, x14",
+        "fcsel d3, d4, d3, vs",
         "str s3, [x6, #28]",
         "ldr s3, [x8, #84]",
         "str x30, [sp, #-16]!",
@@ -16545,6 +18226,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s5, s0",
+        "mov x14, v5.d[0]",
+        "fcmp d5, d5",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d6, x14",
+        "fcsel d5, d6, d5, vs",
         "str s5, [x6, #16]",
         "ldr s5, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -16593,6 +18279,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x14, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x14, x14, #0x8000000000000",
+        "fmov d8, x14",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x6, #20]",
         "strb w20, [x28, #1019]",
         "str q2, [x21, #1040]",
@@ -16614,7 +18305,7 @@
     },
     "Block6": {
       "x86InstructionCount": 409,
-      "ExpectedInstructionCount": 2204,
+      "ExpectedInstructionCount": 2284,
       "x86Insts": [
         "mov eax,dword [ebp + 0x10]",
         "fld dword [eax + 0x30]",
@@ -17162,6 +18853,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-48]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -17298,6 +18994,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-44]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -17434,6 +19135,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-40]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -17570,6 +19276,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-36]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -17706,6 +19417,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-32]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -17842,6 +19558,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-28]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -17978,6 +19699,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-24]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -18114,6 +19840,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-20]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -18250,6 +19981,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-16]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -18386,6 +20122,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-12]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -19183,6 +20924,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #24]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -19192,6 +20938,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -19201,6 +20952,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -19209,6 +20965,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -19217,6 +20978,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -19225,6 +20991,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "str w6, [x8]",
         "mov w20, #0x462",
@@ -19235,7 +21006,7 @@
     },
     "Block7": {
       "x86InstructionCount": 418,
-      "ExpectedInstructionCount": 2211,
+      "ExpectedInstructionCount": 2291,
       "x86Insts": [
         "push ebp",
         "mov ebp,esp",
@@ -19660,7 +21431,7 @@
         "str w9, [x8, #-4]!",
         "mov x9, x8",
         "str w6, [x8, #-4]!",
-        "subs w26, w8, #0x84 (132)",
+        "sub w26, w8, #0x84 (132)",
         "mov x27, x8",
         "mov x8, x26",
         "ldr w6, [x9, #8]",
@@ -19799,6 +21570,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-48]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -19935,6 +21711,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-44]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -20071,6 +21852,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-40]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #48]",
@@ -20207,6 +21993,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-36]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -20343,6 +22134,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-32]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -20479,6 +22275,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-28]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -20615,6 +22416,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-24]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #32]",
@@ -20751,6 +22557,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-20]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -20887,6 +22698,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-16]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -21023,6 +22839,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-12]",
         "ldr w4, [x9, #16]",
         "ldr s2, [x4, #16]",
@@ -21820,6 +23641,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d8, x20",
+        "fcsel d2, d8, d2, vs",
         "str s2, [x8, #24]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -21829,6 +23655,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #20]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -21838,6 +23669,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #16]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -21846,6 +23682,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #12]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -21854,6 +23695,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v7.16b",
@@ -21862,6 +23708,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x8, #4]",
         "str w6, [x8]",
         "mov w20, #0x46f",
@@ -21872,7 +23723,7 @@
     },
     "Block8": {
       "x86InstructionCount": 231,
-      "ExpectedInstructionCount": 1963,
+      "ExpectedInstructionCount": 2168,
       "x86Insts": [
         "fadd dword [esp + 0x40]",
         "lea edx,[ecx + ecx*0x2]",
@@ -22239,6 +24090,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x13, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d5, x13",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #44]",
         "ldr s4, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -22287,6 +24143,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x13, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d5, x13",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #40]",
         "add w13, w4, w10, lsl #2",
         "ldur s4, [x13, #-8]",
@@ -22381,6 +24242,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #20]",
         "add w15, w4, w10, lsl #2",
         "ldur s6, [x15, #-4]",
@@ -22415,6 +24281,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w5, lsl #2",
         "ldur s6, [x15, #-8]",
@@ -22478,6 +24349,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldur s7, [x15, #-8]",
@@ -22512,6 +24388,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldur s7, [x15, #-4]",
@@ -22546,6 +24427,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #24]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -22563,6 +24449,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -22588,6 +24479,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "stur s7, [x15, #-4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -22606,6 +24502,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x15, #-8]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -22631,6 +24532,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -22712,6 +24618,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x15, #-8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -22745,6 +24656,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -22842,6 +24758,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x15, #-8]",
         "ldr s6, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -22891,6 +24812,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "add w15, w4, w7, lsl #2",
         "ldr s4, [x15]",
@@ -22979,6 +24905,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #20]",
         "add w15, w4, w10, lsl #2",
         "ldr s6, [x15, #4]",
@@ -23013,6 +24944,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w11, lsl #2",
         "ldr s6, [x15]",
@@ -23073,6 +25009,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15]",
@@ -23107,6 +25048,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #4]",
@@ -23141,6 +25087,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #24]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -23158,6 +25109,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -23183,6 +25139,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -23201,6 +25162,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x15]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -23226,6 +25192,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -23307,6 +25278,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x15]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -23340,6 +25316,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -23423,6 +25404,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -23449,6 +25435,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "add w15, w4, w7, lsl #2",
         "ldr s4, [x15, #8]",
@@ -23537,6 +25528,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #20]",
         "add w15, w4, w10, lsl #2",
         "ldr s6, [x15, #12]",
@@ -23571,6 +25567,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w11, lsl #2",
         "ldr s6, [x15, #8]",
@@ -23631,6 +25632,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #8]",
@@ -23665,6 +25671,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #12]",
@@ -23699,6 +25710,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #24]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -23716,6 +25732,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #8]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -23741,6 +25762,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #12]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -23759,6 +25785,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x15, #8]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -23784,6 +25815,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #12]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -23865,6 +25901,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x16, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d9, x16",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x15, #8]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -23901,6 +25942,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x16, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d3, x16",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x15, #12]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -24000,6 +26046,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #8]",
         "ldr s4, [x8, #40]",
         "str x30, [sp, #-16]!",
@@ -24049,6 +26100,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x16, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d9, x16",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x15, #12]",
         "ldp w11, w10, [x8], #8",
         "ldp w9, w6, [x8], #8",
@@ -24074,7 +26130,7 @@
     },
     "Block9": {
       "x86InstructionCount": 222,
-      "ExpectedInstructionCount": 1957,
+      "ExpectedInstructionCount": 2162,
       "x86Insts": [
         "fadd dword [esp + 0x40]",
         "lea edx,[ecx + ecx*0x2]",
@@ -24432,6 +26488,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x13, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d5, x13",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #48]",
         "ldr s4, [x8, #60]",
         "str x30, [sp, #-16]!",
@@ -24480,6 +26541,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x13, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d5, x13",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x8, #44]",
         "add w13, w4, w10, lsl #2",
         "ldur s4, [x13, #-8]",
@@ -24572,6 +26638,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #24]",
         "add w15, w4, w7, lsl #2",
         "ldur s6, [x15, #-4]",
@@ -24606,6 +26677,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w11, lsl #2",
         "ldur s6, [x15, #-8]",
@@ -24669,6 +26745,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldur s7, [x15, #-8]",
@@ -24703,6 +26784,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldur s7, [x15, #-4]",
@@ -24737,6 +26823,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -24754,6 +26845,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -24779,6 +26875,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "stur s7, [x15, #-4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -24797,6 +26898,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "stur s4, [x15, #-8]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -24822,6 +26928,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -24903,6 +27014,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x15, #-8]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v2.16b",
@@ -24936,6 +27052,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -25033,6 +27154,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "stur s6, [x15, #-8]",
         "ldr s6, [x8, #48]",
         "str x30, [sp, #-16]!",
@@ -25082,6 +27208,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "stur s4, [x15, #-4]",
         "add w15, w4, w7, lsl #2",
         "ldr s4, [x15]",
@@ -25168,6 +27299,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #24]",
         "add w15, w4, w7, lsl #2",
         "ldr s6, [x15, #4]",
@@ -25202,6 +27338,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w5, lsl #2",
         "ldr s6, [x15]",
@@ -25262,6 +27403,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15]",
@@ -25296,6 +27442,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #4]",
@@ -25330,6 +27481,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -25347,6 +27503,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -25372,6 +27533,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #4]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -25390,6 +27556,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x15]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -25415,6 +27586,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -25496,6 +27672,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x16, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d7, x16",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x15]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v5.16b",
@@ -25529,6 +27710,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "ldr s4, [x8, #20]",
         "str x30, [sp, #-16]!",
@@ -25612,6 +27798,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -25638,6 +27829,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #4]",
         "add w15, w4, w7, lsl #2",
         "ldr s4, [x15, #8]",
@@ -25724,6 +27920,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #24]",
         "add w15, w4, w7, lsl #2",
         "ldr s6, [x15, #12]",
@@ -25758,6 +27959,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s6, s0",
+        "mov x15, v6.d[0]",
+        "fcmp d6, d6",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d7, x15",
+        "fcsel d6, d7, d6, vs",
         "str s6, [x8, #28]",
         "add w15, w4, w11, lsl #2",
         "ldr s6, [x15, #8]",
@@ -25818,6 +28024,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #16]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #8]",
@@ -25852,6 +28063,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #32]",
         "add w15, w4, w5, lsl #2",
         "ldr s7, [x15, #12]",
@@ -25886,6 +28102,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x15, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x15, x15, #0x8000000000000",
+        "fmov d8, x15",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x8, #20]",
         "str x30, [sp, #-16]!",
         "mov v0.16b, v6.16b",
@@ -25903,6 +28124,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #8]",
         "ldr s7, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -25928,6 +28154,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s7, s0",
+        "mov x16, v7.d[0]",
+        "fcmp d7, d7",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d8, x16",
+        "fcsel d7, d8, d7, vs",
         "str s7, [x15, #12]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -25946,6 +28177,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d6, x16",
+        "fcsel d4, d6, d4, vs",
         "str s4, [x15, #8]",
         "ldr s4, [x8, #16]",
         "str x30, [sp, #-16]!",
@@ -25971,6 +28207,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #12]",
         "ldr s4, [x8, #24]",
         "str x30, [sp, #-16]!",
@@ -26052,6 +28293,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x16, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d9, x16",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x15, #8]",
         "strb wzr, [x28, #1017]",
         "str x30, [sp, #-16]!",
@@ -26088,6 +28334,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x16, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d3, x16",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x15, #12]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -26187,6 +28438,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s4, s0",
+        "mov x16, v4.d[0]",
+        "fcmp d4, d4",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d5, x16",
+        "fcsel d4, d5, d4, vs",
         "str s4, [x15, #8]",
         "ldr s4, [x8, #44]",
         "str x30, [sp, #-16]!",
@@ -26236,6 +28492,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s8, s0",
+        "mov x16, v8.d[0]",
+        "fcmp d8, d8",
+        "orr x16, x16, #0x8000000000000",
+        "fmov d9, x16",
+        "fcsel d8, d9, d8, vs",
         "str s8, [x15, #12]",
         "ldp w11, w10, [x8], #8",
         "ldp w9, w6, [x8], #8",
@@ -26261,7 +28522,7 @@
     },
     "Block10": {
       "x86InstructionCount": 420,
-      "ExpectedInstructionCount": 1954,
+      "ExpectedInstructionCount": 2174,
       "x86Insts": [
         "push ebp",
         "mov ebp,esp",
@@ -26723,6 +28984,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x7c (124)",
@@ -26759,6 +29025,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x78 (120)",
@@ -26797,6 +29068,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x7c (124)",
@@ -26835,6 +29111,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w5, w4, #0x38 (56)",
@@ -26879,6 +29160,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x74 (116)",
@@ -26915,6 +29201,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x70 (112)",
@@ -26953,6 +29244,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x74 (116)",
@@ -26991,6 +29287,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x30 (48)",
@@ -27061,6 +29362,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x34 (52)",
@@ -27129,6 +29435,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x68 (104)",
@@ -27165,6 +29476,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x6c (108)",
@@ -27201,6 +29517,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x68 (104)",
@@ -27239,6 +29560,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x6c (108)",
@@ -27277,6 +29603,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x28 (40)",
@@ -27329,6 +29660,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x2c (44)",
@@ -27379,6 +29715,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x60 (96)",
@@ -27415,6 +29756,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x64 (100)",
@@ -27451,6 +29797,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x60 (96)",
@@ -27489,6 +29840,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x64 (100)",
@@ -27527,6 +29883,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x20 (32)",
@@ -27595,6 +29956,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x24 (36)",
@@ -27661,6 +30027,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x58 (88)",
@@ -27697,6 +30068,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x1c (28)",
@@ -27733,6 +30109,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x58 (88)",
@@ -27771,6 +30152,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x5c (92)",
@@ -27809,6 +30195,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w5, w4, #0x18 (24)",
@@ -27853,6 +30244,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x14 (20)",
@@ -27889,6 +30285,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x50 (80)",
@@ -27927,6 +30328,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x54 (84)",
@@ -27965,6 +30371,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x10 (16)",
@@ -28031,6 +30442,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x13, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x13, x13, #0x8000000000000",
+        "fmov d3, x13",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x14 (20)",
@@ -28097,6 +30513,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x8 (8)",
@@ -28133,6 +30554,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0xc (12)",
@@ -28169,6 +30595,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x48 (72)",
@@ -28207,6 +30638,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x4c (76)",
@@ -28245,6 +30681,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x8 (8)",
@@ -28295,6 +30736,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x12, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x12, x12, #0x8000000000000",
+        "fmov d3, x12",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0xc (12)",
@@ -28345,6 +30791,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "ldr s2, [x4]",
@@ -28380,6 +30831,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-8]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x4 (4)",
@@ -28416,6 +30872,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "stur s2, [x9, #-4]",
         "ldr w4, [x9, #8]",
         "add w5, w4, #0x40 (64)",
@@ -28453,6 +30914,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x5]",
         "ldr w4, [x9, #8]",
         "add w4, w4, #0x44 (68)",
@@ -28491,6 +30957,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x23, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x23, x23, #0x8000000000000",
+        "fmov d3, x23",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldur s2, [x9, #-4]",
         "str x30, [sp, #-16]!",
@@ -28556,9 +31027,14 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x22, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x22, x22, #0x8000000000000",
+        "fmov d3, x22",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
-        "adds w26, w4, #0x4 (4)",
+        "add w26, w4, #0x4 (4)",
         "mov x27, x4",
         "mov x4, x26",
         "ldur s2, [x9, #-4]",
@@ -28624,6 +31100,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "str w4, [x8]",
diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json
index 2684d4bff..c895f1ac6 100644
--- a/unittests/InstructionCountCI/FlagM/x87.json
+++ b/unittests/InstructionCountCI/FlagM/x87.json
@@ -2001,7 +2001,7 @@
       ]
     },
     "fst dword [rax]": {
-      "ExpectedInstructionCount": 11,
+      "ExpectedInstructionCount": 16,
       "Comment": [
         "0xd9 !11b /2"
       ],
@@ -2016,11 +2016,16 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]"
       ]
     },
     "fstp dword [rax]": {
-      "ExpectedInstructionCount": 19,
+      "ExpectedInstructionCount": 24,
       "Comment": [
         "0xd9 !11b /3"
       ],
@@ -2035,6 +2040,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "add w21, w20, #0x1 (1)",
         "and w21, w21, #0x7",
@@ -6736,7 +6746,7 @@
       ]
     },
     "fst qword [rax]": {
-      "ExpectedInstructionCount": 11,
+      "ExpectedInstructionCount": 16,
       "Comment": [
         "0xdd !11b /2"
       ],
@@ -6751,11 +6761,16 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d2, d0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str d2, [x4]"
       ]
     },
     "fstp qword [rax]": {
-      "ExpectedInstructionCount": 19,
+      "ExpectedInstructionCount": 24,
       "Comment": [
         "0xdd !11b /3"
       ],
@@ -6770,6 +6785,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d2, d0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str d2, [x4]",
         "add w21, w20, #0x1 (1)",
         "and w21, w21, #0x7",
diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json
index 61f784f6d..e29d15a00 100644
--- a/unittests/InstructionCountCI/x87.json
+++ b/unittests/InstructionCountCI/x87.json
@@ -2000,7 +2000,7 @@
       ]
     },
     "fst dword [rax]": {
-      "ExpectedInstructionCount": 11,
+      "ExpectedInstructionCount": 16,
       "Comment": [
         "0xd9 !11b /2"
       ],
@@ -2015,11 +2015,16 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]"
       ]
     },
     "fstp dword [rax]": {
-      "ExpectedInstructionCount": 19,
+      "ExpectedInstructionCount": 24,
       "Comment": [
         "0xd9 !11b /3"
       ],
@@ -2034,6 +2039,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov s2, s0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str s2, [x4]",
         "add w21, w20, #0x1 (1)",
         "and w21, w21, #0x7",
@@ -6767,7 +6777,7 @@
       ]
     },
     "fst qword [rax]": {
-      "ExpectedInstructionCount": 11,
+      "ExpectedInstructionCount": 16,
       "Comment": [
         "0xdd !11b /2"
       ],
@@ -6782,11 +6792,16 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d2, d0",
+        "mov x20, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x20, x20, #0x8000000000000",
+        "fmov d3, x20",
+        "fcsel d2, d3, d2, vs",
         "str d2, [x4]"
       ]
     },
     "fstp qword [rax]": {
-      "ExpectedInstructionCount": 19,
+      "ExpectedInstructionCount": 24,
       "Comment": [
         "0xdd !11b /3"
       ],
@@ -6801,6 +6816,11 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "fmov d2, d0",
+        "mov x21, v2.d[0]",
+        "fcmp d2, d2",
+        "orr x21, x21, #0x8000000000000",
+        "fmov d3, x21",
+        "fcsel d2, d3, d2, vs",
         "str d2, [x4]",
         "add w21, w20, #0x1 (1)",
         "and w21, w21, #0x7",