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https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 17:00:19 +02:00
Revert "OpcodeDispatcher: Initial support for runtime long-mode switch"
This reverts commit 9e5d7aa5fe.
This commit is contained in:
Ryan Houdek committed
1 parent
c0ec4da849
commit
da0e1b515a
8 files changed
+125
-140
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@@ -310,7 +310,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op,
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uint8_t DestSize{};
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const bool HasWideningDisplacement = (FEXCore::X86Tables::DecodeFlags::GetOpAddr(DecodeInst->Flags, 0) & FEXCore::X86Tables::DecodeFlags::FLAG_WIDENING_SIZE_LAST) != 0 ||
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(Options.w && BlockInfo.Is64BitMode);
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(Options.w && CTX->Config.Is64BitMode);
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const bool HasNarrowingDisplacement = (FEXCore::X86Tables::DecodeFlags::GetOpAddr(DecodeInst->Flags, 0) & FEXCore::X86Tables::DecodeFlags::FLAG_OPERAND_SIZE_LAST) != 0;
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const bool HasXMMFlags = (Info->Flags & InstFlags::FLAGS_XMM_FLAGS) != 0;
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@@ -331,7 +331,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op,
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const bool HasMODRM = !!(Info->Flags & FEXCore::X86Tables::InstFlags::FLAGS_MODRM);
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const bool HasREX = !!(DecodeInst->Flags & DecodeFlags::FLAG_REX_PREFIX);
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const bool Has16BitAddressing = !BlockInfo.Is64BitMode &&
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const bool Has16BitAddressing = !CTX->Config.Is64BitMode &&
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DecodeInst->Flags & DecodeFlags::FLAG_ADDRESS_SIZE;
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// This is used for ModRM register modification
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@@ -386,7 +386,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op,
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DestSize = 2;
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}
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else if (
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(HasXMMDst || HasMMDst || BlockInfo.Is64BitMode) &&
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(HasXMMDst || HasMMDst || CTX->Config.Is64BitMode) &&
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(HasWideningDisplacement ||
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DstSizeFlag == FEXCore::X86Tables::InstFlags::SIZE_64BIT ||
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DstSizeFlag == FEXCore::X86Tables::InstFlags::SIZE_64BITDEF)) {
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@@ -424,7 +424,7 @@ bool Decoder::NormalOp(FEXCore::X86Tables::X86InstInfo const *Info, uint16_t Op,
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DecodeInst->Flags |= DecodeFlags::GenSizeSrcSize(DecodeFlags::SIZE_16BIT);
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}
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else if (
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(HasXMMSrc || HasMMSrc || BlockInfo.Is64BitMode) &&
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(HasXMMSrc || HasMMSrc || CTX->Config.Is64BitMode) &&
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(HasWideningDisplacement ||
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SrcSizeFlag == FEXCore::X86Tables::InstFlags::SIZE_64BIT ||
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SrcSizeFlag == FEXCore::X86Tables::InstFlags::SIZE_64BITDEF)) {
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@@ -692,7 +692,7 @@ bool Decoder::NormalOpHeader(FEXCore::X86Tables::X86InstInfo const *Info, uint16
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DecodedHeader options{};
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if ((Byte1 & 0b10000000) == 0) {
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LOGMAN_THROW_A_FMT(BlockInfo.Is64BitMode, "VEX.R shouldn't be 0 in 32-bit mode!");
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LOGMAN_THROW_A_FMT(CTX->Config.Is64BitMode, "VEX.R shouldn't be 0 in 32-bit mode!");
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DecodeInst->Flags |= DecodeFlags::FLAG_REX_XGPR_R;
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}
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@@ -709,10 +709,10 @@ bool Decoder::NormalOpHeader(FEXCore::X86Tables::X86InstInfo const *Info, uint16
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options.w = (Byte2 & 0b10000000) != 0;
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options.L = (Byte2 & 0b100) != 0;
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if ((Byte1 & 0b01000000) == 0) {
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LOGMAN_THROW_A_FMT(BlockInfo.Is64BitMode, "VEX.X shouldn't be 0 in 32-bit mode!");
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LOGMAN_THROW_A_FMT(CTX->Config.Is64BitMode, "VEX.X shouldn't be 0 in 32-bit mode!");
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DecodeInst->Flags |= DecodeFlags::FLAG_REX_XGPR_X;
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}
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if (BlockInfo.Is64BitMode && (Byte1 & 0b00100000) == 0) {
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if (CTX->Config.Is64BitMode && (Byte1 & 0b00100000) == 0) {
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DecodeInst->Flags |= DecodeFlags::FLAG_REX_XGPR_B;
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}
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if (!(map_select >= 1 && map_select <= 3)) {
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@@ -787,7 +787,7 @@ bool Decoder::DecodeInstruction(uint64_t PC) {
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FEXCore::X86Tables::ModRMDecoded ModRM;
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ModRM.Hex = DecodeInst->ModRM;
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const bool Has16BitAddressing = !BlockInfo.Is64BitMode &&
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const bool Has16BitAddressing = !CTX->Config.Is64BitMode &&
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DecodeInst->Flags & DecodeFlags::FLAG_ADDRESS_SIZE;
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// All 3DNow! instructions have the second argument as the rm handler
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@@ -898,17 +898,17 @@ bool Decoder::DecodeInstruction(uint64_t PC) {
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DecodeInst->Flags |= DecodeFlags::FLAG_ADDRESS_SIZE;
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break;
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case 0x26: // ES legacy prefix
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if (!BlockInfo.Is64BitMode) {
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if (!CTX->Config.Is64BitMode) {
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DecodeInst->Flags |= DecodeFlags::FLAG_ES_PREFIX;
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}
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break;
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case 0x2E: // CS legacy prefix
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if (!BlockInfo.Is64BitMode) {
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if (!CTX->Config.Is64BitMode) {
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DecodeInst->Flags |= DecodeFlags::FLAG_CS_PREFIX;
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}
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break;
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case 0x36: // SS legacy prefix
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if (!BlockInfo.Is64BitMode) {
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if (!CTX->Config.Is64BitMode) {
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DecodeInst->Flags |= DecodeFlags::FLAG_SS_PREFIX;
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}
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break;
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@@ -916,7 +916,7 @@ bool Decoder::DecodeInstruction(uint64_t PC) {
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// Annoyingly GCC generates NOP ops with these prefixes
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// Just ignore them for now
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// eg. 66 2e 0f 1f 84 00 00 00 00 00 nop WORD PTR cs:[rax+rax*1+0x0]
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if (!BlockInfo.Is64BitMode) {
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if (!CTX->Config.Is64BitMode) {
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DecodeInst->Flags |= DecodeFlags::FLAG_DS_PREFIX;
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}
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break;
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@@ -942,7 +942,7 @@ bool Decoder::DecodeInstruction(uint64_t PC) {
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auto Info = &FEXCore::X86Tables::BaseOps[Op];
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if (Info->Type == FEXCore::X86Tables::TYPE_REX_PREFIX) {
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LOGMAN_THROW_A_FMT(BlockInfo.Is64BitMode, "Got REX prefix in 32bit mode");
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LOGMAN_THROW_A_FMT(CTX->Config.Is64BitMode, "Got REX prefix in 32bit mode");
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DecodeInst->Flags |= DecodeFlags::FLAG_REX_PREFIX;
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// Widening displacement
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@@ -985,7 +985,7 @@ void Decoder::BranchTargetInMultiblockRange() {
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// If the RIP setting is conditional AND within our symbol range then it can be considered for multiblock
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uint64_t TargetRIP = 0;
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const uint8_t GPRSize = GetGPRSize();
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const uint8_t GPRSize = CTX->GetGPRSize();
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bool Conditional = true;
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switch (DecodeInst->OP) {
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@@ -1052,7 +1052,7 @@ bool Decoder::BranchTargetCanContinue(bool FinalInstruction) const {
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}
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uint64_t TargetRIP = 0;
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const uint8_t GPRSize = GetGPRSize();
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const uint8_t GPRSize = CTX->GetGPRSize();
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if (DecodeInst->OP == 0xE8) { // Call - immediate target
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const uint64_t NextRIP = DecodeInst->PC + DecodeInst->InstSize;
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@@ -1094,7 +1094,7 @@ const uint8_t *Decoder::AdjustAddrForSpecialRegion(uint8_t const* _InstStream, u
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return _InstStream - EntryPoint + RIP;
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}
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void Decoder::DecodeInstructionsAtEntry(FEXCore::Core::InternalThreadState *Thread, uint8_t const* _InstStream, uint64_t PC, uint64_t MaxInst, std::function<void(uint64_t BlockEntry, uint64_t Start, uint64_t Length)> AddContainedCodePage) {
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void Decoder::DecodeInstructionsAtEntry(uint8_t const* _InstStream, uint64_t PC, uint64_t MaxInst, std::function<void(uint64_t BlockEntry, uint64_t Start, uint64_t Length)> AddContainedCodePage) {
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FEXCORE_PROFILE_SCOPED("DecodeInstructions");
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BlockInfo.TotalInstructionCount = 0;
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BlockInfo.Blocks.clear();
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@@ -1106,11 +1106,6 @@ void Decoder::DecodeInstructionsAtEntry(FEXCore::Core::InternalThreadState *Thre
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MaxCondBranchBackwards = ~0ULL;
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DecodedBuffer = PoolObject.ReownOrClaimBuffer();
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// Decode operating mode from thread's CS segment.
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const auto CSSegment = Thread->CurrentFrame->State.gdt[Thread->CurrentFrame->State.cs_idx >> 3];
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BlockInfo.Is64BitMode = CSSegment.L == 1;
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LOGMAN_THROW_A_FMT(BlockInfo.Is64BitMode == CTX->Config.Is64BitMode, "Expected operating mode to not change at runtime!");
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// XXX: Load symbol data
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SymbolAvailable = false;
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EntryPoint = PC;
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