From d979b3a1da408e9d2dfbd354fd04db8e2cfd86bf Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Mon, 22 Jan 2024 14:39:51 -0400 Subject: [PATCH] OpcodeDispatcher: note idea to further optimize rcl Signed-off-by: Alyssa Rosenzweig --- FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 367936a5e..fc3e3fc25 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -2618,6 +2618,7 @@ void OpDispatchBuilder::RCLOp1Bit(OpcodeArgs) { auto CF = GetRFLAG(FEXCore::X86State::RFLAG_CF_RAW_LOC); // Rotate left and insert CF in to lowest bit + // TODO: Use `adc Res, xzr, Dest, lsl 1` to save an instruction OrderedNode *Res = _Orlshl(OpSize, CF, Dest, 1); StoreResult(GPRClass, Op, Res, -1);