From 5e0952159dc0f6b80cfe41433b4f9cdb412a71bf Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 10 Jul 2024 11:34:01 -0400 Subject: [PATCH 01/12] unittests: add test for a MMX register cache bug this failed on an earlier version of the register cache. Signed-off-by: Alyssa Rosenzweig --- unittests/ASM/FEX_bugs/RegCacheMMX.asm | 47 ++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) create mode 100644 unittests/ASM/FEX_bugs/RegCacheMMX.asm diff --git a/unittests/ASM/FEX_bugs/RegCacheMMX.asm b/unittests/ASM/FEX_bugs/RegCacheMMX.asm new file mode 100644 index 000000000..123558ac2 --- /dev/null +++ b/unittests/ASM/FEX_bugs/RegCacheMMX.asm @@ -0,0 +1,47 @@ +%ifdef CONFIG +{ + "RegData": { + "XMM0": ["0x5152535455565758", "0"] + } +} +%endif + +fninit +; Load all test values +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] +fld tword [rel .test_value] + +; Setup for MMX usage +emms + +; Load XMM value +movups xmm0, [rel .test_xmm_value] + +; Load MMX value +movq mm0, [rel .test_mmx_value] + +jmp .test +.test: +; Move MMX register in to XMM +; Should set the upper 64-bits of xmm0 to zero +movq2dq xmm0, mm0 + +hlt +align 32 + +.test_value: +dq 0x4142434445464748 +dw 0x7fff + +.test_mmx_value: +dq 0x5152535455565758 + +.test_xmm_value: +dq 0x6162636465666768 +dq 0x7172737475767778 From 2949bc211d8e7c84d4127675934dab7a9e9d65e6 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:42:37 -0400 Subject: [PATCH 02/12] OpcodeDispatcher: thunk through FlushRegisterCache Signed-off-by: Alyssa Rosenzweig --- .../Interface/Core/OpcodeDispatcher.cpp | 14 +++++------ .../Source/Interface/Core/OpcodeDispatcher.h | 24 +++++++++++-------- 2 files changed, 21 insertions(+), 17 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 807dee63a..6f8ebb363 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -113,7 +113,7 @@ void OpDispatchBuilder::SyscallOp(OpcodeArgs) { StoreGPRRegister(X86State::REG_RCX, RIPAfterInst, 8); } - CalculateDeferredFlags(); + FlushRegisterCache(); auto SyscallOp = _Syscall(Arguments[0], Arguments[1], Arguments[2], Arguments[3], Arguments[4], Arguments[5], Arguments[6], DefaultSyscallFlags); if (OSABI != FEXCore::HLE::SyscallOSABI::OS_HANGOVER && @@ -395,7 +395,7 @@ void OpDispatchBuilder::PUSHOp(OpcodeArgs) { // Store the new stack pointer StoreGPRRegister(X86State::REG_RSP, NewSP); - CalculateDeferredFlags(); + FlushRegisterCache(); } void OpDispatchBuilder::PUSHREGOp(OpcodeArgs) { @@ -408,7 +408,7 @@ void OpDispatchBuilder::PUSHREGOp(OpcodeArgs) { auto NewSP = _Push(GPRSize, Size, Src, OldSP); // Store the new stack pointer StoreGPRRegister(X86State::REG_RSP, NewSP); - CalculateDeferredFlags(); + FlushRegisterCache(); } void OpDispatchBuilder::PUSHAOp(OpcodeArgs) { @@ -458,7 +458,7 @@ void OpDispatchBuilder::PUSHAOp(OpcodeArgs) { // Store the new stack pointer StoreGPRRegister(X86State::REG_RSP, NewSP, 4); - CalculateDeferredFlags(); + FlushRegisterCache(); } template @@ -843,7 +843,7 @@ void OpDispatchBuilder::CondJUMPOp(OpcodeArgs) { Target &= 0xFFFFFFFFU; } - CalculateDeferredFlags(); + FlushRegisterCache(); auto TrueBlock = JumpTargets.find(Target); auto FalseBlock = JumpTargets.find(Op->PC + Op->InstSize); @@ -4007,7 +4007,7 @@ void OpDispatchBuilder::BeginFunction(uint64_t RIP, const fextl::vectorGetGPRSize(); // Node 0 is invalid node @@ -4716,7 +4716,7 @@ void OpDispatchBuilder::INTOp(OpcodeArgs) { } // Calculate flags early. - CalculateDeferredFlags(); + FlushRegisterCache(); const uint8_t GPRSize = CTX->GetGPRSize(); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index c01213911..01d5bfc19 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -115,7 +115,7 @@ public: // Changes get stored out by CalculateDeferredFlags. CachedNZCV = nullptr; PossiblySetNZCVBits = ~0U; - CalculateDeferredFlags(); + FlushRegisterCache(); // New block needs to reset segment telemetry. SegmentsNeedReadCheck = ~0U; @@ -125,28 +125,28 @@ public: } IRPair Jump() { - CalculateDeferredFlags(); + FlushRegisterCache(); return _Jump(); } IRPair Jump(Ref _TargetBlock) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _Jump(_TargetBlock); } IRPair CondJump(Ref _Cmp1, Ref _Cmp2, Ref _TrueBlock, Ref _FalseBlock, CondClassType _Cond = {COND_NEQ}, uint8_t _CompareSize = 0) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _CondJump(_Cmp1, _Cmp2, _TrueBlock, _FalseBlock, _Cond, _CompareSize); } IRPair CondJump(Ref ssa0, CondClassType cond = {COND_NEQ}) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _CondJump(ssa0, cond); } IRPair CondJump(Ref ssa0, Ref ssa1, Ref ssa2, CondClassType cond = {COND_NEQ}) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _CondJump(ssa0, ssa1, ssa2, cond); } IRPair CondJumpNZCV(CondClassType Cond) { - CalculateDeferredFlags(); + FlushRegisterCache(); // The jump will ignore the sources, so it doesn't matter what we put here. // Put an inline constant so RA+codegen will ignore altogether. @@ -154,15 +154,15 @@ public: return _CondJump(Placeholder, Placeholder, InvalidNode, InvalidNode, Cond, 0, true); } IRPair ExitFunction(Ref NewRIP) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _ExitFunction(NewRIP); } IRPair Break(BreakDefinition Reason) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _Break(Reason); } IRPair Thunk(Ref ArgPtr, SHA256Sum ThunkNameHash) { - CalculateDeferredFlags(); + FlushRegisterCache(); return _Thunk(ArgPtr, ThunkNameHash); } @@ -1267,6 +1267,10 @@ public: } } + void FlushRegisterCache(bool SRAOnly = false) { + CalculateDeferredFlags(); + } + protected: void SaveNZCV(IROps Op = OP_DUMMY) override { /* Some opcodes are conservatively marked as clobbering flags, but in fact From 42b5b1f64c61c325eb4d71b507bfe420126e51fc Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:43:03 -0400 Subject: [PATCH 03/12] Core: partially flush register cache per instruction This will mitigate problems later. Signed-off-by: Alyssa Rosenzweig --- FEXCore/Source/Interface/Core/Core.cpp | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/FEXCore/Source/Interface/Core/Core.cpp b/FEXCore/Source/Interface/Core/Core.cpp index 56c8b900b..a4e52061f 100644 --- a/FEXCore/Source/Interface/Core/Core.cpp +++ b/FEXCore/Source/Interface/Core/Core.cpp @@ -614,6 +614,20 @@ ContextImpl::GenerateIR(FEXCore::Core::InternalThreadState* Thread, uint64_t Gue DecodedInfo = &Block.DecodedInstructions[i]; bool IsLocked = DecodedInfo->Flags & FEXCore::X86Tables::DecodeFlags::FLAG_LOCK; + // Do a partial register cache flush before every instruction. This + // prevents cross-instruction static register caching, while allowing + // context load/stores to be optimized within a block. Theoretically, + // this flush is not required for correctness, all mandatory flushes are + // included in instruction-specific handlers. Instead, this is a blunt + // heuristic to make the register cache less aggressive, as the current + // RA generates bad code in common cases with tied registers otherwise. + // + // However, it makes our exception handling behaviour more predictable. + // It is potentially correctness bearing in that sense, but that is a + // side effect here and (if that behaviour is required) we should handle + // that more explicitly later. + Thread->OpDispatcher->FlushRegisterCache(true); + if (ExtendedDebugInfo || Thread->OpDispatcher->CanHaveSideEffects(TableInfo, DecodedInfo)) { Thread->OpDispatcher->_GuestOpcode(Block.Entry + BlockInstructionsLength - GuestRIP); } From 72d41d70b62e5e333e36c4e229fd4c83e0981ae1 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:45:13 -0400 Subject: [PATCH 04/12] OpcodeDispatcher: introduce GPR-only reg cache Signed-off-by: Alyssa Rosenzweig --- .../Interface/Core/OpcodeDispatcher.cpp | 17 ++-- .../Source/Interface/Core/OpcodeDispatcher.h | 93 ++++++++++++++++++- 2 files changed, 98 insertions(+), 12 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 6f8ebb363..7e4fd45bc 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -3379,8 +3379,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) { auto Src2 = _LoadMem(GPRClass, Size, Dest_RSI, Size); // We'll calculate PF/AF after the loop, so use them as temporaries here. - _StoreRegister(Src1, Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize()); - _StoreRegister(Src2, Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize()); + StoreRegister(Core::CPUState::PF_AS_GREG, false, Src1); + StoreRegister(Core::CPUState::AF_AS_GREG, false, Src2); Ref TailCounter = LoadGPRRegister(X86State::REG_RCX); @@ -3419,8 +3419,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) { // Make sure to start a new block after ending this one { // Grab the sources from the last iteration so we can set flags. - auto Src1 = _LoadRegister(Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize()); - auto Src2 = _LoadRegister(Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize()); + auto Src1 = LoadGPR(Core::CPUState::PF_AS_GREG); + auto Src2 = LoadGPR(Core::CPUState::AF_AS_GREG); CalculateFlags_SUB(GetSrcSize(Op), Src2, Src1); } auto Jump_ = Jump(); @@ -4411,7 +4411,7 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset if (Size == -1) { Size = GPRSize; } - Ref Reg = _LoadRegister(GPR, GPRClass, GPRSize); + Ref Reg = LoadGPR(GPR); if ((!AllowUpperGarbage && (Size != GPRSize)) || Offset != 0) { // Extract the subregister if requested. @@ -4438,11 +4438,10 @@ void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Siz Ref Reg = Src; if (Size != GPRSize || Offset != 0) { // Need to do an insert if not automatic size or zero offset. - Reg = LoadGPRRegister(GPR); - Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, Reg, Src); + Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, LoadGPRRegister(GPR), Src); } - _StoreRegister(Reg, GPR, GPRClass, GPRSize); + StoreRegister(GPR, false, Reg); } void OpDispatchBuilder::StoreXMMRegister(uint32_t XMM, const Ref Src) { @@ -4563,6 +4562,8 @@ void OpDispatchBuilder::ResetWorkingList() { DecodeFailure = false; ShouldDump = false; CurrentCodeBlock = nullptr; + RegCache.Written = 0; + RegCache.Cached = 0; } void OpDispatchBuilder::UnhandledOp(OpcodeArgs) { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 01d5bfc19..301944beb 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -16,6 +16,7 @@ #include #include +#include #include #include #include @@ -1269,6 +1270,38 @@ public: void FlushRegisterCache(bool SRAOnly = false) { CalculateDeferredFlags(); + + const uint8_t GPRSize = CTX->GetGPRSize(); + + // Write backwards. This is a heuristic to improve coalescing, since we + // often copy from (low) fixed GPRs to (high) PF/AF for celebrity + // instructions like "add rax, 1". This hack will go away with clauses. + uint64_t Bits = RegCache.Written; + + // We have an SRA only mode that exists as a hack to make register caching + // less aggressive. We should get rid of this once RA can take it. + uint64_t Mask = ~0ULL; + + if (SRAOnly) { + const uint64_t GPRMask = ((1ull << (AFIndex - GPR0Index + 1)) - 1) << GPR0Index; + + Mask &= (GPRMask); + Bits &= Mask; + } + + while (Bits != 0) { + uint32_t Index = 63 - std::countl_zero(Bits); + Ref Value = RegCache.Value[Index]; + + if (Index >= GPR0Index && Index <= AFIndex) { + _StoreRegister(Value, Index - GPR0Index, GPRClass, GPRSize); + } + + Bits &= ~(1ull << Index); + } + + RegCache.Written &= ~Mask; + RegCache.Cached &= ~Mask; } protected: @@ -1717,9 +1750,9 @@ private: if (IsNZCV(BitOffset)) { InsertNZCV(BitOffset, Value, ValueOffset, MustMask); } else if (BitOffset == FEXCore::X86State::RFLAG_PF_RAW_LOC) { - _StoreRegister(Value, Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize()); + StoreRegister(Core::CPUState::PF_AS_GREG, false, Value); } else if (BitOffset == FEXCore::X86State::RFLAG_AF_RAW_LOC) { - _StoreRegister(Value, Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize()); + StoreRegister(Core::CPUState::AF_AS_GREG, false, Value); } else { if (ValueOffset || MustMask) { Value = _Bfe(OpSize::i32Bit, 1, ValueOffset, Value); @@ -1746,10 +1779,13 @@ private: void InvalidateAF() { _InvalidateFlags((1u << X86State::RFLAG_AF_RAW_LOC)); + InvalidateReg(Core::CPUState::AF_AS_GREG); } void InvalidatePF_AF() { _InvalidateFlags((1u << X86State::RFLAG_PF_RAW_LOC) | (1u << X86State::RFLAG_AF_RAW_LOC)); + InvalidateReg(Core::CPUState::PF_AS_GREG); + InvalidateReg(Core::CPUState::AF_AS_GREG); } CondClassType CondForNZCVBit(unsigned BitOffset, bool Invert) { @@ -1766,6 +1802,55 @@ private: } } + /* Layout of cache indices. We use a single 64-bit bitmask for the cache */ + static const int GPR0Index = 0; + static const int GPR15Index = 15; + static const int PFIndex = 16; + static const int AFIndex = 17; + + struct { + uint64_t Cached; + uint64_t Written; + Ref Value[64]; + } RegCache {}; + + void InvalidateReg(uint8_t Index) { + uint64_t Bit = (1ull << (uint64_t)Index); + RegCache.Cached &= ~Bit; + RegCache.Written &= ~Bit; + } + + Ref LoadRegCache(uint64_t Offset, uint8_t Index, RegisterClassType RegClass, uint8_t Size) { + LOGMAN_THROW_AA_FMT(Index < 64, "valid index"); + uint64_t Bit = (1ull << (uint64_t)Index); + + if (!(RegCache.Cached & Bit)) { + RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); + RegCache.Cached |= Bit; + } + + return RegCache.Value[Index]; + } + + Ref LoadGPR(uint8_t Reg) { + return LoadRegCache(Reg, GPR0Index + Reg, GPRClass, CTX->GetGPRSize()); + } + + void StoreContext(uint8_t Index, Ref Value) { + LOGMAN_THROW_AA_FMT(Index < 64, "valid index"); + LOGMAN_THROW_AA_FMT(Value != InvalidNode, "storing valid"); + + uint64_t Bit = (1ull << (uint64_t)Index); + + RegCache.Value[Index] = Value; + RegCache.Cached |= Bit; + RegCache.Written |= Bit; + } + + void StoreRegister(uint8_t Reg, bool FPR, Ref Value) { + StoreContext(Reg + GPR0Index, Value); + } + Ref GetRFLAG(unsigned BitOffset, bool Invert = false) { if (IsNZCV(BitOffset)) { if (!(PossiblySetNZCVBits & (1u << IndexNZCV(BitOffset)))) { @@ -1782,9 +1867,9 @@ private: return _NZCVSelect(OpSize::i32Bit, CondForNZCVBit(BitOffset, Invert), _Constant(1), _Constant(0)); } } else if (BitOffset == FEXCore::X86State::RFLAG_PF_RAW_LOC) { - return _LoadRegister(Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize()); + return LoadGPR(Core::CPUState::PF_AS_GREG); } else if (BitOffset == FEXCore::X86State::RFLAG_AF_RAW_LOC) { - return _LoadRegister(Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize()); + return LoadGPR(Core::CPUState::AF_AS_GREG); } else if (BitOffset == FEXCore::X86State::RFLAG_DF_RAW_LOC) { // Recover the sign bit, it is the logical DF value return _Lshr(OpSize::i64Bit, _LoadDF(), _Constant(63)); From 1f01dd53f7192d29b4c58238f3e8e18efbff888d Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:47:17 -0400 Subject: [PATCH 05/12] OpcodeDispatcher: reg cache fprs Signed-off-by: Alyssa Rosenzweig --- .../Interface/Core/OpcodeDispatcher.cpp | 6 +---- .../Source/Interface/Core/OpcodeDispatcher.h | 23 ++++++++++++++++--- .../Core/OpcodeDispatcher/AVX_128.cpp | 4 ++-- 3 files changed, 23 insertions(+), 10 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 7e4fd45bc..c84cbc870 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -4425,10 +4425,6 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset return Reg; } -Ref OpDispatchBuilder::LoadXMMRegister(uint32_t XMM) { - return _LoadRegister(XMM, FPRClass, GetGuestVectorLength()); -} - void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Size, uint8_t Offset) { const uint8_t GPRSize = CTX->GetGPRSize(); if (Size == -1) { @@ -4445,7 +4441,7 @@ void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Siz } void OpDispatchBuilder::StoreXMMRegister(uint32_t XMM, const Ref Src) { - _StoreRegister(Src, XMM, FPRClass, GetGuestVectorLength()); + StoreRegister(XMM, true, Src); } Ref OpDispatchBuilder::LoadSource(RegisterClassType Class, const X86Tables::DecodedOp& Op, const X86Tables::DecodedOperand& Operand, diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 301944beb..fba9b21f5 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -1272,6 +1272,7 @@ public: CalculateDeferredFlags(); const uint8_t GPRSize = CTX->GetGPRSize(); + const auto VectorSize = GetGuestVectorLength(); // Write backwards. This is a heuristic to improve coalescing, since we // often copy from (low) fixed GPRs to (high) PF/AF for celebrity @@ -1284,8 +1285,9 @@ public: if (SRAOnly) { const uint64_t GPRMask = ((1ull << (AFIndex - GPR0Index + 1)) - 1) << GPR0Index; + const uint64_t FPRMask = ((1ull << (FPR15Index - FPR0Index + 1)) - 1) << FPR0Index; - Mask &= (GPRMask); + Mask &= (GPRMask | FPRMask); Bits &= Mask; } @@ -1295,6 +1297,8 @@ public: if (Index >= GPR0Index && Index <= AFIndex) { _StoreRegister(Value, Index - GPR0Index, GPRClass, GPRSize); + } else if (Index >= FPR0Index && Index <= FPR15Index) { + _StoreRegister(Value, Index - FPR0Index, FPRClass, VectorSize); } Bits &= ~(1ull << Index); @@ -1534,7 +1538,6 @@ private: void UpdatePrefixFromSegment(Ref Segment, uint32_t SegmentReg); Ref LoadGPRRegister(uint32_t GPR, int8_t Size = -1, uint8_t Offset = 0, bool AllowUpperGarbage = false); - Ref LoadXMMRegister(uint32_t XMM); void StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Size = -1, uint8_t Offset = 0); void StoreXMMRegister(uint32_t XMM, const Ref Src); @@ -1807,6 +1810,16 @@ private: static const int GPR15Index = 15; static const int PFIndex = 16; static const int AFIndex = 17; + static const int FPR0Index = 32; + static const int FPR15Index = 47; + + RegisterClassType CacheIndexClass(int Index) { + if (Index >= FPR0Index) { + return FPRClass; + } else { + return GPRClass; + } + } struct { uint64_t Cached; @@ -1836,6 +1849,10 @@ private: return LoadRegCache(Reg, GPR0Index + Reg, GPRClass, CTX->GetGPRSize()); } + Ref LoadXMMRegister(uint8_t Reg) { + return LoadRegCache(Reg, FPR0Index + Reg, FPRClass, GetGuestVectorLength()); + } + void StoreContext(uint8_t Index, Ref Value) { LOGMAN_THROW_AA_FMT(Index < 64, "valid index"); LOGMAN_THROW_AA_FMT(Value != InvalidNode, "storing valid"); @@ -1848,7 +1865,7 @@ private: } void StoreRegister(uint8_t Reg, bool FPR, Ref Value) { - StoreContext(Reg + GPR0Index, Value); + StoreContext(Reg + (FPR ? FPR0Index : GPR0Index), Value); } Ref GetRFLAG(unsigned BitOffset, bool Invert = false) { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp index ab51522dd..95f0acc46 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp @@ -564,7 +564,7 @@ Ref OpDispatchBuilder::AVX128_LoadXMMRegister(uint32_t XMM, bool High) { if (High) { return _LoadContext(16, FPRClass, offsetof(FEXCore::Core::CPUState, avx_high[XMM][0])); } else { - return _LoadRegister(XMM, FPRClass, 16); + return LoadXMMRegister(XMM); } } @@ -572,7 +572,7 @@ void OpDispatchBuilder::AVX128_StoreXMMRegister(uint32_t XMM, const Ref Src, boo if (High) { _StoreContext(16, FPRClass, Src, offsetof(FEXCore::Core::CPUState, avx_high[XMM][0])); } else { - _StoreRegister(Src, XMM, FPRClass, 16); + StoreXMMRegister(XMM, Src); } } From 3a2ce240f93f90dcbd43531e303edbdbd2ca5b4f Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:48:35 -0400 Subject: [PATCH 06/12] OpcodeDispatcher: reg cache DF Signed-off-by: Alyssa Rosenzweig --- .../Source/Interface/Core/OpcodeDispatcher.h | 30 ++++++++++++++----- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index fba9b21f5..8ec0c7299 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -1299,6 +1299,8 @@ public: _StoreRegister(Value, Index - GPR0Index, GPRClass, GPRSize); } else if (Index >= FPR0Index && Index <= FPR15Index) { _StoreRegister(Value, Index - FPR0Index, FPRClass, VectorSize); + } else if (Index == DFIndex) { + _StoreFlag(Value, X86State::RFLAG_DF_RAW_LOC); } Bits &= ~(1ull << Index); @@ -1763,10 +1765,10 @@ private: // For DF, we need to transform 0/1 into 1/-1 if (BitOffset == FEXCore::X86State::RFLAG_DF_RAW_LOC) { - Value = _SubShift(OpSize::i64Bit, _Constant(1), Value, ShiftType::LSL, 1); + StoreDF(_SubShift(OpSize::i64Bit, _Constant(1), Value, ShiftType::LSL, 1)); + } else { + _StoreFlag(Value, BitOffset); } - - _StoreFlag(Value, BitOffset); } } @@ -1810,6 +1812,7 @@ private: static const int GPR15Index = 15; static const int PFIndex = 16; static const int AFIndex = 17; + static const int DFIndex = 31; static const int FPR0Index = 32; static const int FPR15Index = 47; @@ -1838,7 +1841,12 @@ private: uint64_t Bit = (1ull << (uint64_t)Index); if (!(RegCache.Cached & Bit)) { - RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); + if (Index == DFIndex) { + RegCache.Value[Index] = _LoadDF(); + } else { + RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); + } + RegCache.Cached |= Bit; } @@ -1853,6 +1861,10 @@ private: return LoadRegCache(Reg, FPR0Index + Reg, FPRClass, GetGuestVectorLength()); } + Ref LoadDF() { + return LoadGPR(DFIndex); + } + void StoreContext(uint8_t Index, Ref Value) { LOGMAN_THROW_AA_FMT(Index < 64, "valid index"); LOGMAN_THROW_AA_FMT(Value != InvalidNode, "storing valid"); @@ -1868,6 +1880,10 @@ private: StoreContext(Reg + (FPR ? FPR0Index : GPR0Index), Value); } + void StoreDF(Ref Value) { + StoreContext(DFIndex, Value); + } + Ref GetRFLAG(unsigned BitOffset, bool Invert = false) { if (IsNZCV(BitOffset)) { if (!(PossiblySetNZCVBits & (1u << IndexNZCV(BitOffset)))) { @@ -1889,7 +1905,7 @@ private: return LoadGPR(Core::CPUState::AF_AS_GREG); } else if (BitOffset == FEXCore::X86State::RFLAG_DF_RAW_LOC) { // Recover the sign bit, it is the logical DF value - return _Lshr(OpSize::i64Bit, _LoadDF(), _Constant(63)); + return _Lshr(OpSize::i64Bit, LoadDF(), _Constant(63)); } else { return _LoadFlag(BitOffset); } @@ -1897,7 +1913,7 @@ private: // Returns (DF ? -Size : Size) Ref LoadDir(const unsigned Size) { - auto Dir = _LoadDF(); + auto Dir = LoadDF(); auto Shift = FEXCore::ilog2(Size); if (Shift) { @@ -1911,7 +1927,7 @@ private: Ref OffsetByDir(Ref X, const unsigned Size) { auto Shift = FEXCore::ilog2(Size); - return _AddShift(OpSize::i64Bit, X, _LoadDF(), ShiftType::LSL, Shift); + return _AddShift(OpSize::i64Bit, X, LoadDF(), ShiftType::LSL, Shift); } // Compares two floats and sets flags for a COMISS instruction From cf5ab05b90ba0210b358f615ed93d2823daee33d Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:50:03 -0400 Subject: [PATCH 07/12] OpcodeDispatcher: reg cache AbridgedFTW Signed-off-by: Alyssa Rosenzweig --- .../Source/Interface/Core/OpcodeDispatcher.h | 21 +++++++++++++++++++ .../Core/OpcodeDispatcher/Vector.cpp | 6 ++---- .../Interface/Core/OpcodeDispatcher/X87.cpp | 17 +++++++-------- .../Core/OpcodeDispatcher/X87F64.cpp | 2 +- 4 files changed, 32 insertions(+), 14 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 8ec0c7299..4e6b04627 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -1301,6 +1301,8 @@ public: _StoreRegister(Value, Index - FPR0Index, FPRClass, VectorSize); } else if (Index == DFIndex) { _StoreFlag(Value, X86State::RFLAG_DF_RAW_LOC); + } else { + _StoreContext(CacheIndexToSize(Index), CacheIndexClass(Index), Value, CacheIndexToContextOffset(Index)); } Bits &= ~(1ull << Index); @@ -1812,10 +1814,19 @@ private: static const int GPR15Index = 15; static const int PFIndex = 16; static const int AFIndex = 17; + static const int AbridgedFTWIndex = 28; + /* Gap 29..30 */ static const int DFIndex = 31; static const int FPR0Index = 32; static const int FPR15Index = 47; + int CacheIndexToContextOffset(int Index) { + switch (Index) { + case AbridgedFTWIndex: return offsetof(FEXCore::Core::CPUState, AbridgedFTW); + default: return -1; + } + } + RegisterClassType CacheIndexClass(int Index) { if (Index >= FPR0Index) { return FPRClass; @@ -1824,6 +1835,10 @@ private: } } + unsigned CacheIndexToSize(int Index) { + return 1; + } + struct { uint64_t Cached; uint64_t Written; @@ -1843,6 +1858,8 @@ private: if (!(RegCache.Cached & Bit)) { if (Index == DFIndex) { RegCache.Value[Index] = _LoadDF(); + } else if (Index == AbridgedFTWIndex) { + RegCache.Value[Index] = _LoadContext(Size, RegClass, Offset); } else { RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); } @@ -1857,6 +1874,10 @@ private: return LoadRegCache(Reg, GPR0Index + Reg, GPRClass, CTX->GetGPRSize()); } + Ref LoadContext(uint8_t Index) { + return LoadRegCache(CacheIndexToContextOffset(Index), Index, CacheIndexClass(Index), CacheIndexToSize(Index)); + } + Ref LoadXMMRegister(uint8_t Reg) { return LoadRegCache(Reg, FPR0Index + Reg, FPRClass, GetGuestVectorLength()); } diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index 38b3467d0..ba52073e9 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -2699,8 +2699,7 @@ void OpDispatchBuilder::SaveX87State(OpcodeArgs, Ref MemBase) { { // Abridged FTW - auto AbridgedFTW = _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); - _StoreMem(GPRClass, 1, AbridgedFTW, MemBase, _Constant(4), 2, MEM_OFFSET_SXTX, 1); + _StoreMem(GPRClass, 1, LoadContext(AbridgedFTWIndex), MemBase, _Constant(4), 2, MEM_OFFSET_SXTX, 1); } // BYTE | 0 1 | 2 3 | 4 | 5 | 6 7 | 8 9 | a b | c d | e f | @@ -2875,8 +2874,7 @@ void OpDispatchBuilder::RestoreX87State(Ref MemBase) { { // Abridged FTW - auto NewAbridgedFTW = _LoadMem(GPRClass, 1, MemBase, _Constant(4), 2, MEM_OFFSET_SXTX, 1); - _StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, _LoadMem(GPRClass, 1, MemBase, _Constant(4), 2, MEM_OFFSET_SXTX, 1)); } for (uint32_t i = 0; i < Core::CPUState::NUM_MMS; ++i) { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp index 3699c0925..d5c7ec4b7 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp @@ -31,14 +31,14 @@ Ref OpDispatchBuilder::GetX87Top() { void OpDispatchBuilder::SetX87ValidTag(Ref Value, bool Valid) { // if we are popping then we must first mark this location as empty - Ref AbridgedFTW = _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); Ref RegMask = _Lshl(OpSize::i32Bit, _Constant(1), Value); Ref NewAbridgedFTW = Valid ? _Or(OpSize::i32Bit, AbridgedFTW, RegMask) : _Andn(OpSize::i32Bit, AbridgedFTW, RegMask); - _StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, NewAbridgedFTW); } Ref OpDispatchBuilder::GetX87ValidTag(Ref Value) { - Ref AbridgedFTW = _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); return _And(OpSize::i32Bit, _Lshr(OpSize::i32Bit, AbridgedFTW, Value), _Constant(1)); } @@ -51,8 +51,7 @@ Ref OpDispatchBuilder::GetX87Tag(Ref Value, Ref AbridgedFTW) { } Ref OpDispatchBuilder::GetX87Tag(Ref Value) { - Ref AbridgedFTW = _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); - return GetX87Tag(Value, AbridgedFTW); + return GetX87Tag(Value, LoadContext(AbridgedFTWIndex)); } void OpDispatchBuilder::SetX87FTW(Ref FTW) { @@ -70,11 +69,11 @@ void OpDispatchBuilder::SetX87FTW(Ref FTW) { } } - _StoreContext(1, GPRClass, NewAbridgedFTW, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, NewAbridgedFTW); } Ref OpDispatchBuilder::GetX87FTW() { - Ref AbridgedFTW = _LoadContext(1, GPRClass, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + Ref AbridgedFTW = LoadContext(AbridgedFTWIndex); Ref FTW = _Constant(0); for (int i = 0; i < 8; i++) { @@ -644,7 +643,7 @@ void OpDispatchBuilder::FNINIT(OpcodeArgs) { SetRFLAG(Zero); // Tags all get marked as invalid - _StoreContext(1, GPRClass, Zero, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, Zero); } template @@ -1215,7 +1214,7 @@ void OpDispatchBuilder::X87FCMOV(OpcodeArgs) { void OpDispatchBuilder::X87EMMS(OpcodeArgs) { // Tags all get set to 0b11 - _StoreContext(1, GPRClass, _Constant(0), offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, _Constant(0)); } void OpDispatchBuilder::X87FFREE(OpcodeArgs) { diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp index 96d2f3577..a746e5dc0 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87F64.cpp @@ -60,7 +60,7 @@ void OpDispatchBuilder::FNINITF64(OpcodeArgs) { SetRFLAG(Zero); // Tags all get marked as invalid - _StoreContext(1, GPRClass, Zero, offsetof(FEXCore::Core::CPUState, AbridgedFTW)); + StoreContext(AbridgedFTWIndex, Zero); } void OpDispatchBuilder::X87LDENVF64(OpcodeArgs) { From a4f8bbff0294e1b901a68712ad88795b0fed1566 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:50:49 -0400 Subject: [PATCH 08/12] OpcodeDispatcher: reg cache avx high Signed-off-by: Alyssa Rosenzweig --- FEXCore/Source/Interface/Core/OpcodeDispatcher.h | 11 +++++++++-- .../Interface/Core/OpcodeDispatcher/AVX_128.cpp | 4 ++-- 2 files changed, 11 insertions(+), 4 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 4e6b04627..d9b0f8f97 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -1819,9 +1819,12 @@ private: static const int DFIndex = 31; static const int FPR0Index = 32; static const int FPR15Index = 47; + static const int AVXHigh0Index = 48; + static const int AVXHigh15Index = 63; int CacheIndexToContextOffset(int Index) { switch (Index) { + case AVXHigh0Index ... AVXHigh15Index: return offsetof(FEXCore::Core::CPUState, avx_high[Index - AVXHigh0Index][0]); case AbridgedFTWIndex: return offsetof(FEXCore::Core::CPUState, AbridgedFTW); default: return -1; } @@ -1836,7 +1839,11 @@ private: } unsigned CacheIndexToSize(int Index) { - return 1; + if (Index >= AVXHigh0Index) { + return 16; + } else { + return 1; + } } struct { @@ -1858,7 +1865,7 @@ private: if (!(RegCache.Cached & Bit)) { if (Index == DFIndex) { RegCache.Value[Index] = _LoadDF(); - } else if (Index == AbridgedFTWIndex) { + } else if (Index == AbridgedFTWIndex || Index >= AVXHigh0Index) { RegCache.Value[Index] = _LoadContext(Size, RegClass, Offset); } else { RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp index 95f0acc46..4d8f09af0 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/AVX_128.cpp @@ -562,7 +562,7 @@ void OpDispatchBuilder::AVX128_StoreResult_WithOpSize(FEXCore::X86Tables::Decode Ref OpDispatchBuilder::AVX128_LoadXMMRegister(uint32_t XMM, bool High) { if (High) { - return _LoadContext(16, FPRClass, offsetof(FEXCore::Core::CPUState, avx_high[XMM][0])); + return LoadContext(AVXHigh0Index + XMM); } else { return LoadXMMRegister(XMM); } @@ -570,7 +570,7 @@ Ref OpDispatchBuilder::AVX128_LoadXMMRegister(uint32_t XMM, bool High) { void OpDispatchBuilder::AVX128_StoreXMMRegister(uint32_t XMM, const Ref Src, bool High) { if (High) { - _StoreContext(16, FPRClass, Src, offsetof(FEXCore::Core::CPUState, avx_high[XMM][0])); + StoreContext(AVXHigh0Index + XMM, Src); } else { StoreXMMRegister(XMM, Src); } From 294f10fdd00e2bff95645bf6a48e6bb47f88ff10 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:51:10 -0400 Subject: [PATCH 09/12] OpcodeDispatcher: reg cache mmx Signed-off-by: Alyssa Rosenzweig --- .../Interface/Core/OpcodeDispatcher.cpp | 11 +++- .../Source/Interface/Core/OpcodeDispatcher.h | 52 +++++++++++++++++-- .../Core/OpcodeDispatcher/Vector.cpp | 6 +-- 3 files changed, 59 insertions(+), 10 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index c84cbc870..000bad4e5 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -4374,7 +4374,9 @@ Ref OpDispatchBuilder::LoadSource_WithOpSize(RegisterClassType Class, const X86T const auto highIndex = Operand.Data.GPR.HighBits ? 1 : 0; if (gpr >= FEXCore::X86State::REG_MM_0) { - A.Base = _LoadContext(OpSize, FPRClass, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0])); + LOGMAN_THROW_A_FMT(OpSize == 8, "full"); + + A.Base = LoadContext(8, MM0Index + gpr - FEXCore::X86State::REG_MM_0); } else if (gpr >= FEXCore::X86State::REG_XMM_0) { const auto gprIndex = gpr - X86State::REG_XMM_0; @@ -4460,7 +4462,12 @@ void OpDispatchBuilder::StoreResult_WithOpSize(FEXCore::IR::RegisterClassType Cl const auto gpr = Operand.Data.GPR.GPR; if (gpr >= FEXCore::X86State::REG_MM_0) { - _StoreContext(OpSize, Class, Src, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0])); + LOGMAN_THROW_A_FMT(OpSize == 8, "full"); + LOGMAN_THROW_A_FMT(Class == FPRClass, "MMX is floaty"); + + // Partial store into bottom 64-bits, leave the upper bits unaffected. + // XXX: We actually should set the upper bits to all-1s? + StoreContextPartial(MM0Index + gpr - FEXCore::X86State::REG_MM_0, Src); } else if (gpr >= FEXCore::X86State::REG_XMM_0) { const auto gprIndex = gpr - X86State::REG_XMM_0; const auto VectorSize = (CTX->HostFeatures.SupportsSVE256 && CTX->HostFeatures.SupportsAVX) ? 32 : 16; diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index d9b0f8f97..67a66b41c 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -1302,7 +1302,9 @@ public: } else if (Index == DFIndex) { _StoreFlag(Value, X86State::RFLAG_DF_RAW_LOC); } else { - _StoreContext(CacheIndexToSize(Index), CacheIndexClass(Index), Value, CacheIndexToContextOffset(Index)); + bool Partial = RegCache.Partial & (1ull << Index); + unsigned Size = Partial ? 8 : CacheIndexToSize(Index); + _StoreContext(Size, CacheIndexClass(Index), Value, CacheIndexToContextOffset(Index)); } Bits &= ~(1ull << Index); @@ -1310,6 +1312,7 @@ public: RegCache.Written &= ~Mask; RegCache.Cached &= ~Mask; + RegCache.Partial &= ~Mask; } protected: @@ -1814,6 +1817,9 @@ private: static const int GPR15Index = 15; static const int PFIndex = 16; static const int AFIndex = 17; + /* Gap 18..19 */ + static const int MM0Index = 20; + static const int MM7Index = 27; static const int AbridgedFTWIndex = 28; /* Gap 29..30 */ static const int DFIndex = 31; @@ -1824,6 +1830,7 @@ private: int CacheIndexToContextOffset(int Index) { switch (Index) { + case MM0Index ... MM7Index: return offsetof(FEXCore::Core::CPUState, mm[Index - MM0Index]); case AVXHigh0Index ... AVXHigh15Index: return offsetof(FEXCore::Core::CPUState, avx_high[Index - AVXHigh0Index][0]); case AbridgedFTWIndex: return offsetof(FEXCore::Core::CPUState, AbridgedFTW); default: return -1; @@ -1831,7 +1838,7 @@ private: } RegisterClassType CacheIndexClass(int Index) { - if (Index >= FPR0Index) { + if ((Index >= MM0Index && Index <= MM7Index) || Index >= FPR0Index) { return FPRClass; } else { return GPRClass; @@ -1839,7 +1846,9 @@ private: } unsigned CacheIndexToSize(int Index) { - if (Index >= AVXHigh0Index) { + // MMX registers are rounded up to 128-bit since they are shared with 80-bit + // x87 registers, even though MMX is logically only 64-bit. + if (Index >= AVXHigh0Index || ((Index >= MM0Index && Index <= MM7Index))) { return 16; } else { return 1; @@ -1849,6 +1858,11 @@ private: struct { uint64_t Cached; uint64_t Written; + + // Indicates that Value contains only the lower 64-bit of the full 80-bit + // register. Used for MMX/x87 optimization. + uint64_t Partial; + Ref Value[64]; } RegCache {}; @@ -1862,11 +1876,29 @@ private: LOGMAN_THROW_AA_FMT(Index < 64, "valid index"); uint64_t Bit = (1ull << (uint64_t)Index); + if (Size == 16 && (RegCache.Partial & Bit)) { + // We need to load the full register extend if we previously did a partial access. + Ref Value = RegCache.Value[Index]; + Ref Full = _LoadContext(Size, RegClass, Offset); + + // If we did a partial store, we're inserting into the full register + if (RegCache.Written & Bit) { + Full = _VInsElement(16, 8, 0, 0, Full, Value); + } + + RegCache.Value[Index] = Full; + } + if (!(RegCache.Cached & Bit)) { if (Index == DFIndex) { RegCache.Value[Index] = _LoadDF(); - } else if (Index == AbridgedFTWIndex || Index >= AVXHigh0Index) { + } else if ((Index >= MM0Index && Index <= AbridgedFTWIndex) || Index >= AVXHigh0Index) { RegCache.Value[Index] = _LoadContext(Size, RegClass, Offset); + + // We may have done a partial load, this requires special handling. + if (Size == 8) { + RegCache.Partial |= Bit; + } } else { RegCache.Value[Index] = _LoadRegister(Offset, RegClass, Size); } @@ -1881,8 +1913,12 @@ private: return LoadRegCache(Reg, GPR0Index + Reg, GPRClass, CTX->GetGPRSize()); } + Ref LoadContext(uint8_t Size, uint8_t Index) { + return LoadRegCache(CacheIndexToContextOffset(Index), Index, CacheIndexClass(Index), Size); + } + Ref LoadContext(uint8_t Index) { - return LoadRegCache(CacheIndexToContextOffset(Index), Index, CacheIndexClass(Index), CacheIndexToSize(Index)); + return LoadContext(CacheIndexToSize(Index), Index); } Ref LoadXMMRegister(uint8_t Reg) { @@ -1904,6 +1940,12 @@ private: RegCache.Written |= Bit; } + void StoreContextPartial(uint8_t Index, Ref Value) { + StoreContext(Index, Value); + + RegCache.Partial |= (1ull << (uint64_t)Index); + } + void StoreRegister(uint8_t Reg, bool FPR, Ref Value) { StoreContext(Reg + (FPR ? FPR0Index : GPR0Index), Value); } diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp index ba52073e9..8e28d479e 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp @@ -2747,7 +2747,7 @@ void OpDispatchBuilder::SaveX87State(OpcodeArgs, Ref MemBase) { // If OSFXSR bit in CR4 is not set than FXSAVE /may/ not save the XMM registers // This is implementation dependent for (uint32_t i = 0; i < Core::CPUState::NUM_MMS; ++i) { - Ref MMReg = _LoadContext(16, FPRClass, offsetof(FEXCore::Core::CPUState, mm[i])); + Ref MMReg = LoadContext(MM0Index + i); _StoreMem(FPRClass, 16, MMReg, MemBase, _Constant(i * 16 + 32), 16, MEM_OFFSET_SXTX, 1); } @@ -2879,7 +2879,7 @@ void OpDispatchBuilder::RestoreX87State(Ref MemBase) { for (uint32_t i = 0; i < Core::CPUState::NUM_MMS; ++i) { auto MMReg = _LoadMem(FPRClass, 16, MemBase, _Constant(i * 16 + 32), 16, MEM_OFFSET_SXTX, 1); - _StoreContext(16, FPRClass, MMReg, offsetof(FEXCore::Core::CPUState, mm[i])); + StoreContext(MM0Index + i, MMReg); } } @@ -2918,7 +2918,7 @@ void OpDispatchBuilder::DefaultX87State(OpcodeArgs) { // all of the ST0-7/MM0-7 registers to zero. Ref ZeroVector = LoadZeroVector(Core::CPUState::MM_REG_SIZE); for (uint32_t i = 0; i < Core::CPUState::NUM_MMS; ++i) { - _StoreContext(16, FPRClass, ZeroVector, offsetof(FEXCore::Core::CPUState, mm[i])); + StoreContext(MM0Index + i, ZeroVector); } } From 8dae4bcd443205771fe984707a7708be0f713697 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 08:51:17 -0400 Subject: [PATCH 10/12] OpcodeDispatcher: drop stale comment Signed-off-by: Alyssa Rosenzweig --- FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp index d5c7ec4b7..3e1db6356 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp @@ -153,7 +153,6 @@ void OpDispatchBuilder::FLD(OpcodeArgs) { SetX87Top(top); // Write to ST[TOP] _StoreContextIndexed(converted, top, 16, MMBaseOffset(), 16, FPRClass); - //_StoreContext(converted, 16, offsetof(FEXCore::Core::CPUState, mm[7][0])); } template void OpDispatchBuilder::FLD<32>(OpcodeArgs); From 3a334c4585ae1067ccc7c25fa6c436fa62b5fbd4 Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Wed, 3 Jul 2024 07:40:10 -0400 Subject: [PATCH 11/12] Reapply "IR: drop RCLSE" This reverts commit 78aee4d96e39c9ef6415a7dca21fd6b81dabe12e. --- FEXCore/Source/CMakeLists.txt | 1 - .../Interface/Core/JIT/Arm64/ALUOps.cpp | 2 +- FEXCore/Source/Interface/IR/PassManager.cpp | 1 - FEXCore/Source/Interface/IR/Passes.h | 1 - .../IR/Passes/DeadContextStoreElimination.cpp | 772 ------------------ docs/SourceOutline.md | 1 - 6 files changed, 1 insertion(+), 777 deletions(-) delete mode 100644 FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp diff --git a/FEXCore/Source/CMakeLists.txt b/FEXCore/Source/CMakeLists.txt index e766410bc..e760ae751 100644 --- a/FEXCore/Source/CMakeLists.txt +++ b/FEXCore/Source/CMakeLists.txt @@ -138,7 +138,6 @@ set (SRCS Interface/IR/IREmitter.cpp Interface/IR/PassManager.cpp Interface/IR/Passes/ConstProp.cpp - Interface/IR/Passes/DeadContextStoreElimination.cpp Interface/IR/Passes/IRDumperPass.cpp Interface/IR/Passes/IRValidation.cpp Interface/IR/Passes/RAValidation.cpp diff --git a/FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp b/FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp index e27f2bcc0..5f0e64a47 100644 --- a/FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp +++ b/FEXCore/Source/Interface/Core/JIT/Arm64/ALUOps.cpp @@ -625,7 +625,7 @@ DEF_OP(ShiftFlags) { // Set the output outside the branch to avoid needing an extra leg of the // branch. We specifically do not hardcode the PF register anywhere (relying - // on a tied SRA register instead) to avoid fighting with RA/RCLSE. + // on a tied SRA register instead) to avoid fighting with RA. if (PFTemp != PFInput) { mov(ARMEmitter::Size::i64Bit, PFTemp, PFInput); } diff --git a/FEXCore/Source/Interface/IR/PassManager.cpp b/FEXCore/Source/Interface/IR/PassManager.cpp index e3f138990..e93e04cd8 100644 --- a/FEXCore/Source/Interface/IR/PassManager.cpp +++ b/FEXCore/Source/Interface/IR/PassManager.cpp @@ -70,7 +70,6 @@ void PassManager::AddDefaultPasses(FEXCore::Context::ContextImpl* ctx) { FEX_CONFIG_OPT(DisablePasses, O0); if (!DisablePasses()) { - InsertPass(CreateContextLoadStoreElimination(ctx->HostFeatures.SupportsAVX && ctx->HostFeatures.SupportsSVE256)); InsertPass(CreateDeadStoreElimination()); InsertPass(CreateConstProp(ctx->HostFeatures.SupportsTSOImm9, &ctx->CPUID)); InsertPass(CreateDeadFlagCalculationEliminination()); diff --git a/FEXCore/Source/Interface/IR/Passes.h b/FEXCore/Source/Interface/IR/Passes.h index 72474ad5e..8c18ff2bd 100644 --- a/FEXCore/Source/Interface/IR/Passes.h +++ b/FEXCore/Source/Interface/IR/Passes.h @@ -17,7 +17,6 @@ class RegisterAllocationPass; class RegisterAllocationData; fextl::unique_ptr CreateConstProp(bool SupportsTSOImm9, const FEXCore::CPUIDEmu* CPUID); -fextl::unique_ptr CreateContextLoadStoreElimination(bool SupportsSVE256); fextl::unique_ptr CreateDeadFlagCalculationEliminination(); fextl::unique_ptr CreateDeadStoreElimination(); fextl::unique_ptr CreateRegisterAllocationPass(); diff --git a/FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp b/FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp deleted file mode 100644 index 2e663e2b0..000000000 --- a/FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp +++ /dev/null @@ -1,772 +0,0 @@ -// SPDX-License-Identifier: MIT -/* -$info$ -tags: ir|opts -desc: Transforms ContextLoad/Store to temporaries, similar to mem2reg -$end_info$ -*/ - -#include "Interface/IR/IR.h" -#include "Interface/IR/IREmitter.h" -#include "Interface/IR/Passes.h" -#include "Interface/IR/PassManager.h" - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -namespace { -struct ContextMemberClassification { - size_t Offset; - uint16_t Size; -}; - -enum class LastAccessType { - NONE = (0b000 << 0), ///< Was never previously accessed - WRITE = (0b001 << 0), ///< Was fully overwritten - READ = (0b010 << 0), ///< Was fully read - INVALID = (0b011 << 0), ///< Accessing this is invalid - MASK = (0b011 << 0), - PARTIAL = (0b100 << 0), - PARTIAL_WRITE = (PARTIAL | WRITE), ///< Was partially written - PARTIAL_READ = (PARTIAL | READ), ///< Was partially read -}; -FEX_DEF_NUM_OPS(LastAccessType); - -static bool IsWriteAccess(LastAccessType Type) { - return (Type & LastAccessType::MASK) == LastAccessType::WRITE; -} - -static bool IsReadAccess(LastAccessType Type) { - return (Type & LastAccessType::MASK) == LastAccessType::READ; -} - -[[maybe_unused]] -static bool IsInvalidAccess(LastAccessType Type) { - return (Type & LastAccessType::MASK) == LastAccessType::INVALID; -} - -[[maybe_unused]] -static bool IsPartialAccess(LastAccessType Type) { - return (Type & LastAccessType::PARTIAL) == LastAccessType::PARTIAL; -} - -[[maybe_unused]] -static bool IsFullAccess(LastAccessType Type) { - return (Type & LastAccessType::PARTIAL) == LastAccessType::NONE; -} - -struct ContextMemberInfo { - ContextMemberClassification Class; - LastAccessType Accessed; - FEXCore::IR::RegisterClassType AccessRegClass; - uint32_t AccessOffset; - uint8_t AccessSize; - ///< The last value that was loaded or stored. - FEXCore::IR::Ref ValueNode; - ///< With a store access, the store node that is doing the operation. - FEXCore::IR::Ref StoreNode; -}; - -struct ContextInfo { - fextl::vector Lookup; - fextl::vector ClassificationInfo; -}; - -static void ClassifyContextStruct(ContextInfo* ContextClassificationInfo, bool SupportsAVX256) { - auto ContextClassification = &ContextClassificationInfo->ClassificationInfo; - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, InlineJITBlockHeader), - sizeof(FEXCore::Core::CPUState::InlineJITBlockHeader), - }, - LastAccessType::INVALID, - FEXCore::IR::InvalidClass, - }); - - // DeferredSignalRefCount - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, DeferredSignalRefCount), - sizeof(FEXCore::Core::CPUState::DeferredSignalRefCount), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, avx_high[0][0]) + FEXCore::Core::CPUState::XMM_SSE_REG_SIZE * i, - FEXCore::Core::CPUState::XMM_SSE_REG_SIZE, - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, rip), - sizeof(FEXCore::Core::CPUState::rip), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_GPRS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, gregs[0]) + sizeof(FEXCore::Core::CPUState::gregs[0]) * i, - FEXCore::Core::CPUState::GPR_REG_SIZE, - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, _pad), - sizeof(FEXCore::Core::CPUState::_pad), - }, - LastAccessType::INVALID, - FEXCore::IR::InvalidClass, - }); - - static_assert(offsetof(FEXCore::Core::CPUState, xmm.avx.data[0][0]) == 416, "What"); - static_assert(FEXCore::Core::CPUState::XMM_AVX_REG_SIZE == 32, "What"); - if (SupportsAVX256) { - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, xmm.avx.data[0][0]) + FEXCore::Core::CPUState::XMM_AVX_REG_SIZE * i, - FEXCore::Core::CPUState::XMM_AVX_REG_SIZE, - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - } else { - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, xmm.sse.data[0][0]) + FEXCore::Core::CPUState::XMM_SSE_REG_SIZE * i, - FEXCore::Core::CPUState::XMM_SSE_REG_SIZE, - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, xmm.sse.pad[0][0]), - static_cast(FEXCore::Core::CPUState::XMM_SSE_REG_SIZE * FEXCore::Core::CPUState::NUM_XMMS), - }, - LastAccessType::INVALID, - FEXCore::IR::InvalidClass, - }); - } - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, es_idx), - sizeof(FEXCore::Core::CPUState::es_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, cs_idx), - sizeof(FEXCore::Core::CPUState::cs_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, ss_idx), - sizeof(FEXCore::Core::CPUState::ss_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, ds_idx), - sizeof(FEXCore::Core::CPUState::ds_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, gs_idx), - sizeof(FEXCore::Core::CPUState::gs_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, fs_idx), - sizeof(FEXCore::Core::CPUState::fs_idx), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, _pad2), - sizeof(FEXCore::Core::CPUState::_pad2), - }, - LastAccessType::INVALID, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, es_cached), - sizeof(FEXCore::Core::CPUState::es_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, cs_cached), - sizeof(FEXCore::Core::CPUState::cs_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, ss_cached), - sizeof(FEXCore::Core::CPUState::ss_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, ds_cached), - sizeof(FEXCore::Core::CPUState::ds_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, gs_cached), - sizeof(FEXCore::Core::CPUState::gs_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, fs_cached), - sizeof(FEXCore::Core::CPUState::fs_cached), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_FLAGS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, flags[0]) + sizeof(FEXCore::Core::CPUState::flags[0]) * i, - FEXCore::Core::CPUState::FLAG_SIZE, - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, pf_raw), - sizeof(FEXCore::Core::CPUState::pf_raw), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, af_raw), - sizeof(FEXCore::Core::CPUState::af_raw), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_MMS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification {offsetof(FEXCore::Core::CPUState, mm[0][0]) + sizeof(FEXCore::Core::CPUState::mm[0]) * i, - FEXCore::Core::CPUState::MM_REG_SIZE}, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - // GDTs - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_GDTS; ++i) { - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, gdt[0]) + sizeof(FEXCore::Core::CPUState::gdt[0]) * i, - sizeof(FEXCore::Core::CPUState::gdt[0]), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - } - - // FCW - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, FCW), - sizeof(FEXCore::Core::CPUState::FCW), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - // AbridgedFTW - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, AbridgedFTW), - sizeof(FEXCore::Core::CPUState::AbridgedFTW), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - // _pad3 - ContextClassification->emplace_back(ContextMemberInfo { - ContextMemberClassification { - offsetof(FEXCore::Core::CPUState, _pad3), - sizeof(FEXCore::Core::CPUState::_pad3), - }, - LastAccessType::NONE, - FEXCore::IR::InvalidClass, - }); - - [[maybe_unused]] size_t ClassifiedStructSize {}; - ContextClassificationInfo->Lookup.reserve(sizeof(FEXCore::Core::CPUState)); - for (auto& it : *ContextClassification) { - LOGMAN_THROW_A_FMT(it.Class.Offset == ContextClassificationInfo->Lookup.size(), "Offset mismatch (offset={})", it.Class.Offset); - for (int i = 0; i < it.Class.Size; i++) { - ContextClassificationInfo->Lookup.push_back(&it); - } - ClassifiedStructSize += it.Class.Size; - } - - LOGMAN_THROW_AA_FMT(ClassifiedStructSize == sizeof(FEXCore::Core::CPUState), - "Classified CPUStruct size doesn't match real CPUState struct size! {} (classified) != {} (real)", - ClassifiedStructSize, sizeof(FEXCore::Core::CPUState)); - - LOGMAN_THROW_A_FMT(ContextClassificationInfo->Lookup.size() == sizeof(FEXCore::Core::CPUState), - "Classified lookup size doesn't match real CPUState struct size! {} (classified) != {} (real)", - ContextClassificationInfo->Lookup.size(), sizeof(FEXCore::Core::CPUState)); -} - -static void ResetClassificationAccesses(ContextInfo* ContextClassificationInfo, bool SupportsAVX256) { - auto ContextClassification = &ContextClassificationInfo->ClassificationInfo; - - auto SetAccess = [&](size_t Offset, LastAccessType Access) { - ContextClassification->at(Offset).Accessed = Access; - ContextClassification->at(Offset).AccessRegClass = FEXCore::IR::InvalidClass; - ContextClassification->at(Offset).AccessOffset = 0; - ContextClassification->at(Offset).StoreNode = nullptr; - }; - - size_t Offset = 0; - - ///< InlineJITBlockHeader - SetAccess(Offset++, LastAccessType::INVALID); - - // DeferredSignalRefCount - SetAccess(Offset++, LastAccessType::INVALID); - - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) { - ///< avx_high - SetAccess(Offset++, LastAccessType::NONE); - } - - // rip - SetAccess(Offset++, LastAccessType::NONE); - - ///< gregs - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_GPRS; ++i) { - SetAccess(Offset++, LastAccessType::NONE); - } - - // pad - SetAccess(Offset++, LastAccessType::NONE); - - // xmm - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_XMMS; ++i) { - SetAccess(Offset++, LastAccessType::NONE); - } - - // xmm_pad - if (!SupportsAVX256) { - SetAccess(Offset++, LastAccessType::NONE); - } - - // Segment indexes - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - - // Pad2 - SetAccess(Offset++, LastAccessType::INVALID); - - // Segments - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - SetAccess(Offset++, LastAccessType::NONE); - - ///< flags - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_FLAGS; ++i) { - SetAccess(Offset++, LastAccessType::NONE); - } - - ///< pf_raw - SetAccess(Offset++, LastAccessType::NONE); - - ///< af_raw - SetAccess(Offset++, LastAccessType::NONE); - - ///< mm - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_MMS; ++i) { - SetAccess(Offset++, LastAccessType::NONE); - } - - ///< gdt - for (size_t i = 0; i < FEXCore::Core::CPUState::NUM_GDTS; ++i) { - SetAccess(Offset++, LastAccessType::NONE); - } - - ///< FCW - SetAccess(Offset++, LastAccessType::NONE); - - ///< AbridgedFTW - SetAccess(Offset++, LastAccessType::NONE); - - // pad3 - SetAccess(Offset++, LastAccessType::INVALID); -} - -struct BlockInfo { - fextl::vector Predecessors; - fextl::vector Successors; - ContextInfo IncomingClassifiedStruct; - ContextInfo OutgoingClassifiedStruct; -}; - -class RCLSE final : public FEXCore::IR::Pass { -public: - explicit RCLSE(bool SupportsAVX256) - : SupportsAVX256 {SupportsAVX256} { - ClassifyContextStruct(&ClassifiedStruct, SupportsAVX256); - } - void Run(FEXCore::IR::IREmitter* IREmit) override; -private: - ContextInfo ClassifiedStruct; - fextl::unordered_map OffsetToBlockMap; - - bool SupportsAVX256; - - ContextMemberInfo* FindMemberInfo(ContextInfo* ClassifiedInfo, uint32_t Offset, uint8_t Size); - ContextMemberInfo* RecordAccess(ContextMemberInfo* Info, FEXCore::IR::RegisterClassType RegClass, uint32_t Offset, uint8_t Size, - LastAccessType AccessType, FEXCore::IR::Ref Node, FEXCore::IR::Ref StoreNode = nullptr); - ContextMemberInfo* RecordAccess(ContextInfo* ClassifiedInfo, FEXCore::IR::RegisterClassType RegClass, uint32_t Offset, uint8_t Size, - LastAccessType AccessType, FEXCore::IR::Ref Node, FEXCore::IR::Ref StoreNode = nullptr); - - void HandleLoadFlag(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::Ref CodeNode, unsigned Flag); - - // Classify context loads and stores. - void ClassifyContextLoad(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::RegisterClassType Class, uint32_t Offset, - uint8_t Size, FEXCore::IR::Ref CodeNode, FEXCore::IR::NodeIterator BlockEnd); - void ClassifyContextStore(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::RegisterClassType Class, uint32_t Offset, - uint8_t Size, FEXCore::IR::Ref CodeNode, FEXCore::IR::Ref ValueNode); - - // Block local Passes - void RedundantStoreLoadElimination(FEXCore::IR::IREmitter* IREmit); - - unsigned OffsetForReg(FEXCore::IR::RegisterClassType Class, unsigned Reg, unsigned Size) { - if (Class == FEXCore::IR::FPRClass) { - return Size == 32 ? offsetof(FEXCore::Core::CPUState, xmm.avx.data[Reg][0]) : offsetof(FEXCore::Core::CPUState, xmm.sse.data[Reg][0]); - } else if (Reg == FEXCore::Core::CPUState::PF_AS_GREG) { - return offsetof(FEXCore::Core::CPUState, pf_raw); - } else if (Reg == FEXCore::Core::CPUState::AF_AS_GREG) { - return offsetof(FEXCore::Core::CPUState, af_raw); - } else { - return offsetof(FEXCore::Core::CPUState, gregs[Reg]); - } - } -}; - -ContextMemberInfo* RCLSE::FindMemberInfo(ContextInfo* ContextClassificationInfo, uint32_t Offset, uint8_t Size) { - return ContextClassificationInfo->Lookup.at(Offset); -} - -ContextMemberInfo* RCLSE::RecordAccess(ContextMemberInfo* Info, FEXCore::IR::RegisterClassType RegClass, uint32_t Offset, uint8_t Size, - LastAccessType AccessType, FEXCore::IR::Ref ValueNode, FEXCore::IR::Ref StoreNode) { - LOGMAN_THROW_AA_FMT((Offset + Size) <= (Info->Class.Offset + Info->Class.Size), "Access to context item went over member size"); - LOGMAN_THROW_AA_FMT(Info->Accessed != LastAccessType::INVALID, "Tried to access invalid member"); - - // If we aren't fully overwriting the member then it is a partial write that we need to track - if (Size < Info->Class.Size) { - AccessType = AccessType == LastAccessType::WRITE ? LastAccessType::PARTIAL_WRITE : LastAccessType::PARTIAL_READ; - } - if (Size > Info->Class.Size) { - LOGMAN_MSG_A_FMT("Can't handle this"); - } - - Info->Accessed = AccessType; - Info->AccessRegClass = RegClass; - Info->AccessOffset = Offset; - Info->AccessSize = Size; - Info->ValueNode = ValueNode; - if (StoreNode != nullptr) { - Info->StoreNode = StoreNode; - } - return Info; -} - -ContextMemberInfo* RCLSE::RecordAccess(ContextInfo* ClassifiedInfo, FEXCore::IR::RegisterClassType RegClass, uint32_t Offset, uint8_t Size, - LastAccessType AccessType, FEXCore::IR::Ref ValueNode, FEXCore::IR::Ref StoreNode) { - ContextMemberInfo* Info = FindMemberInfo(ClassifiedInfo, Offset, Size); - return RecordAccess(Info, RegClass, Offset, Size, AccessType, ValueNode, StoreNode); -} - -void RCLSE::ClassifyContextLoad(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::RegisterClassType Class, - uint32_t Offset, uint8_t Size, FEXCore::IR::Ref CodeNode, FEXCore::IR::NodeIterator BlockEnd) { - auto Info = FindMemberInfo(LocalInfo, Offset, Size); - ContextMemberInfo PreviousMemberInfoCopy = *Info; - RecordAccess(Info, Class, Offset, Size, LastAccessType::READ, CodeNode); - - if (PreviousMemberInfoCopy.AccessRegClass == Info->AccessRegClass && PreviousMemberInfoCopy.AccessOffset == Info->AccessOffset && - PreviousMemberInfoCopy.AccessSize == Size) { - // This optimizes two cases: - // - Previous access was a load, and we have a redundant load of the same value. - // - Previous access was a store, and we are redundantly loading immediately after the store. Eliminating the store. - IREmit->ReplaceAllUsesWithRange(CodeNode, PreviousMemberInfoCopy.ValueNode, IREmit->GetIterator(IREmit->WrapNode(CodeNode)), BlockEnd); - RecordAccess(Info, Class, Offset, Size, LastAccessType::READ, PreviousMemberInfoCopy.ValueNode); - } - // TODO: Optimize the case of partial loads. -} - -void RCLSE::ClassifyContextStore(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::RegisterClassType Class, - uint32_t Offset, uint8_t Size, FEXCore::IR::Ref CodeNode, FEXCore::IR::Ref ValueNode) { - auto Info = FindMemberInfo(LocalInfo, Offset, Size); - ContextMemberInfo PreviousMemberInfoCopy = *Info; - RecordAccess(Info, Class, Offset, Size, LastAccessType::WRITE, ValueNode, CodeNode); - - if (PreviousMemberInfoCopy.AccessRegClass == Info->AccessRegClass && PreviousMemberInfoCopy.AccessOffset == Info->AccessOffset && - PreviousMemberInfoCopy.AccessSize == Size && PreviousMemberInfoCopy.Accessed == LastAccessType::WRITE) { - // This optimizes redundant stores with no intervening load - // TODO: this is causing RA to fall over in some titles, disabling for now. - // Revisit when the new RA lands. -#if 0 - IREmit->Remove(PreviousMemberInfoCopy.StoreNode); -#endif - } - - // TODO: Optimize the case of partial stores. -} - -void RCLSE::HandleLoadFlag(FEXCore::IR::IREmitter* IREmit, ContextInfo* LocalInfo, FEXCore::IR::Ref CodeNode, unsigned Flag) { - const auto FlagOffset = offsetof(FEXCore::Core::CPUState, flags[Flag]); - auto Info = FindMemberInfo(LocalInfo, FlagOffset, 1); - LastAccessType LastAccess = Info->Accessed; - auto LastValueNode = Info->ValueNode; - - if (IsWriteAccess(LastAccess)) { // 1 byte so always a full write - // If the last store matches this load value then we can replace the loaded value with the previous valid one - IREmit->SetWriteCursor(CodeNode); - IREmit->ReplaceAllUsesWith(CodeNode, LastValueNode); - RecordAccess(Info, FEXCore::IR::GPRClass, FlagOffset, 1, LastAccessType::READ, LastValueNode); - } else if (IsReadAccess(LastAccess)) { - IREmit->ReplaceAllUsesWith(CodeNode, LastValueNode); - RecordAccess(Info, FEXCore::IR::GPRClass, FlagOffset, 1, LastAccessType::READ, LastValueNode); - } -} - -/** - * @brief This pass removes redundant pairs of storecontext and loadcontext ops - * - * eg. - * %26 i128 = LoadMem %25 i64, 0x10 - * (%%27) StoreContext %26 i128, 0x10, 0xb0 - * %28 i128 = LoadContext 0x10, 0x90 - * %29 i128 = LoadContext 0x10, 0xb0 - * Converts to - * %26 i128 = LoadMem %25 i64, 0x10 - * (%%27) StoreContext %26 i128, 0x10, 0xb0 - * %28 i128 = LoadContext 0x10, 0x90 - * - * eg. - * %6 i128 = LoadContext 0x10, 0x90 - * %7 i128 = LoadContext 0x10, 0x90 - * %8 i128 = VXor %7 i128, %6 i128 - * Converts to - * %6 i128 = LoadContext 0x10, 0x90 - * %7 i128 = VXor %6 i128, %6 i128 - * - * eg. - * (%%189) StoreContext %188 i128, 0x10, 0xa0 - * %190 i128 = LoadContext 0x10, 0x90 - * %192 i128 = VAdd %188 i128, %190 i128, 0x10, 0x4 - * (%%193) StoreContext %192 i128, 0x10, 0xa0 - * Converts to - * %173 i128 = LoadContext 0x10, 0x90 - * %175 i128 = VAdd %172 i128, %173 i128, 0x10, 0x4 - * (%%176) StoreContext %175 i128, 0x10, 0xa0 - - */ -void RCLSE::RedundantStoreLoadElimination(FEXCore::IR::IREmitter* IREmit) { - using namespace FEXCore; - using namespace FEXCore::IR; - - auto CurrentIR = IREmit->ViewIR(); - auto OriginalWriteCursor = IREmit->GetWriteCursor(); - - // XXX: Walk the list and calculate the control flow - - ContextInfo& LocalInfo = ClassifiedStruct; - - for (auto [BlockNode, BlockHeader] : CurrentIR.GetBlocks()) { - auto BlockOp = BlockHeader->CW(); - auto BlockEnd = IREmit->GetIterator(BlockOp->Last); - - ResetClassificationAccesses(&LocalInfo, SupportsAVX256); - - for (auto [CodeNode, IROp] : CurrentIR.GetCode(BlockNode)) { - if (IROp->Op == OP_STORECONTEXT) { - auto Op = IROp->CW(); - ClassifyContextStore(IREmit, &LocalInfo, Op->Class, Op->Offset, IROp->Size, CodeNode, CurrentIR.GetNode(Op->Value)); - } else if (IROp->Op == OP_STOREREGISTER) { - auto Op = IROp->CW(); - auto Offset = OffsetForReg(Op->Class, Op->Reg, IROp->Size); - - ClassifyContextStore(IREmit, &LocalInfo, Op->Class, Offset, IROp->Size, CodeNode, CurrentIR.GetNode(Op->Value)); - } else if (IROp->Op == OP_LOADREGISTER) { - auto Op = IROp->CW(); - auto Offset = OffsetForReg(Op->Class, Op->Reg, IROp->Size); - ClassifyContextLoad(IREmit, &LocalInfo, Op->Class, Offset, IROp->Size, CodeNode, BlockEnd); - } else if (IROp->Op == OP_LOADCONTEXT) { - auto Op = IROp->CW(); - ClassifyContextLoad(IREmit, &LocalInfo, Op->Class, Op->Offset, IROp->Size, CodeNode, BlockEnd); - } else if (IROp->Op == OP_STOREFLAG) { - const auto Op = IROp->CW(); - const auto FlagOffset = offsetof(FEXCore::Core::CPUState, flags[0]) + Op->Flag; - auto Info = FindMemberInfo(&LocalInfo, FlagOffset, 1); - auto LastStoreNode = Info->StoreNode; - RecordAccess(&LocalInfo, FEXCore::IR::GPRClass, FlagOffset, 1, LastAccessType::WRITE, CurrentIR.GetNode(Op->Header.Args[0]), CodeNode); - - // Flags don't alias, so we can take the simple route here. Kill any flags that have been overwritten - if (LastStoreNode != nullptr) { - IREmit->Remove(LastStoreNode); - } - } else if (IROp->Op == OP_INVALIDATEFLAGS) { - auto Op = IROp->CW(); - - // Loop through non-reserved flag stores and eliminate unused ones. - for (size_t F = 0; F < Core::CPUState::NUM_EFLAG_BITS; F++) { - if (!(Op->Flags & (1ULL << F))) { - continue; - } - - const auto FlagOffset = offsetof(FEXCore::Core::CPUState, flags[0]) + F; - auto Info = FindMemberInfo(&LocalInfo, FlagOffset, 1); - auto LastStoreNode = Info->StoreNode; - - // Flags don't alias, so we can take the simple route here. Kill any flags that have been invalidated without a read. - if (LastStoreNode != nullptr) { - IREmit->SetWriteCursor(CodeNode); - RecordAccess(&LocalInfo, FEXCore::IR::GPRClass, FlagOffset, 1, LastAccessType::WRITE, IREmit->_Constant(0), CodeNode); - - IREmit->Remove(LastStoreNode); - } - } - } else if (IROp->Op == OP_LOADFLAG) { - const auto Op = IROp->CW(); - - HandleLoadFlag(IREmit, &LocalInfo, CodeNode, Op->Flag); - } else if (IROp->Op == OP_LOADDF) { - HandleLoadFlag(IREmit, &LocalInfo, CodeNode, X86State::RFLAG_DF_RAW_LOC); - } else if (IROp->Op == OP_SYSCALL || IROp->Op == OP_INLINESYSCALL) { - FEXCore::IR::SyscallFlags Flags {}; - if (IROp->Op == OP_SYSCALL) { - auto Op = IROp->C(); - Flags = Op->Flags; - } else { - auto Op = IROp->C(); - Flags = Op->Flags; - } - - if ((Flags & FEXCore::IR::SyscallFlags::OPTIMIZETHROUGH) != FEXCore::IR::SyscallFlags::OPTIMIZETHROUGH) { - // We can't track through these - ResetClassificationAccesses(&LocalInfo, SupportsAVX256); - } - } else if (IROp->Op == OP_STORECONTEXTINDEXED || IROp->Op == OP_LOADCONTEXTINDEXED || IROp->Op == OP_BREAK) { - // We can't track through these - ResetClassificationAccesses(&LocalInfo, SupportsAVX256); - } - } - } - - IREmit->SetWriteCursor(OriginalWriteCursor); -} - -void RCLSE::Run(FEXCore::IR::IREmitter* IREmit) { - FEXCORE_PROFILE_SCOPED("PassManager::RCLSE"); - RedundantStoreLoadElimination(IREmit); -} - -} // namespace - -namespace FEXCore::IR { - -fextl::unique_ptr CreateContextLoadStoreElimination(bool SupportsAVX256) { - return fextl::make_unique(SupportsAVX256); -} - -} // namespace FEXCore::IR diff --git a/docs/SourceOutline.md b/docs/SourceOutline.md index d04bc1653..094c1fe17 100644 --- a/docs/SourceOutline.md +++ b/docs/SourceOutline.md @@ -110,7 +110,6 @@ IR to IR Optimization - [PassManager.cpp](../FEXCore/Source/Interface/IR/PassManager.cpp): Defines which passes are run, and runs them - [PassManager.h](../FEXCore/Source/Interface/IR/PassManager.h) - [ConstProp.cpp](../FEXCore/Source/Interface/IR/Passes/ConstProp.cpp): ConstProp, ZExt elim, const pooling, fcmp reduction, const inlining -- [DeadContextStoreElimination.cpp](../FEXCore/Source/Interface/IR/Passes/DeadContextStoreElimination.cpp): Transforms ContextLoad/Store to temporaries, similar to mem2reg - [DeadStoreElimination.cpp](../FEXCore/Source/Interface/IR/Passes/DeadStoreElimination.cpp): Cross block store-after-store elimination - [IRValidation.cpp](../FEXCore/Source/Interface/IR/Passes/IRValidation.cpp): Sanity checking pass - [RedundantFlagCalculationElimination.cpp](../FEXCore/Source/Interface/IR/Passes/RedundantFlagCalculationElimination.cpp): This is not used right now, possibly broken From d78b0ea43543e82549dce83b86b1c462eecf529c Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Thu, 11 Jul 2024 13:14:13 -0400 Subject: [PATCH 12/12] InstCountCI: Update Signed-off-by: Alyssa Rosenzweig --- .../InstructionCountCI/AVX128/VEX_map1.json | 92 +- .../InstructionCountCI/AVX128/VEX_map2.json | 256 +- .../AVX128/VEX_map2_SVE128.json | 524 +- .../AVX128/VEX_map2_flagm.json | 12 +- .../InstructionCountCI/AVX128/VEX_map3.json | 112 +- .../AVX128/VEX_map_group.json | 80 +- .../FEXOpt/AddressingLimitations.json | 3 +- .../FEXOpt/AddressingLimitations_32Bit.json | 3 +- .../InstructionCountCI/FEXOpt/MultiInst.json | 207 +- .../InstructionCountCI/FEXOpt/libnss.json | 69 +- .../InstructionCountCI/FlagM/FlagOpts.json | 11 +- .../InstructionCountCI/FlagM/HotBlocks.json | 34 +- .../FlagM/HotBlocks_32Bit.json | 761 +- .../FlagM/HotBlocks_AFP.json | 8 +- .../InstructionCountCI/FlagM/Primary.json | 226 +- .../FlagM/PrimaryGroup.json | 164 +- .../FlagM/Primary_32Bit.json | 4 +- .../InstructionCountCI/FlagM/Secondary.json | 8 +- .../FlagM/SecondaryGroup.json | 220 +- .../InstructionCountCI/FlagM/VEX_map2.json | 12 +- .../FlagM/x87-HalfLife.json | 2005 +- .../FlagM/x87-Oblivion.json | 25501 +++++------ .../FlagM/x87-Psychonauts.json | 37865 +++++++--------- unittests/InstructionCountCI/FlagM/x87.json | 744 +- .../InstructionCountCI/FlagM/x87_f64.json | 746 +- unittests/InstructionCountCI/Primary.json | 381 +- .../InstructionCountCI/PrimaryGroup.json | 266 +- .../InstructionCountCI/Primary_32Bit.json | 12 +- .../InstructionCountCI/SecondaryGroup.json | 220 +- unittests/InstructionCountCI/VEX_map2.json | 12 +- unittests/InstructionCountCI/x87.json | 744 +- unittests/InstructionCountCI/x87_f64.json | 746 +- 32 files changed, 33244 insertions(+), 38804 deletions(-) diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1.json b/unittests/InstructionCountCI/AVX128/VEX_map1.json index 440abd6de..4f50fa13f 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map1.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map1.json @@ -1685,22 +1685,22 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "str q2, [x28, #32]", - "str q2, [x28, #48]", - "str q2, [x28, #64]", - "str q2, [x28, #80]", - "str q2, [x28, #96]", - "str q2, [x28, #112]", - "str q2, [x28, #128]", - "str q2, [x28, #144]", - "str q2, [x28, #160]", - "str q2, [x28, #176]", - "str q2, [x28, #192]", - "str q2, [x28, #208]", - "str q2, [x28, #224]", + "str q2, [x28, #256]", "str q2, [x28, #240]", - "str q2, [x28, #256]" + "str q2, [x28, #224]", + "str q2, [x28, #208]", + "str q2, [x28, #192]", + "str q2, [x28, #176]", + "str q2, [x28, #160]", + "str q2, [x28, #144]", + "str q2, [x28, #128]", + "str q2, [x28, #112]", + "str q2, [x28, #96]", + "str q2, [x28, #80]", + "str q2, [x28, #64]", + "str q2, [x28, #48]", + "str q2, [x28, #32]", + "str q2, [x28, #16]" ] }, "vzeroall": { @@ -1726,22 +1726,22 @@ "movi v29.2d, #0x0", "movi v30.2d, #0x0", "movi v31.2d, #0x0", - "str q31, [x28, #16]", - "str q31, [x28, #32]", - "str q31, [x28, #48]", - "str q31, [x28, #64]", - "str q31, [x28, #80]", - "str q31, [x28, #96]", - "str q31, [x28, #112]", - "str q31, [x28, #128]", - "str q31, [x28, #144]", - "str q31, [x28, #160]", - "str q31, [x28, #176]", - "str q31, [x28, #192]", - "str q31, [x28, #208]", - "str q31, [x28, #224]", + "str q31, [x28, #256]", "str q31, [x28, #240]", - "str q31, [x28, #256]" + "str q31, [x28, #224]", + "str q31, [x28, #208]", + "str q31, [x28, #192]", + "str q31, [x28, #176]", + "str q31, [x28, #160]", + "str q31, [x28, #144]", + "str q31, [x28, #128]", + "str q31, [x28, #112]", + "str q31, [x28, #96]", + "str q31, [x28, #80]", + "str q31, [x28, #64]", + "str q31, [x28, #48]", + "str q31, [x28, #32]", + "str q31, [x28, #16]" ] }, "vcmpps xmm0, xmm1, xmm2, 0x00": { @@ -2692,8 +2692,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vmovaps ymm0, ymm1": { @@ -2703,8 +2703,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vmovapd xmm0, [rax]": { @@ -2736,8 +2736,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vmovapd ymm0, ymm1": { @@ -2747,8 +2747,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vmovaps [rax], xmm0": { @@ -3473,8 +3473,8 @@ "fcsel s0, s17, s18, mi", "mov v16.s[0], v0.s[0]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vminsd xmm0, xmm1, xmm2": { @@ -3489,8 +3489,8 @@ "fcsel d0, d17, d18, mi", "mov v16.d[0], v0.d[0]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vdivps xmm0, xmm1, xmm2": { @@ -3693,8 +3693,8 @@ "fcsel s0, s18, s17, mi", "mov v16.s[0], v0.s[0]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vmaxsd xmm0, xmm1, xmm2": { @@ -3709,8 +3709,8 @@ "fcsel d0, d18, d17, mi", "mov v16.d[0], v0.d[0]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vpunpckhbw xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2.json b/unittests/InstructionCountCI/AVX128/VEX_map2.json index c42b01322..92d719caa 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2.json @@ -2577,8 +2577,8 @@ "add x1, x4, w0, sxtw", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*2 + rax], xmm2": { @@ -2608,8 +2608,8 @@ "add x1, x4, w0, sxtw #1", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*4 + rax], xmm2": { @@ -2639,8 +2639,8 @@ "add x1, x4, w0, sxtw #2", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*8 + rax], xmm2": { @@ -2670,8 +2670,8 @@ "add x1, x4, w0, sxtw #3", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*1 + rax], ymm2": { @@ -2723,9 +2723,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*2 + rax], ymm2": { @@ -2777,9 +2777,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #1", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*4 + rax], ymm2": { @@ -2831,9 +2831,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #2", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*8 + rax], ymm2": { @@ -2885,9 +2885,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #3", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*1 + rax], xmm2": { @@ -2907,8 +2907,8 @@ "add x1, x4, w0, sxtw", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*2 + rax], xmm2": { @@ -2928,8 +2928,8 @@ "add x1, x4, w0, sxtw #1", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*4 + rax], xmm2": { @@ -2949,8 +2949,8 @@ "add x1, x4, w0, sxtw #2", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*8 + rax], xmm2": { @@ -2970,8 +2970,8 @@ "add x1, x4, w0, sxtw #3", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*1 + rax], ymm2": { @@ -3002,9 +3002,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*2 + rax], ymm2": { @@ -3035,9 +3035,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #1", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*4 + rax], ymm2": { @@ -3068,9 +3068,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #2", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*8 + rax], ymm2": { @@ -3101,9 +3101,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #3", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*1 + rax], xmm2": { @@ -3125,8 +3125,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*2 + rax], xmm2": { @@ -3148,8 +3148,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*4 + rax], xmm2": { @@ -3171,8 +3171,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*8 + rax], xmm2": { @@ -3194,8 +3194,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*1 + rax], xmm2": { @@ -3226,8 +3226,8 @@ "add x1, x4, x0", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*2 + rax], xmm2": { @@ -3258,8 +3258,8 @@ "add x1, x4, x0, lsl #1", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*4 + rax], xmm2": { @@ -3290,8 +3290,8 @@ "add x1, x4, x0, lsl #2", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*8 + rax], xmm2": { @@ -3322,8 +3322,8 @@ "add x1, x4, x0, lsl #3", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*1 + rax], xmm2": { @@ -3343,8 +3343,8 @@ "add x1, x4, x0", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*2 + rax], xmm2": { @@ -3364,8 +3364,8 @@ "add x1, x4, x0, lsl #1", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*4 + rax], xmm2": { @@ -3385,8 +3385,8 @@ "add x1, x4, x0, lsl #2", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*8 + rax], xmm2": { @@ -3406,8 +3406,8 @@ "add x1, x4, x0, lsl #3", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*1 + rax], ymm2": { @@ -3439,9 +3439,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*2 + rax], ymm2": { @@ -3473,9 +3473,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #1", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*4 + rax], ymm2": { @@ -3507,9 +3507,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #2", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*8 + rax], ymm2": { @@ -3541,9 +3541,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #3", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*1 + rax], xmm2": { @@ -3573,8 +3573,8 @@ "add x1, x4, w0, sxtw", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*2 + rax], xmm2": { @@ -3604,8 +3604,8 @@ "add x1, x4, w0, sxtw #1", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*4 + rax], xmm2": { @@ -3635,8 +3635,8 @@ "add x1, x4, w0, sxtw #2", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*8 + rax], xmm2": { @@ -3666,8 +3666,8 @@ "add x1, x4, w0, sxtw #3", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*1 + rax], ymm2": { @@ -3719,9 +3719,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*2 + rax], ymm2": { @@ -3773,9 +3773,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #1", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*4 + rax], ymm2": { @@ -3827,9 +3827,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #2", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*8 + rax], ymm2": { @@ -3881,9 +3881,9 @@ "smov x0, v3.s[3]", "add x1, x4, w0, sxtw #3", "ld1 {v2.s}[3], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*1 + rax], xmm2": { @@ -3903,8 +3903,8 @@ "add x1, x4, w0, sxtw", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*2 + rax], xmm2": { @@ -3924,8 +3924,8 @@ "add x1, x4, w0, sxtw #1", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*4 + rax], xmm2": { @@ -3945,8 +3945,8 @@ "add x1, x4, w0, sxtw #2", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*8 + rax], xmm2": { @@ -3966,8 +3966,8 @@ "add x1, x4, w0, sxtw #3", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*1 + rax], ymm2": { @@ -3998,9 +3998,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*2 + rax], ymm2": { @@ -4031,9 +4031,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #1", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*4 + rax], ymm2": { @@ -4064,9 +4064,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #2", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*8 + rax], ymm2": { @@ -4097,9 +4097,9 @@ "smov x0, v17.s[3]", "add x1, x4, w0, sxtw #3", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*1 + rax], xmm2": { @@ -4121,8 +4121,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*2 + rax], xmm2": { @@ -4144,8 +4144,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*4 + rax], xmm2": { @@ -4167,8 +4167,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*8 + rax], xmm2": { @@ -4190,8 +4190,8 @@ "ld1 {v2.s}[1], [x1]", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*1 + rax], xmm2": { @@ -4222,8 +4222,8 @@ "add x1, x4, x0", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*2 + rax], xmm2": { @@ -4254,8 +4254,8 @@ "add x1, x4, x0, lsl #1", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*4 + rax], xmm2": { @@ -4286,8 +4286,8 @@ "add x1, x4, x0, lsl #2", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*8 + rax], xmm2": { @@ -4318,8 +4318,8 @@ "add x1, x4, x0, lsl #3", "ld1 {v16.s}[3], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*1 + rax], xmm2": { @@ -4339,8 +4339,8 @@ "add x1, x4, x0", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*2 + rax], xmm2": { @@ -4360,8 +4360,8 @@ "add x1, x4, x0, lsl #1", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*4 + rax], xmm2": { @@ -4381,8 +4381,8 @@ "add x1, x4, x0, lsl #2", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*8 + rax], xmm2": { @@ -4402,8 +4402,8 @@ "add x1, x4, x0, lsl #3", "ld1 {v16.d}[1], [x1]", "movi v18.2d, #0x0", - "str q18, [x28, #16]", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q18, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*1 + rax], ymm2": { @@ -4435,9 +4435,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*2 + rax], ymm2": { @@ -4469,9 +4469,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #1", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*4 + rax], ymm2": { @@ -4503,9 +4503,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #2", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*8 + rax], ymm2": { @@ -4537,9 +4537,9 @@ "mov x0, v3.d[1]", "add x1, x4, x0, lsl #3", "ld1 {v2.d}[1], [x1]", - "str q2, [x28, #16]", "movi v18.2d, #0x0", - "str q18, [x28, #48]" + "str q18, [x28, #48]", + "str q2, [x28, #16]" ] }, "vfmaddsub132ps xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json index 16e21efab..e0b59443c 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json @@ -22,8 +22,8 @@ "cmplt p0.s, p6/z, z17.s, #0", "ld1w {z16.s}, p0/z, [x4]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vmaskmovps ymm0, ymm1, [rax]": { @@ -39,8 +39,8 @@ "add x21, x4, #0x10 (16)", "cmplt p0.s, p6/z, z2.s, #0", "ld1w {z2.s}, p0/z, [x21]", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vmaskmovpd xmm0, xmm1, [rax]": { @@ -53,8 +53,8 @@ "cmplt p0.d, p6/z, z17.d, #0", "ld1d {z16.d}, p0/z, [x4]", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vmaskmovpd ymm0, ymm1, [rax]": { @@ -70,8 +70,8 @@ "add x21, x4, #0x10 (16)", "cmplt p0.d, p6/z, z2.d, #0", "ld1d {z2.d}, p0/z, [x21]", - "str q2, [x28, #16]", - "msr nzcv, x20" + "msr nzcv, x20", + "str q2, [x28, #16]" ] }, "vmaskmovps [rax], xmm0, xmm1": { @@ -143,9 +143,9 @@ "ld1w {z0.s}, p0/z, [x4, z17.s, sxtw]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*2 + rax], xmm2": { @@ -165,9 +165,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*4 + rax], xmm2": { @@ -181,9 +181,9 @@ "ld1w {z0.s}, p0/z, [x4, z17.s, sxtw #2]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*8 + rax], xmm2": { @@ -203,9 +203,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*1 + rax], ymm2": { @@ -224,10 +224,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [x4, z3.s, sxtw]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*2 + rax], ymm2": { @@ -259,9 +259,9 @@ "ld1w {z1.d}, p1/z, [x4, z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*4 + rax], ymm2": { @@ -280,10 +280,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [x4, z3.s, sxtw #2]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*8 + rax], ymm2": { @@ -315,9 +315,9 @@ "ld1w {z1.d}, p1/z, [x4, z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*1 + rax], xmm2": { @@ -332,9 +332,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*2 + rax], xmm2": { @@ -349,9 +349,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*4 + rax], xmm2": { @@ -366,9 +366,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*8 + rax], xmm2": { @@ -383,9 +383,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*1 + rax], ymm2": { @@ -405,10 +405,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*2 + rax], ymm2": { @@ -428,10 +428,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*4 + rax], ymm2": { @@ -451,10 +451,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*8 + rax], ymm2": { @@ -474,10 +474,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*1 + rax], xmm2": { @@ -494,9 +494,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*2 + rax], xmm2": { @@ -514,9 +514,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*4 + rax], xmm2": { @@ -533,9 +533,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*8 + rax], xmm2": { @@ -553,9 +553,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*1 + rax], xmm2": { @@ -574,9 +574,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*2 + rax], xmm2": { @@ -597,9 +597,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*4 + rax], xmm2": { @@ -618,9 +618,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*8 + rax], xmm2": { @@ -641,9 +641,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*1 + rax], xmm2": { @@ -657,9 +657,9 @@ "ld1d {z0.d}, p0/z, [x4, z17.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*2 + rax], xmm2": { @@ -674,9 +674,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*4 + rax], xmm2": { @@ -691,9 +691,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*8 + rax], xmm2": { @@ -707,9 +707,9 @@ "ld1d {z0.d}, p0/z, [x4, z17.d, lsl #3]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*1 + rax], ymm2": { @@ -728,10 +728,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*2 + rax], ymm2": { @@ -752,10 +752,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*4 + rax], ymm2": { @@ -776,10 +776,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*8 + rax], ymm2": { @@ -798,10 +798,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d, lsl #3]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*1 + rax], xmm2": { @@ -815,9 +815,9 @@ "ld1w {z0.s}, p0/z, [x4, z17.s, sxtw]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*2 + rax], xmm2": { @@ -837,9 +837,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*4 + rax], xmm2": { @@ -853,9 +853,9 @@ "ld1w {z0.s}, p0/z, [x4, z17.s, sxtw #2]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*8 + rax], xmm2": { @@ -875,9 +875,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*1 + rax], ymm2": { @@ -896,10 +896,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [x4, z3.s, sxtw]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*2 + rax], ymm2": { @@ -931,9 +931,9 @@ "ld1w {z1.d}, p1/z, [x4, z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*4 + rax], ymm2": { @@ -952,10 +952,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [x4, z3.s, sxtw #2]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*8 + rax], ymm2": { @@ -987,9 +987,9 @@ "ld1w {z1.d}, p1/z, [x4, z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*1 + rax], xmm2": { @@ -1004,9 +1004,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*2 + rax], xmm2": { @@ -1021,9 +1021,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*4 + rax], xmm2": { @@ -1038,9 +1038,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*8 + rax], xmm2": { @@ -1055,9 +1055,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*1 + rax], ymm2": { @@ -1077,10 +1077,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*2 + rax], ymm2": { @@ -1100,10 +1100,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*4 + rax], ymm2": { @@ -1123,10 +1123,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*8 + rax], ymm2": { @@ -1146,10 +1146,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [x4, z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*1 + rax], xmm2": { @@ -1166,9 +1166,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*2 + rax], xmm2": { @@ -1186,9 +1186,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*4 + rax], xmm2": { @@ -1205,9 +1205,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*8 + rax], xmm2": { @@ -1225,9 +1225,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*1 + rax], xmm2": { @@ -1246,9 +1246,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*2 + rax], xmm2": { @@ -1269,9 +1269,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*4 + rax], xmm2": { @@ -1290,9 +1290,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*8 + rax], xmm2": { @@ -1313,9 +1313,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*1 + rax], xmm2": { @@ -1329,9 +1329,9 @@ "ld1d {z0.d}, p0/z, [x4, z17.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*2 + rax], xmm2": { @@ -1346,9 +1346,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*4 + rax], xmm2": { @@ -1363,9 +1363,9 @@ "ld1d {z0.d}, p0/z, [x4, z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*8 + rax], xmm2": { @@ -1379,9 +1379,9 @@ "ld1d {z0.d}, p0/z, [x4, z17.d, lsl #3]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*1 + rax], ymm2": { @@ -1400,10 +1400,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*2 + rax], ymm2": { @@ -1424,10 +1424,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*4 + rax], ymm2": { @@ -1448,10 +1448,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*8 + rax], ymm2": { @@ -1470,10 +1470,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [x4, z3.d, lsl #3]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*2], xmm2": { @@ -1493,9 +1493,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*4], xmm2": { @@ -1510,9 +1510,9 @@ "ld1w {z0.s}, p0/z, [x0, z17.s, sxtw #2]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd xmm0, [xmm1*8], xmm2": { @@ -1532,9 +1532,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*1], ymm2": { @@ -1553,10 +1553,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [z3.s]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*2], ymm2": { @@ -1588,9 +1588,9 @@ "ld1w {z1.d}, p1/z, [z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*4], ymm2": { @@ -1611,10 +1611,10 @@ "mov w0, #0x0", "ld1w {z0.s}, p0/z, [x0, z3.s, sxtw #2]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdd ymm0, [ymm1*8], ymm2": { @@ -1646,9 +1646,9 @@ "ld1w {z1.d}, p1/z, [z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*1], xmm2": { @@ -1663,9 +1663,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*2], xmm2": { @@ -1680,9 +1680,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*4], xmm2": { @@ -1697,9 +1697,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq xmm0, [xmm1*8], xmm2": { @@ -1714,9 +1714,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*1], ymm2": { @@ -1736,10 +1736,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*2], ymm2": { @@ -1759,10 +1759,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*4], ymm2": { @@ -1782,10 +1782,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherdq ymm0, [xmm1*8], ymm2": { @@ -1805,10 +1805,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*1], xmm2": { @@ -1825,9 +1825,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*2], xmm2": { @@ -1845,9 +1845,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*4], xmm2": { @@ -1865,9 +1865,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [xmm1*8], xmm2": { @@ -1885,9 +1885,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*1], xmm2": { @@ -1906,9 +1906,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*2], xmm2": { @@ -1929,9 +1929,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*4], xmm2": { @@ -1952,9 +1952,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqd xmm0, [ymm1*8], xmm2": { @@ -1975,9 +1975,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*1], xmm2": { @@ -1991,9 +1991,9 @@ "ld1d {z0.d}, p0/z, [z17.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*2], xmm2": { @@ -2008,9 +2008,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*4], xmm2": { @@ -2025,9 +2025,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq xmm0, [xmm1*8], xmm2": { @@ -2042,9 +2042,9 @@ "ld1d {z0.d}, p0/z, [x0, z17.d, lsl #3]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*1], ymm2": { @@ -2063,10 +2063,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*2], ymm2": { @@ -2087,10 +2087,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*4], ymm2": { @@ -2111,10 +2111,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vpgatherqq ymm0, [ymm1*8], ymm2": { @@ -2135,10 +2135,10 @@ "mov w0, #0x0", "ld1d {z0.d}, p0/z, [x0, z3.d, lsl #3]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*1], xmm2": { @@ -2152,9 +2152,9 @@ "ld1w {z0.s}, p0/z, [z17.s]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*2], xmm2": { @@ -2174,9 +2174,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*4], xmm2": { @@ -2191,9 +2191,9 @@ "ld1w {z0.s}, p0/z, [x0, z17.s, sxtw #2]", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps xmm0, [xmm1*8], xmm2": { @@ -2213,9 +2213,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*1], ymm2": { @@ -2234,10 +2234,10 @@ "cmplt p0.s, p6/z, z4.s, #0", "ld1w {z0.s}, p0/z, [z3.s]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*2], ymm2": { @@ -2269,9 +2269,9 @@ "ld1w {z1.d}, p1/z, [z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*4], ymm2": { @@ -2292,10 +2292,10 @@ "mov w0, #0x0", "ld1w {z0.s}, p0/z, [x0, z3.s, sxtw #2]", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdps ymm0, [ymm1*8], ymm2": { @@ -2327,9 +2327,9 @@ "ld1w {z1.d}, p1/z, [z7.d]", "uzp1 v0.4s, v0.4s, v1.4s", "mov z2.s, p0/m, z0.s", - "str q2, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*1], xmm2": { @@ -2344,9 +2344,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*2], xmm2": { @@ -2361,9 +2361,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*4], xmm2": { @@ -2378,9 +2378,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd xmm0, [xmm1*8], xmm2": { @@ -2395,9 +2395,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*1], ymm2": { @@ -2417,10 +2417,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*2], ymm2": { @@ -2440,10 +2440,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*4], ymm2": { @@ -2463,10 +2463,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherdpd ymm0, [xmm1*8], ymm2": { @@ -2486,10 +2486,10 @@ "cmplt p0.d, p6/z, z3.d, #0", "ld1d {z0.d}, p0/z, [z4.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*1], xmm2": { @@ -2506,9 +2506,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*2], xmm2": { @@ -2526,9 +2526,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*4], xmm2": { @@ -2546,9 +2546,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [xmm1*8], xmm2": { @@ -2566,9 +2566,9 @@ "sel z2.s, p0, z0.s, z16.s", "movi v18.2d, #0x0", "zip1 v16.2d, v2.2d, v18.2d", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*1], xmm2": { @@ -2587,9 +2587,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*2], xmm2": { @@ -2610,9 +2610,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*4], xmm2": { @@ -2633,9 +2633,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqps xmm0, [ymm1*8], xmm2": { @@ -2656,9 +2656,9 @@ "uzp1 v0.4s, v0.4s, v1.4s", "mov z16.s, p0/m, z0.s", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*1], xmm2": { @@ -2672,9 +2672,9 @@ "ld1d {z0.d}, p0/z, [z17.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*2], xmm2": { @@ -2689,9 +2689,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*4], xmm2": { @@ -2706,9 +2706,9 @@ "ld1d {z0.d}, p0/z, [z2.d]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd xmm0, [xmm1*8], xmm2": { @@ -2723,9 +2723,9 @@ "ld1d {z0.d}, p0/z, [x0, z17.d, lsl #3]", "mov z16.d, p0/m, z0.d", "movi v18.2d, #0x0", - "str q18, [x28, #16]", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q18, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*1], ymm2": { @@ -2744,10 +2744,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*2], ymm2": { @@ -2768,10 +2768,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*4], ymm2": { @@ -2792,10 +2792,10 @@ "cmplt p0.d, p6/z, z4.d, #0", "ld1d {z0.d}, p0/z, [z3.d]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vgatherqpd ymm0, [ymm1*8], ymm2": { @@ -2816,10 +2816,10 @@ "mov w0, #0x0", "ld1d {z0.d}, p0/z, [x0, z3.d, lsl #3]", "mov z2.d, p0/m, z0.d", - "str q2, [x28, #16]", "movi v18.2d, #0x0", + "msr nzcv, x20", "str q18, [x28, #48]", - "msr nzcv, x20" + "str q2, [x28, #16]" ] }, "vfmaddsub132ps xmm0, xmm1, xmm2": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json index e6ef56fde..de518eeb5 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json @@ -620,9 +620,9 @@ "Map 2 0b00 0xf2 32-bit" ], "ExpectedArm64ASM": [ - "bic w4, w5, w7", - "mov x26, x4", - "tst w4, w4" + "bic w26, w5, w7", + "tst w26, w26", + "mov x4, x26" ] }, "andn rax, rbx, rcx": { @@ -631,9 +631,9 @@ "Map 2 0b00 0xf2 64-bit" ], "ExpectedArm64ASM": [ - "bic x4, x5, x7", - "mov x26, x4", - "tst x4, x4" + "bic x26, x5, x7", + "tst x26, x26", + "mov x4, x26" ] }, "bzhi eax, ebx, ecx": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3.json b/unittests/InstructionCountCI/AVX128/VEX_map3.json index d09ab77f6..312546957 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map3.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map3.json @@ -927,8 +927,8 @@ "Map 3 0b01 0x06 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q17, [x28, #16]" + "str q17, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00000001b": { @@ -947,8 +947,8 @@ "Map 3 0b01 0x06 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v18.16b", - "str q17, [x28, #16]" + "str q17, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00000011b": { @@ -968,8 +968,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00010001b": { @@ -989,8 +989,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00010011b": { @@ -1010,8 +1010,8 @@ "Map 3 0b01 0x06 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00100001b": { @@ -1030,8 +1030,8 @@ "Map 3 0b01 0x06 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v18.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00100011b": { @@ -1051,8 +1051,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #48]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00110001b": { @@ -1073,8 +1073,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #48]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 00110011b": { @@ -1146,8 +1146,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 10000001b": { @@ -1168,8 +1168,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2f128 ymm0, ymm1, ymm2, 10000011b": { @@ -2166,8 +2166,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vpalignr xmm0, xmm1, xmm2, 1": { @@ -2211,8 +2211,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #48]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vpalignr ymm0, ymm1, ymm2, 1": { @@ -2389,8 +2389,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vinsertf128 ymm0, ymm1, xmm2, 1": { @@ -2399,8 +2399,8 @@ "Map 3 0b01 0x18 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vextractf128 xmm0, ymm1, 0": { @@ -2410,8 +2410,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vextractf128 xmm0, ymm1, 1": { @@ -2732,8 +2732,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vinserti128 ymm0, ymm1, xmm2, 1": { @@ -2742,8 +2742,8 @@ "Map 3 0b01 0x38 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vextracti128 xmm0, ymm1, 0": { @@ -2753,8 +2753,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vextracti128 xmm0, ymm1, 1": { @@ -3516,8 +3516,8 @@ "Map 3 0b01 0x46 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q17, [x28, #16]" + "str q17, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00000001b": { @@ -3536,8 +3536,8 @@ "Map 3 0b01 0x46 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v18.16b", - "str q17, [x28, #16]" + "str q17, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00000011b": { @@ -3557,8 +3557,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00010001b": { @@ -3578,8 +3578,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00010011b": { @@ -3599,8 +3599,8 @@ "Map 3 0b01 0x46 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v17.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00100001b": { @@ -3619,8 +3619,8 @@ "Map 3 0b01 0x46 256-bit" ], "ExpectedArm64ASM": [ - "mov v16.16b, v18.16b", - "str q18, [x28, #16]" + "str q18, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00100011b": { @@ -3640,8 +3640,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #48]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00110001b": { @@ -3662,8 +3662,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #48]", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 00110011b": { @@ -3735,8 +3735,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 10000001b": { @@ -3757,8 +3757,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v18.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v18.16b" ] }, "vperm2i128 ymm0, ymm1, ymm2, 10000011b": { diff --git a/unittests/InstructionCountCI/AVX128/VEX_map_group.json b/unittests/InstructionCountCI/AVX128/VEX_map_group.json index 912d60747..cd54b224e 100644 --- a/unittests/InstructionCountCI/AVX128/VEX_map_group.json +++ b/unittests/InstructionCountCI/AVX128/VEX_map_group.json @@ -18,8 +18,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrlw xmm0, xmm1, 15": { @@ -51,8 +51,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrlw ymm0, ymm1, 15": { @@ -86,8 +86,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsraw xmm0, xmm1, 15": { @@ -119,8 +119,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsraw ymm0, ymm1, 15": { @@ -154,8 +154,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsllw xmm0, xmm1, 15": { @@ -187,8 +187,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsllw ymm0, ymm1, 15": { @@ -222,8 +222,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrld xmm0, xmm1, 31": { @@ -255,8 +255,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrld ymm0, ymm1, 31": { @@ -290,8 +290,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrad xmm0, xmm1, 31": { @@ -323,8 +323,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrad ymm0, ymm1, 31": { @@ -358,8 +358,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpslld xmm0, xmm1, 31": { @@ -391,8 +391,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpslld ymm0, ymm1, 31": { @@ -426,8 +426,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrlq xmm0, xmm1, 63": { @@ -459,8 +459,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrlq ymm0, ymm1, 63": { @@ -494,8 +494,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrldq xmm0, xmm1, 15": { @@ -526,8 +526,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsrldq ymm0, ymm1, 15": { @@ -559,8 +559,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsllq xmm0, xmm1, 63": { @@ -592,8 +592,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpsllq ymm0, ymm1, 63": { @@ -627,8 +627,8 @@ ], "ExpectedArm64ASM": [ "movi v2.2d, #0x0", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpslldq xmm0, xmm1, 15": { @@ -659,8 +659,8 @@ ], "ExpectedArm64ASM": [ "ldr q2, [x28, #32]", - "mov v16.16b, v17.16b", - "str q2, [x28, #16]" + "str q2, [x28, #16]", + "mov v16.16b, v17.16b" ] }, "vpslldq ymm0, ymm1, 15": { diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json index 8b4034290..8c0f0fef9 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json @@ -1045,10 +1045,11 @@ "mov rax, gs:0x100", "mov rbx, gs:0x14" ], - "ExpectedInstructionCount": 3, + "ExpectedInstructionCount": 4, "ExpectedArm64ASM": [ "ldr x20, [x28, #960]", "ldr x4, [x20, #256]", + "ldr x20, [x28, #960]", "ldur x7, [x20, #20]" ] } diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json index db3262752..c6f2a1f51 100644 --- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json +++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json @@ -323,10 +323,11 @@ "mov eax, gs:0x100", "mov ebx, gs:0x14" ], - "ExpectedInstructionCount": 3, + "ExpectedInstructionCount": 4, "ExpectedArm64ASM": [ "ldr w20, [x28, #960]", "ldr w4, [x20, #256]", + "ldr w20, [x28, #960]", "ldr w7, [x20, #20]" ] } diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json index 8943ec5e8..69f3bd7d8 100644 --- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json +++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json @@ -69,11 +69,11 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x1", - "strb w20, [x28, #986]", - "ldrb w20, [x10]", - "strb w20, [x11]", + "ldrb w21, [x10]", + "strb w21, [x11]", "add x10, x10, #0x1 (1)", - "add x11, x11, #0x1 (1)" + "add x11, x11, #0x1 (1)", + "strb w20, [x28, #986]" ] }, "positive movsw": { @@ -88,11 +88,11 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x1", - "strb w20, [x28, #986]", - "ldrh w20, [x10]", - "strh w20, [x11]", + "ldrh w21, [x10]", + "strh w21, [x11]", "add x10, x10, #0x2 (2)", - "add x11, x11, #0x2 (2)" + "add x11, x11, #0x2 (2)", + "strb w20, [x28, #986]" ] }, "positive movsd": { @@ -107,11 +107,11 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x1", - "strb w20, [x28, #986]", - "ldr w20, [x10]", - "str w20, [x11]", + "ldr w21, [x10]", + "str w21, [x11]", "add x10, x10, #0x4 (4)", - "add x11, x11, #0x4 (4)" + "add x11, x11, #0x4 (4)", + "strb w20, [x28, #986]" ] }, "positive movsq": { @@ -126,11 +126,11 @@ ], "ExpectedArm64ASM": [ "mov w20, #0x1", - "strb w20, [x28, #986]", - "ldr x20, [x10]", - "str x20, [x11]", + "ldr x21, [x10]", + "str x21, [x11]", "add x10, x10, #0x8 (8)", - "add x11, x11, #0x8 (8)" + "add x11, x11, #0x8 (8)", + "strb w20, [x28, #986]" ] }, "negative movsb": { @@ -145,11 +145,11 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "ldrb w20, [x10]", - "strb w20, [x11]", + "ldrb w21, [x10]", + "strb w21, [x11]", "sub x10, x10, #0x1 (1)", - "sub x11, x11, #0x1 (1)" + "sub x11, x11, #0x1 (1)", + "strb w20, [x28, #986]" ] }, "negative movsw": { @@ -164,11 +164,11 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "ldrh w20, [x10]", - "strh w20, [x11]", + "ldrh w21, [x10]", + "strh w21, [x11]", "sub x10, x10, #0x2 (2)", - "sub x11, x11, #0x2 (2)" + "sub x11, x11, #0x2 (2)", + "strb w20, [x28, #986]" ] }, "negative movsd": { @@ -183,11 +183,11 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "ldr w20, [x10]", - "str w20, [x11]", + "ldr w21, [x10]", + "str w21, [x11]", "sub x10, x10, #0x4 (4)", - "sub x11, x11, #0x4 (4)" + "sub x11, x11, #0x4 (4)", + "strb w20, [x28, #986]" ] }, "negative movsq": { @@ -202,11 +202,11 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "ldr x20, [x10]", - "str x20, [x11]", + "ldr x21, [x10]", + "str x21, [x11]", "sub x10, x10, #0x8 (8)", - "sub x11, x11, #0x8 (8)" + "sub x11, x11, #0x8 (8)", + "strb w20, [x28, #986]" ] }, "positive rep movsb": { @@ -222,7 +222,6 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -263,6 +262,7 @@ "add x23, x1, x2", "mov x10, x23", "mov x11, x22", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -279,7 +279,6 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -320,6 +319,7 @@ "add x23, x1, x2, lsl #1", "mov x10, x23", "mov x11, x22", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -336,7 +336,6 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -377,6 +376,7 @@ "add x23, x1, x2, lsl #2", "mov x10, x23", "mov x11, x22", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -393,7 +393,6 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -434,6 +433,7 @@ "add x23, x1, x2, lsl #3", "mov x10, x23", "mov x11, x22", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -449,7 +449,6 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -490,11 +489,12 @@ "mov x0, x11", "mov x1, x10", "mov x2, x5", - "sub x20, x0, x2", - "sub x21, x1, x2", - "mov x10, x21", - "mov x11, x20", - "mov w5, #0x0" + "sub x22, x0, x2", + "sub x23, x1, x2", + "mov x10, x23", + "mov x11, x22", + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep movsw": { @@ -509,7 +509,6 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -550,11 +549,12 @@ "mov x0, x11", "mov x1, x10", "mov x2, x5", - "sub x20, x0, x2, lsl #1", - "sub x21, x1, x2, lsl #1", - "mov x10, x21", - "mov x11, x20", - "mov w5, #0x0" + "sub x22, x0, x2, lsl #1", + "sub x23, x1, x2, lsl #1", + "mov x10, x23", + "mov x11, x22", + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep movsd": { @@ -569,7 +569,6 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -610,11 +609,12 @@ "mov x0, x11", "mov x1, x10", "mov x2, x5", - "sub x20, x0, x2, lsl #2", - "sub x21, x1, x2, lsl #2", - "mov x10, x21", - "mov x11, x20", - "mov w5, #0x0" + "sub x22, x0, x2, lsl #2", + "sub x23, x1, x2, lsl #2", + "mov x10, x23", + "mov x11, x22", + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep movsq": { @@ -629,7 +629,6 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", "mov x0, x5", "mov x1, x11", "mov x2, x10", @@ -670,11 +669,12 @@ "mov x0, x11", "mov x1, x10", "mov x2, x5", - "sub x20, x0, x2, lsl #3", - "sub x21, x1, x2, lsl #3", - "mov x10, x21", - "mov x11, x20", - "mov w5, #0x0" + "sub x22, x0, x2, lsl #3", + "sub x23, x1, x2, lsl #3", + "mov x10, x23", + "mov x11, x22", + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "positive rep stosb": { @@ -690,14 +690,13 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", - "uxtb w21, w4", + "uxtb w22, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x58", "sub x0, x0, #0x20 (32)", "tbnz x0, #63, #+0x3c", - "dup v1.16b, w21", + "dup v1.16b, w22", "sub x0, x0, #0x20 (32)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #32", @@ -713,10 +712,11 @@ "tbz x0, #63, #-0x8", "add x0, x0, #0x20 (32)", "cbz x0, #+0x10", - "strb w21, [x1], #1", + "strb w22, [x1], #1", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "add x11, x11, x5", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -733,14 +733,13 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", - "uxth w21, w4", + "uxth w22, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x58", "sub x0, x0, #0x10 (16)", "tbnz x0, #63, #+0x3c", - "dup v1.8h, w21", + "dup v1.8h, w22", "sub x0, x0, #0x10 (16)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #32", @@ -756,10 +755,11 @@ "tbz x0, #63, #-0x8", "add x0, x0, #0x10 (16)", "cbz x0, #+0x10", - "strh w21, [x1], #2", + "strh w22, [x1], #2", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "add x11, x11, x5, lsl #1", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -776,14 +776,13 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", - "mov w21, w4", + "mov w22, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x58", "sub x0, x0, #0x8 (8)", "tbnz x0, #63, #+0x3c", - "dup v1.4s, w21", + "dup v1.4s, w22", "sub x0, x0, #0x8 (8)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #32", @@ -799,10 +798,11 @@ "tbz x0, #63, #-0x8", "add x0, x0, #0x8 (8)", "cbz x0, #+0x10", - "str w21, [x1], #4", + "str w22, [x1], #4", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "add x11, x11, x5, lsl #2", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -819,7 +819,6 @@ "ExpectedArm64ASM": [ "mov w20, #0x0", "mov w21, #0x1", - "strb w21, [x28, #986]", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x58", @@ -845,6 +844,7 @@ "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "add x11, x11, x5, lsl #3", + "strb w21, [x28, #986]", "mov x5, x20" ] }, @@ -860,15 +860,14 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "uxtb w20, w4", + "uxtb w21, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x60", "sub x1, x1, #0x1f (31)", "sub x0, x0, #0x20 (32)", "tbnz x0, #63, #+0x3c", - "dup v1.16b, w20", + "dup v1.16b, w21", "sub x0, x0, #0x20 (32)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #-32", @@ -885,11 +884,12 @@ "add x0, x0, #0x20 (32)", "cbz x0, #+0x14", "add x1, x1, #0x1f (31)", - "strb w20, [x1], #-1", + "strb w21, [x1], #-1", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "sub x11, x11, x5", - "mov w5, #0x0" + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep stosw": { @@ -904,15 +904,14 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "uxth w20, w4", + "uxth w21, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x60", "sub x1, x1, #0x1e (30)", "sub x0, x0, #0x10 (16)", "tbnz x0, #63, #+0x3c", - "dup v1.8h, w20", + "dup v1.8h, w21", "sub x0, x0, #0x10 (16)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #-32", @@ -929,11 +928,12 @@ "add x0, x0, #0x10 (16)", "cbz x0, #+0x14", "add x1, x1, #0x1e (30)", - "strh w20, [x1], #-2", + "strh w21, [x1], #-2", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "sub x11, x11, x5, lsl #1", - "mov w5, #0x0" + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep stosd": { @@ -948,15 +948,14 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", - "mov w20, w4", + "mov w21, w4", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x60", "sub x1, x1, #0x1c (28)", "sub x0, x0, #0x8 (8)", "tbnz x0, #63, #+0x3c", - "dup v1.4s, w20", + "dup v1.4s, w21", "sub x0, x0, #0x8 (8)", "tbnz x0, #63, #+0x14", "stp q1, q1, [x1], #-32", @@ -973,11 +972,12 @@ "add x0, x0, #0x8 (8)", "cbz x0, #+0x14", "add x1, x1, #0x1c (28)", - "str w20, [x1], #-4", + "str w21, [x1], #-4", "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "sub x11, x11, x5, lsl #2", - "mov w5, #0x0" + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "negative rep stosq": { @@ -992,7 +992,6 @@ ], "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffffff", - "strb w20, [x28, #986]", "mov x0, x5", "mov x1, x11", "cbz x0, #+0x60", @@ -1020,11 +1019,12 @@ "sub x0, x0, #0x1 (1)", "cbnz x0, #-0x8", "sub x11, x11, x5, lsl #3", - "mov w5, #0x0" + "mov w5, #0x0", + "strb w20, [x28, #986]" ] }, "Sekiro spill block": { - "ExpectedInstructionCount": 148, + "ExpectedInstructionCount": 147, "Comment": [ "This block of code came from the settings screen when it loaded", "It was originally at RIP: 0x14232cca0 and has been deobfuscated" @@ -1173,7 +1173,8 @@ "ldr w11, [x6, #32]", "mov w20, #0x13", "mul w4, w5, w20", - "str w5, [x8, #104]", + "mov w21, w5", + "str w21, [x8, #104]", "mov w21, #0x1000000", "add w4, w4, w21", "lsr w4, w4, #25", @@ -1258,33 +1259,31 @@ "sub w17, w17, w14", "mov w20, w17", "str w20, [x4, #20]", - "ldr w20, [x8, #112]", - "mov x21, x4", - "mov x4, x20", + "ldr w4, [x8, #112]", "lsl w15, w15, #26", - "sub w4, w20, w15", + "sub w4, w4, w15", "lsl w7, w7, #25", "mov w20, w4", - "str w20, [x21, #24]", + "str w20, [x10, #24]", "ldr w4, [x8, #120]", "sub w4, w4, w7", "lsl w11, w11, #26", "mov w20, w4", - "str w20, [x21, #28]", + "str w20, [x10, #28]", "ldr w4, [x8]", "sub w4, w4, w11", "mov w20, w4", - "str w20, [x21, #32]", - "mov x4, x5", - "and w4, w5, #0xfe000000", + "str w20, [x10, #32]", + "mov w4, w5", + "and w4, w4, #0xfe000000", "sub w5, w5, w4", "mov w20, w5", - "str w20, [x21, #36]", + "str w20, [x10, #36]", "mvn w27, w8", "adds x26, x8, #0x18 (24)", "mov x8, x26", - "ldr x29, [x26]", - "add x8, x26, #0x8 (8)", + "ldr x29, [x8]", + "add x8, x8, #0x8 (8)", "ldr x19, [x8]", "add x8, x8, #0x8 (8)", "ldr x17, [x8]", diff --git a/unittests/InstructionCountCI/FEXOpt/libnss.json b/unittests/InstructionCountCI/FEXOpt/libnss.json index 1745e66c3..410a947ea 100644 --- a/unittests/InstructionCountCI/FEXOpt/libnss.json +++ b/unittests/InstructionCountCI/FEXOpt/libnss.json @@ -16,7 +16,7 @@ "Comment": [], "Instructions": { "libnss3 sha": { - "ExpectedInstructionCount": 2367, + "ExpectedInstructionCount": 2366, "Comment": [ "This block of code comes from libnss3 which causes panic spilling in FEX's RA.", "This code is hit in steamwebhelper calling in to this function.", @@ -206,7 +206,7 @@ "ldr q22, [x11, #32]", "ldr q21, [x11, #48]", "mov v19.16b, v16.16b", - "ext v19.16b, v18.16b, v16.16b, #8", + "ext v19.16b, v18.16b, v19.16b, #8", "mov v18.d[1], v16.d[1]", "mov w20, #0x1000", "movk w20, #0x1, lsl #16", @@ -230,7 +230,7 @@ "unimplemented (Unimplemented)", "mov w21, v19.s[1]", "mov w22, v19.s[0]", - "mov w23, v18.s[1]", + "mov w23, v20.s[1]", "and w24, w21, w22", "bic w23, w23, w21", "eor w23, w24, w23", @@ -240,11 +240,11 @@ "add w23, w23, w24", "mov w24, v16.s[0]", "add w23, w23, w24", - "mov w24, v18.s[0]", + "mov w24, v20.s[0]", "add w23, w23, w24", "mov w24, v19.s[3]", "mov w25, v19.s[2]", - "mov w30, v18.s[3]", + "mov w30, v20.s[3]", "and w18, w25, w30", "orr w30, w25, w30", "and w30, w24, w30", @@ -254,7 +254,7 @@ "eor w18, w18, w24, ror #13", "eor w18, w18, w24, ror #22", "add w30, w30, w18", - "mov w18, v18.s[2]", + "mov w18, v20.s[2]", "add w23, w23, w18", "and w21, w23, w21", "bic w22, w22, w23", @@ -265,7 +265,7 @@ "add w21, w21, w22", "mov w22, v16.s[1]", "add w21, w21, w22", - "mov w22, v18.s[1]", + "mov w22, v20.s[1]", "add w21, w21, w22", "and w22, w24, w25", "orr w24, w24, w25", @@ -276,9 +276,9 @@ "eor w24, w24, w30, ror #13", "eor w24, w24, w30, ror #22", "add w22, w22, w24", - "mov w24, v18.s[3]", + "mov w24, v20.s[3]", "add w21, w21, w24", - "mov v4.16b, v18.16b", + "mov v4.16b, v20.16b", "mov v4.s[3], w22", "mov v4.s[2], w30", "mov v4.s[1], w21", @@ -289,7 +289,7 @@ "tbl v16.16b, {v16.16b}, v4.16b", "mov w21, v20.s[1]", "mov w22, v20.s[0]", - "mov w23, v19.s[1]", + "mov w23, v17.s[1]", "and w24, w21, w22", "bic w23, w23, w21", "eor w23, w24, w23", @@ -299,11 +299,11 @@ "add w23, w23, w24", "mov w24, v16.s[0]", "add w23, w23, w24", - "mov w24, v19.s[0]", + "mov w24, v17.s[0]", "add w23, w23, w24", "mov w24, v20.s[3]", "mov w25, v20.s[2]", - "mov w30, v19.s[3]", + "mov w30, v17.s[3]", "and w18, w25, w30", "orr w30, w25, w30", "and w30, w24, w30", @@ -313,7 +313,7 @@ "eor w18, w18, w24, ror #13", "eor w18, w18, w24, ror #22", "add w30, w30, w18", - "mov w18, v19.s[2]", + "mov w18, v17.s[2]", "add w23, w23, w18", "and w21, w23, w21", "bic w22, w22, w23", @@ -324,7 +324,7 @@ "add w21, w21, w22", "mov w22, v16.s[1]", "add w21, w21, w22", - "mov w22, v19.s[1]", + "mov w22, v17.s[1]", "add w21, w21, w22", "and w22, w24, w25", "orr w24, w24, w25", @@ -335,16 +335,16 @@ "eor w24, w24, w30, ror #13", "eor w24, w24, w30, ror #22", "add w22, w22, w24", - "mov w24, v19.s[3]", + "mov w24, v17.s[3]", "add w21, w21, w24", - "mov v5.16b, v19.16b", + "mov v5.16b, v17.16b", "mov v5.s[3], w22", "mov v5.s[2], w30", "mov v5.s[1], w21", "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v21.16b", - "ext v16.16b, v22.16b, v21.16b, #4", + "ext v16.16b, v22.16b, v16.16b, #4", "add v24.4s, v24.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v21.s[2]", @@ -499,7 +499,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v24.16b", - "ext v16.16b, v21.16b, v24.16b, #4", + "ext v16.16b, v21.16b, v16.16b, #4", "add v23.4s, v23.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v24.s[2]", @@ -654,7 +654,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v23.16b", - "ext v16.16b, v24.16b, v23.16b, #4", + "ext v16.16b, v24.16b, v16.16b, #4", "add v22.4s, v22.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v23.s[2]", @@ -809,7 +809,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v22.16b", - "ext v16.16b, v23.16b, v22.16b, #4", + "ext v16.16b, v23.16b, v16.16b, #4", "add v21.4s, v21.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v22.s[2]", @@ -964,7 +964,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v21.16b", - "ext v16.16b, v22.16b, v21.16b, #4", + "ext v16.16b, v22.16b, v16.16b, #4", "add v24.4s, v24.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v21.s[2]", @@ -1119,7 +1119,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v24.16b", - "ext v16.16b, v21.16b, v24.16b, #4", + "ext v16.16b, v21.16b, v16.16b, #4", "add v23.4s, v23.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v24.s[2]", @@ -1274,7 +1274,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v23.16b", - "ext v16.16b, v24.16b, v23.16b, #4", + "ext v16.16b, v24.16b, v16.16b, #4", "add v22.4s, v22.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v23.s[2]", @@ -1429,7 +1429,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v22.16b", - "ext v16.16b, v23.16b, v22.16b, #4", + "ext v16.16b, v23.16b, v16.16b, #4", "add v21.4s, v21.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v22.s[2]", @@ -1584,7 +1584,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v21.16b", - "ext v16.16b, v22.16b, v21.16b, #4", + "ext v16.16b, v22.16b, v16.16b, #4", "add v24.4s, v24.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v21.s[2]", @@ -1739,7 +1739,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v24.16b", - "ext v16.16b, v21.16b, v24.16b, #4", + "ext v16.16b, v21.16b, v16.16b, #4", "add v23.4s, v23.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v24.s[2]", @@ -1894,7 +1894,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v23.16b", - "ext v16.16b, v24.16b, v23.16b, #4", + "ext v16.16b, v24.16b, v16.16b, #4", "add v22.4s, v22.4s, v16.4s", "ldr q16, [x29, x20, sxtx]", "mov w21, v23.s[2]", @@ -2049,7 +2049,7 @@ "mov v17.16b, v5.16b", "mov v17.s[0], w23", "mov v16.16b, v22.16b", - "ext v16.16b, v23.16b, v22.16b, #4", + "ext v16.16b, v23.16b, v16.16b, #4", "ldr q5, [x29, x20, sxtx]", "add v23.4s, v23.4s, v5.4s", "add v21.4s, v21.4s, v16.4s", @@ -2219,7 +2219,7 @@ "eor w23, w23, w20, ror #11", "eor w23, w23, w20, ror #25", "add w22, w22, w23", - "mov w23, v23.s[0]", + "mov w23, v16.s[0]", "add w22, w22, w23", "mov w23, v20.s[0]", "add w22, w22, w23", @@ -2244,7 +2244,7 @@ "eor w21, w21, w22, ror #11", "eor w21, w21, w22, ror #25", "add w20, w20, w21", - "mov w21, v23.s[1]", + "mov w21, v16.s[1]", "add w20, w20, w21", "mov w21, v20.s[1]", "add w20, w20, w21", @@ -2333,7 +2333,7 @@ "eor w23, w23, w20, ror #11", "eor w23, w23, w20, ror #25", "add w22, w22, w23", - "mov w23, v22.s[0]", + "mov w23, v16.s[0]", "add w22, w22, w23", "mov w23, v20.s[0]", "add w22, w22, w23", @@ -2358,7 +2358,7 @@ "eor w21, w21, w22, ror #11", "eor w21, w21, w22, ror #25", "add w20, w20, w21", - "mov w21, v22.s[1]", + "mov w21, v16.s[1]", "add w20, w20, w21", "mov w21, v20.s[1]", "add w20, w20, w21", @@ -2447,7 +2447,7 @@ "eor w23, w23, w20, ror #11", "eor w23, w23, w20, ror #25", "add w22, w22, w23", - "mov w23, v21.s[0]", + "mov w23, v16.s[0]", "add w22, w22, w23", "mov w23, v20.s[0]", "add w22, w22, w23", @@ -2472,7 +2472,7 @@ "eor w21, w21, w22, ror #11", "eor w21, w21, w22, ror #25", "add w20, w20, w21", - "mov w21, v21.s[1]", + "mov w21, v16.s[1]", "add w20, w20, w21", "mov w21, v20.s[1]", "add w20, w20, w21", @@ -2555,7 +2555,6 @@ "tbl v20.16b, {v20.16b}, v2.16b", "tbl v17.16b, {v17.16b}, v3.16b", "mov v16.16b, v17.16b", - "mov v16.16b, v17.16b", "mov v16.d[1], v20.d[1]", "ext v20.16b, v17.16b, v20.16b, #8", "str q16, [x11, #256]", diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json index 653b3e9d4..108529a49 100644 --- a/unittests/InstructionCountCI/FlagM/FlagOpts.json +++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json @@ -95,9 +95,9 @@ "ExpectedArm64ASM": [ "adds x4, x4, x7", "cset w20, hs", - "mov x27, x4", "adds x26, x4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -124,9 +124,9 @@ "subs x4, x4, x7", "cfinv", "cset w20, hs", - "mov x27, x4", "subs x26, x4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -263,15 +263,16 @@ ] }, "AND use only PF": { - "ExpectedInstructionCount": 8, + "ExpectedInstructionCount": 9, "x86Insts": [ "and eax, ebx", "setp cl", "test cl, cl" ], "ExpectedArm64ASM": [ - "and w4, w4, w7", - "eor w20, w4, w4, lsr #4", + "and w26, w4, w7", + "mov x4, x26", + "eor w20, w26, w26, lsr #4", "eor w20, w20, w20, lsr #2", "eon w20, w20, w20, lsr #1", "and x20, x20, #0x1", diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks.json b/unittests/InstructionCountCI/FlagM/HotBlocks.json index 8540fb0eb..b1c4521bc 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks.json @@ -27,7 +27,7 @@ "mov w4, #0x1", "ldaddal x4, x4, [x5]", "mov x6, x4", - "and w6, w4, #0x1f", + "and w6, w6, #0x1f", "add x6, x6, #0x1 (1)", "lsl x6, x6, #6", "eor w27, w6, w5", @@ -81,11 +81,11 @@ "mov w10, w5", "mov x6, x9", "mov x4, x7", - "ldr s18, [x9]", - "add x4, x7, #0x20 (32)", + "ldr s18, [x6]", + "add x4, x4, #0x20 (32)", "fmul s0, s18, s16", "mov v18.s[0], v0.s[0]", - "add x6, x9, #0x20 (32)", + "add x6, x6, #0x20 (32)", "ldur s2, [x4, #-32]", "fadd s0, s18, s2", "mov v18.s[0], v0.s[0]", @@ -139,9 +139,9 @@ "fadd s0, s18, s2", "mov v18.s[0], v0.s[0]", "stur s18, [x4, #-4]", - "mov x27, x10", "subs w26, w10, #0x1 (1)", "cfinv", + "mov x27, x10", "mov x10, x26" ] }, @@ -168,7 +168,7 @@ ] }, "bytemark data xor loop": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 13, "Comment": [ "Saw this in bytemark" ], @@ -187,17 +187,15 @@ "mov x6, x4", "mov x5, x4", "mov x19, x10", - "add x20, x4, #0x1 (1)", - "mov x21, x4", - "mov x4, x20", - "lsr x6, x21, #6", - "and w5, w21, #0x3f", - "lsl x19, x10, x5", - "ldr x21, [x7, x6, sxtx #3]", - "eor x21, x21, x19", - "str x21, [x7, x6, sxtx #3]", - "eor w27, w11, w20", - "subs x26, x11, x20", + "add x4, x4, #0x1 (1)", + "lsr x6, x6, #6", + "and w5, w5, #0x3f", + "lsl x19, x19, x5", + "ldr x20, [x7, x6, sxtx #3]", + "eor x20, x20, x19", + "str x20, [x7, x6, sxtx #3]", + "eor w27, w11, w4", + "subs x26, x11, x4", "cfinv" ] }, @@ -215,7 +213,7 @@ "ExpectedArm64ASM": [ "ldr x17, [x10, x13, sxtx #3]", "mov x15, x13", - "orr x15, x13, #0x1", + "orr x15, x15, #0x1", "ldr x20, [x10, x15, sxtx #3]", "eor w27, w17, w20", "subs x26, x17, x20", diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json index b238ff47d..44ae86e9e 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json @@ -75,13 +75,13 @@ "add w10, w10, #0x40 (64)", "add w11, w11, #0x40 (64)", "sub w5, w5, #0x40 (64)", - "mov x27, x5", "subs w26, w5, #0x40 (64)", - "cfinv" + "cfinv", + "mov x27, x5" ] }, "dxvk hotblock from MGRR": { - "ExpectedInstructionCount": 41, + "ExpectedInstructionCount": 38, "Comment": [ "Hottest block in Metal Gear Rising: Revengeance render thread" ], @@ -111,34 +111,31 @@ "mov x20, #0xffffffffffffffdc", "ldr w10, [x9, w20, sxtw]", "mov w20, #0xffffffff", - "adds w5, w4, w20", - "mvn w27, w6", - "adcs w26, w6, w20", + "adds w5, w5, w20", + "mvn w27, w7", + "adcs w26, w7, w20", "mov x7, x26", "mov x20, #0xffffffffffffffd8", "str w5, [x9, w20, sxtw]", "mov x20, #0xffffffffffffffd4", - "str w26, [x9, w20, sxtw]", + "str w7, [x9, w20, sxtw]", "mov x7, x5", "mov x21, #0xffffffffffffffd0", "str w5, [x9, w21, sxtw]", - "ldr w20, [x9, w20, sxtw]", - "mov x21, x5", - "mov x5, x20", - "add w22, w10, #0x8 (8)", - "mov w24, w4", - "mov w25, w6", - "mov w0, w21", - "mov w21, w20", - "mov w20, w0", - "mov w2, w24", - "mov w3, w25", - "caspal w2, w3, w20, w21, [x22]", + "ldr w5, [x9, w20, sxtw]", + "add w20, w10, #0x8 (8)", + "mov w22, w4", + "mov w23, w6", + "mov w24, w7", + "mov w25, w5", + "mov w2, w22", + "mov w3, w23", + "caspal w2, w3, w24, w25, [x20]", "mov w20, w2", "mov w21, w3", "mrs x0, nzcv", - "cmp w20, w24", - "ccmp w21, w25, #nzcv, eq", + "cmp w20, w22", + "ccmp w21, w23, #nzcv, eq", "rmif x0, #0, #NzCV", "mov w22, w21", "csel x4, x20, x4, ne", @@ -146,7 +143,7 @@ ] }, "Psychonauts matrix swizzle": { - "ExpectedInstructionCount": 2406, + "ExpectedInstructionCount": 2340, "Comment": [ "Hottest block in Windows Psychonauts", "Doing a 4x4 32-bit float matrix swizzle", @@ -260,15 +257,14 @@ "ExpectedArm64ASM": [ "str w9, [x8, #-4]!", "mov x9, x8", - "mov x27, x8", "subs w26, w8, #0x44 (68)", "cfinv", - "mov x20, x8", + "mov x27, x8", "mov x8, x26", - "mov x21, #0xffffffffffffffbc", - "str w5, [x20, w21, sxtw]", - "ldr w4, [x20, w21, sxtw]", - "ldrb w20, [x28, #1019]", + "mov x20, #0xffffffffffffffbc", + "str w5, [x9, w20, sxtw]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -298,17 +294,16 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "mov w22, #0x1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldrb w23, [x28, #1298]", - "lsl w24, w22, w20", + "lsl w24, w22, w21", "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -336,16 +331,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffc0", - "str s2, [x9, w23, sxtw]", - "ldrb w24, [x28, #1298]", - "lsl w25, w22, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, w21, sxtw]", + "mov x24, #0xffffffffffffffc0", + "str s2, [x9, w24, sxtw]", + "lsl w25, w22, w21", + "bic w23, w23, w25", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w5, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x5, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -374,16 +368,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w25, w22, w21", + "orr w23, w23, w25", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -411,16 +404,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffc4", - "str s2, [x9, w24, sxtw]", - "ldrb w25, [x28, #1298]", - "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, w21, sxtw]", + "mov x25, #0xffffffffffffffc4", + "str s2, [x9, w25, sxtw]", + "lsl w12, w22, w21", + "bic w23, w23, w12", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w6, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x6, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -449,16 +441,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w12, w22, w21", + "orr w23, w23, w12", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -486,16 +477,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffc8", - "str s2, [x9, w25, sxtw]", - "ldrb w12, [x28, #1298]", - "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, w21, sxtw]", + "mov x12, #0xffffffffffffffc8", + "str s2, [x9, w12, sxtw]", + "lsl w13, w22, w21", + "bic w23, w23, w13", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -524,16 +514,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w13, w22, w21", + "orr w23, w23, w13", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -561,16 +550,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffcc", - "str s2, [x9, w12, sxtw]", - "ldrb w13, [x28, #1298]", - "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, w21, sxtw]", + "mov x13, #0xffffffffffffffcc", + "str s2, [x9, w13, sxtw]", + "lsl w14, w22, w21", + "bic w23, w23, w14", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w5, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -599,16 +587,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w22, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w14, w22, w21", + "orr w23, w23, w14", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -636,16 +623,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffd0", - "str s2, [x9, w13, sxtw]", - "ldrb w14, [x28, #1298]", - "lsl w15, w22, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, w21, sxtw]", + "mov x14, #0xffffffffffffffd0", + "str s2, [x9, w14, sxtw]", + "lsl w15, w22, w21", + "bic w23, w23, w15", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w6, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x6, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -674,16 +660,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w22, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w15, w22, w21", + "orr w23, w23, w15", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -711,16 +696,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffd4", - "str s2, [x9, w14, sxtw]", - "ldrb w15, [x28, #1298]", - "lsl w16, w22, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, w21, sxtw]", + "mov x15, #0xffffffffffffffd4", + "str s2, [x9, w15, sxtw]", + "lsl w16, w22, w21", + "bic w23, w23, w16", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -749,16 +733,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w16, w22, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w16, w22, w21", + "orr w23, w23, w16", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -786,16 +769,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffd8", - "str s2, [x9, w15, sxtw]", - "ldrb w16, [x28, #1298]", - "lsl w17, w22, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, w21, sxtw]", + "mov x16, #0xffffffffffffffd8", + "str s2, [x9, w16, sxtw]", + "lsl w17, w22, w21", + "bic w23, w23, w17", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w5, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x5, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -824,16 +806,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w17, w22, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w17, w22, w21", + "orr w23, w23, w17", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -861,16 +842,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xffffffffffffffdc", - "str s2, [x9, w16, sxtw]", - "ldrb w17, [x28, #1298]", - "lsl w29, w22, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, w21, sxtw]", + "mov x17, #0xffffffffffffffdc", + "str s2, [x9, w17, sxtw]", + "lsl w29, w22, w21", + "bic w23, w23, w29", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w6, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -899,16 +879,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w22, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w29, w22, w21", + "orr w23, w23, w29", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -936,16 +915,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x17, #0xffffffffffffffe0", - "str s2, [x9, w17, sxtw]", - "ldrb w29, [x28, #1298]", - "lsl w30, w22, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, w21, sxtw]", + "mov x29, #0xffffffffffffffe0", + "str s2, [x9, w29, sxtw]", + "lsl w30, w22, w21", + "bic w23, w23, w30", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -974,16 +952,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w22, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w30, w22, w21", + "orr w23, w23, w30", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1011,16 +988,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x29, #0xffffffffffffffe4", - "str s2, [x9, w29, sxtw]", - "ldrb w30, [x28, #1298]", - "lsl w19, w22, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, w21, sxtw]", + "mov x30, #0xffffffffffffffe4", + "str s2, [x9, w30, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w5, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x5, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1049,16 +1025,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w22, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w19, w22, w21", + "orr w23, w23, w19", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1086,16 +1061,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x30, #0xffffffffffffffe8", - "str s2, [x9, w30, sxtw]", - "ldrb w19, [x28, #1298]", - "lsl w30, w22, w20", - "bic w30, w19, w30", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, w21, sxtw]", + "mov x19, #0xffffffffffffffe8", + "str s2, [x9, w19, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w6, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x6, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1124,16 +1098,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w22, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w19, w22, w21", + "orr w23, w23, w19", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1161,16 +1134,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x30, #0xffffffffffffffec", - "str s2, [x9, w30, sxtw]", - "ldrb w19, [x28, #1298]", - "lsl w30, w22, w20", - "bic w30, w19, w30", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, w21, sxtw]", + "mov x19, #0xffffffffffffffec", + "str s2, [x9, w19, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1199,16 +1171,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w22, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w19, w22, w21", + "orr w23, w23, w19", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1236,16 +1207,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x30, #0xfffffffffffffff0", - "str s2, [x9, w30, sxtw]", - "ldrb w19, [x28, #1298]", - "lsl w30, w22, w20", - "bic w30, w19, w30", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w5, [x9, w21, sxtw]", + "mov x19, #0xfffffffffffffff0", + "str s2, [x9, w19, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w5, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x5, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1274,16 +1244,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w22, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w19, w22, w21", + "orr w23, w23, w19", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1311,16 +1280,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x30, #0xfffffffffffffff4", - "str s2, [x9, w30, sxtw]", - "ldrb w19, [x28, #1298]", - "lsl w30, w22, w20", - "bic w30, w19, w30", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w6, [x9, w21, sxtw]", + "mov x19, #0xfffffffffffffff4", + "str s2, [x9, w19, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w6, [x9, w20, sxtw]", + "ldrb w21, [x28, #1019]", "ldr s2, [x6, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1349,16 +1317,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w19, w22, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "sub w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "lsl w19, w22, w21", + "orr w23, w23, w19", + "strb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", + "ldrb w21, [x28, #1019]", + "add x0, x28, x21, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1386,16 +1353,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x30, #0xfffffffffffffff8", - "str s2, [x9, w30, sxtw]", - "ldrb w19, [x28, #1298]", - "lsl w30, w22, w20", - "bic w30, w19, w30", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, w21, sxtw]", + "mov x19, #0xfffffffffffffff8", + "str s2, [x9, w19, sxtw]", + "lsl w19, w22, w21", + "bic w23, w23, w19", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", + "strb w21, [x28, #1019]", + "ldr w4, [x9, w20, sxtw]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1427,8 +1393,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w22, w20", - "orr w21, w30, w21", - "strb w21, [x28, #1298]", + "orr w21, w23, w21", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1461,17 +1426,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x21, #0xfffffffffffffffc", - "str s2, [x9, w21, sxtw]", - "ldrb w30, [x28, #1298]", + "mov x23, #0xfffffffffffffffc", + "str s2, [x9, w23, sxtw]", "lsl w19, w22, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w21, w21, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", - "ldr s2, [x9, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1501,9 +1465,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w22, w20", - "orr w23, w30, w23", - "strb w23, [x28, #1298]", + "lsl w24, w22, w20", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1537,15 +1500,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w23, [x28, #1298]", - "lsl w30, w22, w20", - "bic w23, w23, w30", - "strb w23, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldr s2, [x9, w24, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w25, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1576,8 +1538,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1611,15 +1572,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldr s2, [x9, w25, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w12, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1650,8 +1610,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1685,15 +1644,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", - "ldr s2, [x9, w12, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w13, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1724,8 +1682,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1759,15 +1716,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldr s2, [x9, w13, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w14, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1798,8 +1754,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1833,15 +1788,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldr s2, [x9, w14, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w15, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1872,8 +1826,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1907,15 +1860,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", - "ldr s2, [x9, w15, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w16, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -1946,8 +1898,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1981,15 +1932,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", - "ldr s2, [x9, w16, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w17, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2020,8 +1970,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2055,15 +2004,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", - "ldr s2, [x9, w17, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w29, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2094,8 +2042,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2129,15 +2076,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", - "ldr s2, [x9, w29, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w30, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2168,8 +2114,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2203,14 +2148,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", + "ldrb w20, [x28, #1019]", "mov x24, #0xffffffffffffffe8", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -2243,8 +2187,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2278,14 +2221,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", + "ldrb w20, [x28, #1019]", "mov x24, #0xffffffffffffffec", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -2318,8 +2260,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2353,14 +2294,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", + "ldrb w20, [x28, #1019]", "mov x24, #0xfffffffffffffff0", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -2393,8 +2333,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2428,14 +2367,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x9, #8]", + "ldrb w20, [x28, #1019]", "mov x24, #0xfffffffffffffff4", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -2468,8 +2406,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2503,14 +2440,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", + "ldrb w20, [x28, #1019]", "mov x24, #0xfffffffffffffff8", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -2543,8 +2479,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2578,15 +2513,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x9, #8]", - "ldr s2, [x9, w21, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -2616,9 +2550,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w21, w22, w20", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2652,18 +2585,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #60]", - "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "mov x8, x9", - "ldr w20, [x9]", - "add x8, x9, #0x4 (4)", - "mov x9, x20" + "ldr w9, [x8]", + "add x8, x8, #0x4 (4)", + "strb w21, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json index 58745554e..69349b31b 100644 --- a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json +++ b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json @@ -58,10 +58,10 @@ "mov w10, w5", "mov x6, x9", "mov x4, x7", - "ldr s18, [x9]", - "add x4, x7, #0x20 (32)", + "ldr s18, [x6]", + "add x4, x4, #0x20 (32)", "fmul s18, s18, s16", - "add x6, x9, #0x20 (32)", + "add x6, x6, #0x20 (32)", "ldur s2, [x4, #-32]", "fadd s18, s18, s2", "stur s18, [x4, #-32]", @@ -100,9 +100,9 @@ "ldur s2, [x4, #-4]", "fadd s18, s18, s2", "stur s18, [x4, #-4]", - "mov x27, x10", "subs w26, w10, #0x1 (1)", "cfinv", + "mov x27, x10", "mov x10, x26" ] } diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json index e58249a73..6a47753c4 100644 --- a/unittests/InstructionCountCI/FlagM/Primary.json +++ b/unittests/InstructionCountCI/FlagM/Primary.json @@ -105,35 +105,39 @@ ] }, "add al, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "0x04", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmn w0, w20, lsl #24", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "add ax, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "0x05", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 1": { "ExpectedInstructionCount": 3, "Comment": "0x05", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -141,8 +145,8 @@ "ExpectedInstructionCount": 3, "Comment": "0x05", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -486,10 +490,9 @@ ] }, "adc al, 1": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 16, "Comment": "0x14", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -502,14 +505,16 @@ "eor w21, w26, w4", "bic w20, w21, w20", "rmif x20, #7, #nzcV", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "adc ax, 1": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 16, "Comment": "0x15", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -522,7 +527,10 @@ "eor w21, w26, w4", "bic w20, w21, w20", "rmif x20, #15, #nzcV", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "adc eax, 1": { @@ -530,8 +538,8 @@ "Comment": "0x15", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -540,8 +548,8 @@ "Comment": "0x15", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -746,10 +754,9 @@ ] }, "sbb al, 1": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 17, "Comment": "0x1C", "ExpectedArm64ASM": [ - "mov x27, x4", "uxtb w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -763,14 +770,16 @@ "eor w20, w26, w20", "and w20, w20, w21", "rmif x20, #7, #nzcV", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "sbb ax, 1": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 17, "Comment": "0x1D", "ExpectedArm64ASM": [ - "mov x27, x4", "uxth w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -784,7 +793,10 @@ "eor w20, w26, w20", "and w20, w20, w21", "rmif x20, #15, #nzcV", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "sbb eax, 1": { @@ -792,10 +804,10 @@ "Comment": "0x1D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "cfinv", "sbcs w26, w4, w20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -804,10 +816,10 @@ "Comment": "0x1D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "cfinv", "sbcs x26, x4, x20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -1128,38 +1140,42 @@ ] }, "sub al, 1": { - "ExpectedInstructionCount": 7, + "ExpectedInstructionCount": 9, "Comment": "0x2C", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "cfinv", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "sub ax, 1": { - "ExpectedInstructionCount": 7, + "ExpectedInstructionCount": 9, "Comment": "0x2D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmp w0, w20, lsl #16", "sub w26, w4, #0x1 (1)", "cfinv", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "sub eax, 1": { "ExpectedInstructionCount": 4, "Comment": "0x2D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -1167,9 +1183,9 @@ "ExpectedInstructionCount": 4, "Comment": "0x2D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -1475,11 +1491,11 @@ "Comment": "0x3C", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp ax, 1": { @@ -1487,29 +1503,29 @@ "Comment": "0x3D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmp w0, w20, lsl #16", "sub w26, w4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp eax, 1": { "ExpectedInstructionCount": 3, "Comment": "0x3D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp rax, 1": { "ExpectedInstructionCount": 3, "Comment": "0x3D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp al, -1": { @@ -1773,24 +1789,24 @@ "strb w20, [x28, #985]", "ubfx w20, w27, #10, #1", "sub x20, x21, x20, lsl #1", - "strb w20, [x28, #986]", "rmif x27, #11, #nzcV", - "ubfx w20, w27, #12, #1", - "strb w20, [x28, #988]", - "ubfx w20, w27, #14, #1", - "strb w20, [x28, #990]", - "ubfx w20, w27, #16, #1", - "strb w20, [x28, #992]", - "ubfx w20, w27, #17, #1", - "strb w20, [x28, #993]", - "ubfx w20, w27, #18, #1", - "strb w20, [x28, #994]", - "ubfx w20, w27, #19, #1", - "strb w20, [x28, #995]", - "ubfx w20, w27, #20, #1", - "strb w20, [x28, #996]", - "ubfx w20, w27, #21, #1", - "strb w20, [x28, #997]" + "ubfx w21, w27, #12, #1", + "strb w21, [x28, #988]", + "ubfx w21, w27, #14, #1", + "strb w21, [x28, #990]", + "ubfx w21, w27, #16, #1", + "strb w21, [x28, #992]", + "ubfx w21, w27, #17, #1", + "strb w21, [x28, #993]", + "ubfx w21, w27, #18, #1", + "strb w21, [x28, #994]", + "ubfx w21, w27, #19, #1", + "strb w21, [x28, #995]", + "ubfx w21, w27, #20, #1", + "strb w21, [x28, #996]", + "ubfx w21, w27, #21, #1", + "strb w21, [x28, #997]", + "strb w20, [x28, #986]" ] }, "sahf": { @@ -1900,10 +1916,10 @@ ] }, "repz cmpsb": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa6", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -1924,19 +1940,18 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #24", + "lsl w0, w27, #24", "cmp w0, w26, lsl #24", - "sub w26, w21, w26", - "cfinv" + "sub w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repz cmpsw": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -1957,19 +1972,18 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #16", + "lsl w0, w27, #16", "cmp w0, w26, lsl #16", - "sub w26, w21, w26", - "cfinv" + "sub w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repz cmpsd": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 24, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x64", + "cbz x5, #+0x60", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -1990,17 +2004,16 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs w26, w21, w26", - "cfinv" + "subs w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repz cmpsq": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 24, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x64", + "cbz x5, #+0x60", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -2021,17 +2034,16 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs x26, x21, x26", - "cfinv" + "subs x26, x27, x26", + "cfinv", + "mov x27, x20" ] }, "repnz cmpsb": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa6", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -2052,19 +2064,18 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #24", + "lsl w0, w27, #24", "cmp w0, w26, lsl #24", - "sub w26, w21, w26", - "cfinv" + "sub w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repnz cmpsw": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -2085,19 +2096,18 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #16", + "lsl w0, w27, #16", "cmp w0, w26, lsl #16", - "sub w26, w21, w26", - "cfinv" + "sub w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repnz cmpsd": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 24, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x64", + "cbz x5, #+0x60", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -2118,17 +2128,16 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs w26, w21, w26", - "cfinv" + "subs w26, w27, w26", + "cfinv", + "mov x27, x20" ] }, "repnz cmpsq": { - "ExpectedInstructionCount": 25, + "ExpectedInstructionCount": 24, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x64", + "cbz x5, #+0x60", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -2149,10 +2158,9 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs x26, x21, x26", - "cfinv" + "subs x26, x27, x26", + "cfinv", + "mov x27, x20" ] }, "test al, 1": { diff --git a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json index 9aa88c677..ace0f23f7 100644 --- a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json @@ -13,15 +13,17 @@ }, "Instructions": { "add al, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x80 /0", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmn w0, w20, lsl #24", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "or al, 1": { @@ -34,10 +36,9 @@ ] }, "adc al, 1": { - "ExpectedInstructionCount": 14, + "ExpectedInstructionCount": 16, "Comment": "GROUP1 0x80 /2", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -50,14 +51,16 @@ "eor w21, w26, w4", "bic w20, w21, w20", "rmif x20, #7, #nzcV", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "sbb al, 1": { - "ExpectedInstructionCount": 15, + "ExpectedInstructionCount": 17, "Comment": "GROUP1 0x80 /3", "ExpectedArm64ASM": [ - "mov x27, x4", "uxtb w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -71,7 +74,10 @@ "eor w20, w26, w20", "and w20, w20, w21", "rmif x20, #7, #nzcV", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "and al, 1": { @@ -84,16 +90,18 @@ ] }, "sub al, 1": { - "ExpectedInstructionCount": 7, + "ExpectedInstructionCount": 9, "Comment": "GROUP1 0x80 /5", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "cfinv", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "xor al, 1": { @@ -110,11 +118,11 @@ "Comment": "GROUP1 0x80 /7", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "add al, -1": { @@ -223,23 +231,25 @@ ] }, "add ax, 256": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x100 (256)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 256": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -247,8 +257,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -275,8 +285,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -285,8 +295,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -295,10 +305,10 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "cfinv", "sbcs w26, w4, w20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -307,10 +317,10 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "cfinv", "sbcs x26, x4, x20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -334,9 +344,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x100 (256)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -344,9 +354,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -372,30 +382,32 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x100 (256)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp rax, 256": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "add ax, -256": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0xff00", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, w20", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, -256": { @@ -403,8 +415,8 @@ "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "adds w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -412,8 +424,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -440,8 +452,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -450,8 +462,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffff00", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -460,10 +472,10 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "cfinv", "sbcs w26, w4, w20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -472,10 +484,10 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffff00", - "mov x27, x4", "cfinv", "sbcs x26, x4, x20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -500,9 +512,9 @@ "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "subs w26, w4, w20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -510,9 +522,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -539,38 +551,40 @@ "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "subs w26, w4, w20", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp rax, -256": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "add ax, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 1": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -578,8 +592,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -606,8 +620,8 @@ "Comment": "GROUP1 0x83 /2", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -616,8 +630,8 @@ "Comment": "GROUP1 0x83 /2", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -626,10 +640,10 @@ "Comment": "GROUP1 0x83 /3", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "cfinv", "sbcs w26, w4, w20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -638,10 +652,10 @@ "Comment": "GROUP1 0x83 /3", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "cfinv", "sbcs x26, x4, x20", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -665,9 +679,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP1 0x83 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -675,9 +689,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP1 0x83 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "cfinv", + "mov x27, x4", "mov x4, x26" ] }, @@ -703,18 +717,18 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "cmp rax, 1": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", - "cfinv" + "cfinv", + "mov x27, x4" ] }, "add ax, -1": { @@ -2047,14 +2061,16 @@ ] }, "neg bl": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 7, "Comment": "GROUP2 0xf6 /3", "ExpectedArm64ASM": [ - "mov x27, x7", "cmp wzr, w7, lsl #24", "neg w26, w7", "cfinv", - "bfxil x7, x26, #0, #8" + "mov x20, x7", + "bfxil x20, x26, #0, #8", + "mov x27, x7", + "mov x7, x20" ] }, "mul bl": { @@ -2161,23 +2177,25 @@ ] }, "neg bx": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 7, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "cmp wzr, w7, lsl #16", "neg w26, w7", "cfinv", - "bfxil x7, x26, #0, #16" + "mov x20, x7", + "bfxil x20, x26, #0, #16", + "mov x27, x7", + "mov x7, x20" ] }, "neg ebx": { "ExpectedInstructionCount": 4, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "negs w26, w7", "cfinv", + "mov x27, x7", "mov x7, x26" ] }, @@ -2185,9 +2203,9 @@ "ExpectedInstructionCount": 4, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "negs x26, x7", "cfinv", + "mov x27, x7", "mov x7, x26" ] }, @@ -2224,9 +2242,9 @@ "ExpectedArm64ASM": [ "mul x20, x7, x4", "umulh x6, x7, x4", - "mov x4, x20", "cmp x6, #0x0 (0)", - "ccmn xzr, #0, #nzCV, eq" + "ccmn xzr, #0, #nzCV, eq", + "mov x4, x20" ] }, "imul bx": { @@ -2330,9 +2348,9 @@ "Comment": "GROUP4 0xfe /0", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds w26, w4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -2341,9 +2359,9 @@ "Comment": "GROUP4 0xfe /0", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds x26, x4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -2364,9 +2382,9 @@ "Comment": "GROUP4 0xfe /1", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs w26, w4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -2375,9 +2393,9 @@ "Comment": "GROUP4 0xfe /1", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs x26, x4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] } diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json index 225e7e342..4fa69a3d9 100644 --- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json +++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json @@ -197,9 +197,9 @@ "Comment": "0x40", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds w26, w4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, @@ -234,9 +234,9 @@ "Comment": "0x48", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs w26, w4, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x4", "mov x4, x26" ] }, diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json index 89b19aaa4..d55f82ae3 100644 --- a/unittests/InstructionCountCI/FlagM/Secondary.json +++ b/unittests/InstructionCountCI/FlagM/Secondary.json @@ -1057,13 +1057,15 @@ ] }, "cmpxchg rcx, rbx": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 7, "ExpectedArm64ASM": [ "eor w27, w4, w5", "subs x26, x4, x5", "cfinv", - "mov x4, x5", - "csel x5, x7, x5, eq" + "csel x20, x7, x5, eq", + "mov x21, x5", + "mov x5, x20", + "mov x4, x21" ] }, "cmpxchg [rax], rbx": { diff --git a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json index 3888933b6..815f38a70 100644 --- a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json +++ b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json @@ -1280,23 +1280,14 @@ "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", "ldrb w20, [x4, #4]", - "strb w20, [x28, #1298]", "ldr q2, [x4, #32]", - "str q2, [x28, #1040]", - "ldr q2, [x4, #48]", - "str q2, [x28, #1056]", - "ldr q2, [x4, #64]", - "str q2, [x28, #1072]", - "ldr q2, [x4, #80]", - "str q2, [x28, #1088]", - "ldr q2, [x4, #96]", - "str q2, [x28, #1104]", - "ldr q2, [x4, #112]", - "str q2, [x28, #1120]", - "ldr q2, [x4, #128]", - "str q2, [x28, #1136]", - "ldr q2, [x4, #144]", - "str q2, [x28, #1152]", + "ldr q3, [x4, #48]", + "ldr q4, [x4, #64]", + "ldr q5, [x4, #80]", + "ldr q6, [x4, #96]", + "ldr q7, [x4, #112]", + "ldr q8, [x4, #128]", + "ldr q9, [x4, #144]", "ldr q16, [x4, #160]", "ldr q17, [x4, #176]", "ldr q18, [x4, #192]", @@ -1313,15 +1304,24 @@ "ldr q29, [x4, #368]", "ldr q30, [x4, #384]", "ldr q31, [x4, #400]", - "ldr w20, [x4, #24]", - "ubfx w20, w20, #13, #3", - "rbit w1, w20", + "ldr w21, [x4, #24]", + "ubfx w21, w21, #13, #3", + "rbit w1, w21", "lsr w1, w1, #30", "mrs x0, fpcr", "bfi x0, x1, #22, #2", - "lsr x1, x20, #2", + "lsr x1, x21, #2", "bfi x0, x1, #24, #1", - "msr fpcr, x0" + "msr fpcr, x0", + "strb w20, [x28, #1298]", + "str q9, [x28, #1152]", + "str q8, [x28, #1136]", + "str q7, [x28, #1120]", + "str q6, [x28, #1104]", + "str q5, [x28, #1088]", + "str q4, [x28, #1072]", + "str q3, [x28, #1056]", + "str q2, [x28, #1040]" ] }, "rdgsbase eax": { @@ -1513,9 +1513,10 @@ ] }, "xrstor [rax]": { - "ExpectedInstructionCount": 159, + "ExpectedInstructionCount": 165, "Comment": "GROUP15 0x0F 0xAE /5", "ExpectedArm64ASM": [ + "sub sp, sp, #0x40 (64)", "ldr x20, [x4, #512]", "ubfx x20, x20, #0, #1", "cbnz x20, #+0x8", @@ -1534,23 +1535,23 @@ "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", "ldrb w20, [x4, #4]", - "strb w20, [x28, #1298]", "ldr q2, [x4, #32]", + "ldr q3, [x4, #48]", + "ldr q4, [x4, #64]", + "ldr q5, [x4, #80]", + "ldr q6, [x4, #96]", + "ldr q7, [x4, #112]", + "ldr q8, [x4, #128]", + "ldr q9, [x4, #144]", + "strb w20, [x28, #1298]", + "str q9, [x28, #1152]", + "str q8, [x28, #1136]", + "str q7, [x28, #1120]", + "str q6, [x28, #1104]", + "str q5, [x28, #1088]", + "str q4, [x28, #1072]", + "str q3, [x28, #1056]", "str q2, [x28, #1040]", - "ldr q2, [x4, #48]", - "str q2, [x28, #1056]", - "ldr q2, [x4, #64]", - "str q2, [x28, #1072]", - "ldr q2, [x4, #80]", - "str q2, [x28, #1088]", - "ldr q2, [x4, #96]", - "str q2, [x28, #1104]", - "ldr q2, [x4, #112]", - "str q2, [x28, #1120]", - "ldr q2, [x4, #128]", - "str q2, [x28, #1136]", - "ldr q2, [x4, #144]", - "str q2, [x28, #1152]", "b #+0x4c", "mov w20, #0x0", "mov w21, #0x37f", @@ -1560,16 +1561,16 @@ "strb w20, [x28, #1017]", "strb w20, [x28, #1018]", "strb w20, [x28, #1022]", - "strb w20, [x28, #1298]", "movi v2.2d, #0x0", - "str q2, [x28, #1040]", - "str q2, [x28, #1056]", - "str q2, [x28, #1072]", - "str q2, [x28, #1088]", - "str q2, [x28, #1104]", - "str q2, [x28, #1120]", - "str q2, [x28, #1136]", + "strb w20, [x28, #1298]", "str q2, [x28, #1152]", + "str q2, [x28, #1136]", + "str q2, [x28, #1120]", + "str q2, [x28, #1104]", + "str q2, [x28, #1088]", + "str q2, [x28, #1072]", + "str q2, [x28, #1056]", + "str q2, [x28, #1040]", "ldr x20, [x4, #512]", "ubfx x20, x20, #1, #1", "cbnz x20, #+0x8", @@ -1591,76 +1592,80 @@ "ldr q30, [x4, #384]", "ldr q31, [x4, #400]", "b #+0x44", - "movi v16.2d, #0x0", - "mov v17.16b, v16.16b", - "mov v18.16b, v16.16b", - "mov v19.16b, v16.16b", - "mov v20.16b, v16.16b", - "mov v21.16b, v16.16b", - "mov v22.16b, v16.16b", - "mov v23.16b, v16.16b", - "mov v24.16b, v16.16b", - "mov v25.16b, v16.16b", - "mov v26.16b, v16.16b", - "mov v27.16b, v16.16b", - "mov v28.16b, v16.16b", - "mov v29.16b, v16.16b", - "mov v30.16b, v16.16b", - "mov v31.16b, v16.16b", + "movi v31.2d, #0x0", + "mov v30.16b, v31.16b", + "mov v29.16b, v31.16b", + "mov v28.16b, v31.16b", + "mov v27.16b, v31.16b", + "mov v26.16b, v31.16b", + "mov v25.16b, v31.16b", + "mov v24.16b, v31.16b", + "mov v23.16b, v31.16b", + "mov v22.16b, v31.16b", + "mov v21.16b, v31.16b", + "mov v20.16b, v31.16b", + "mov v19.16b, v31.16b", + "mov v18.16b, v31.16b", + "mov v17.16b, v31.16b", + "mov v16.16b, v31.16b", "ldr x20, [x4, #512]", "ubfx x20, x20, #2, #1", "cbnz x20, #+0x8", - "b #+0x88", + "b #+0x98", "ldr q2, [x4, #576]", - "str q2, [x28, #16]", - "ldr q2, [x4, #592]", - "str q2, [x28, #32]", - "ldr q2, [x4, #608]", - "str q2, [x28, #48]", - "ldr q2, [x4, #624]", - "str q2, [x28, #64]", - "ldr q2, [x4, #640]", - "str q2, [x28, #80]", - "ldr q2, [x4, #656]", - "str q2, [x28, #96]", - "ldr q2, [x4, #672]", - "str q2, [x28, #112]", - "ldr q2, [x4, #688]", - "str q2, [x28, #128]", - "ldr q2, [x4, #704]", - "str q2, [x28, #144]", - "ldr q2, [x4, #720]", - "str q2, [x28, #160]", - "ldr q2, [x4, #736]", - "str q2, [x28, #176]", - "ldr q2, [x4, #752]", - "str q2, [x28, #192]", - "ldr q2, [x4, #768]", - "str q2, [x28, #208]", - "ldr q2, [x4, #784]", - "str q2, [x28, #224]", + "ldr q3, [x4, #592]", + "ldr q4, [x4, #608]", + "ldr q5, [x4, #624]", + "ldr q6, [x4, #640]", + "ldr q7, [x4, #656]", + "ldr q8, [x4, #672]", + "ldr q9, [x4, #688]", + "ldr q10, [x4, #704]", + "ldr q11, [x4, #720]", + "ldr q12, [x4, #736]", + "ldr q13, [x4, #752]", + "ldr q14, [x4, #768]", + "ldr q15, [x4, #784]", + "str q2, [sp]", "ldr q2, [x4, #800]", + "str q3, [sp, #32]", + "ldr q3, [x4, #816]", + "str q3, [x28, #256]", "str q2, [x28, #240]", - "ldr q2, [x4, #816]", - "str q2, [x28, #256]", + "str q15, [x28, #224]", + "str q14, [x28, #208]", + "str q13, [x28, #192]", + "str q12, [x28, #176]", + "str q11, [x28, #160]", + "str q10, [x28, #144]", + "str q9, [x28, #128]", + "str q8, [x28, #112]", + "str q7, [x28, #96]", + "str q6, [x28, #80]", + "str q5, [x28, #64]", + "str q4, [x28, #48]", + "ldr q2, [sp, #32]", + "str q2, [x28, #32]", + "ldr q2, [sp]", + "str q2, [x28, #16]", "b #+0x48", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "str q2, [x28, #32]", - "str q2, [x28, #48]", - "str q2, [x28, #64]", - "str q2, [x28, #80]", - "str q2, [x28, #96]", - "str q2, [x28, #112]", - "str q2, [x28, #128]", - "str q2, [x28, #144]", - "str q2, [x28, #160]", - "str q2, [x28, #176]", - "str q2, [x28, #192]", - "str q2, [x28, #208]", - "str q2, [x28, #224]", - "str q2, [x28, #240]", "str q2, [x28, #256]", + "str q2, [x28, #240]", + "str q2, [x28, #224]", + "str q2, [x28, #208]", + "str q2, [x28, #192]", + "str q2, [x28, #176]", + "str q2, [x28, #160]", + "str q2, [x28, #144]", + "str q2, [x28, #128]", + "str q2, [x28, #112]", + "str q2, [x28, #96]", + "str q2, [x28, #80]", + "str q2, [x28, #64]", + "str q2, [x28, #48]", + "str q2, [x28, #32]", + "str q2, [x28, #16]", "ldr x20, [x4, #512]", "ubfx x20, x20, #1, #2", "cbnz x20, #+0x8", @@ -1674,7 +1679,8 @@ "lsr x1, x20, #2", "bfi x0, x1, #24, #1", "msr fpcr, x0", - "b #+0x4" + "b #+0x4", + "add sp, sp, #0x40 (64)" ] }, "mfence": { diff --git a/unittests/InstructionCountCI/FlagM/VEX_map2.json b/unittests/InstructionCountCI/FlagM/VEX_map2.json index f83e40ecd..154194f20 100644 --- a/unittests/InstructionCountCI/FlagM/VEX_map2.json +++ b/unittests/InstructionCountCI/FlagM/VEX_map2.json @@ -349,9 +349,9 @@ "Map 2 0b00 0xf2 32-bit" ], "ExpectedArm64ASM": [ - "bic w4, w5, w7", - "mov x26, x4", - "tst w4, w4" + "bic w26, w5, w7", + "tst w26, w26", + "mov x4, x26" ] }, "andn rax, rbx, rcx": { @@ -360,9 +360,9 @@ "Map 2 0b00 0xf2 64-bit" ], "ExpectedArm64ASM": [ - "bic x4, x5, x7", - "mov x26, x4", - "tst x4, x4" + "bic x26, x5, x7", + "tst x26, x26", + "mov x4, x26" ] }, "bzhi eax, ebx, ecx": { diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json index adc3a9a69..4be0d9fc2 100644 --- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json +++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 2110, + "ExpectedInstructionCount": 2035, "x86Insts": [ "sub esp,0x2c", "mov ecx,dword [esp + 0x34]", @@ -87,8 +87,9 @@ "fucomi st0,st1" ], "ExpectedArm64ASM": [ + "subs w20, w8, #0x2c (44)", "mov x27, x8", - "subs w8, w8, #0x2c (44)", + "mov x8, x20", "ldr w5, [x8, #52]", "ldr w6, [x8, #48]", "ldr w4, [x8, #56]", @@ -127,7 +128,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -162,31 +162,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -253,10 +249,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -291,31 +285,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -381,13 +371,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -420,7 +409,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -455,31 +443,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -545,13 +529,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -584,14 +567,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -625,20 +607,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -670,13 +652,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -707,16 +688,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -750,19 +730,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -794,13 +774,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -831,16 +810,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -874,24 +852,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -925,31 +903,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -983,31 +959,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1041,31 +1015,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1104,18 +1076,16 @@ "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1149,14 +1119,12 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s3, [x8, #16]", @@ -1189,31 +1157,27 @@ "mov v3.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1247,19 +1211,17 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1293,14 +1255,12 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s3, [x8, #20]", @@ -1333,31 +1293,27 @@ "mov v3.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1391,19 +1347,17 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1437,14 +1391,12 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s3, [x8, #24]", @@ -1477,31 +1429,27 @@ "mov v3.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1535,29 +1483,25 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1591,14 +1535,12 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s3, [x8, #28]", @@ -1631,31 +1573,27 @@ "mov v3.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1689,19 +1627,17 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1735,31 +1671,29 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q4, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q4, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1796,9 +1730,9 @@ "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1832,31 +1766,29 @@ "eor v3.16b, v3.16b, v3.16b", "mov v3.d[0], x0", "mov v3.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q4, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q4, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q3, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q4, [x0, #1040]", @@ -1895,17 +1827,15 @@ "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1939,31 +1869,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2000,9 +1928,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2036,31 +1964,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2097,9 +2023,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2133,31 +2059,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w21, w21, w20", - "bic w21, w24, w21", - "strb w21, [x28, #1298]", + "bic w21, w22, w21", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w22, w20, #0x2 (2)", + "and w22, w22, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x22, lsl #4", + "ldr q3, [x0, #1040]", + "strb w24, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2189,18 +2113,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x21, x20, #1, #1", - "ubfx x22, x20, #0, #1", + "ubfx x22, x20, #1, #1", + "ubfx x23, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w21, w21, w20", "orr w22, w22, w20", - "rmif x21, #63, #nzCv", - "rmif x22, #62, #nZcv", - "eor w26, w20, #0x1" + "orr w23, w23, w20", + "rmif x22, #63, #nzCv", + "rmif x23, #62, #nZcv", + "eor w26, w20, #0x1", + "strb w21, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 863, + "ExpectedInstructionCount": 839, "x86Insts": [ "sub esp,0x1c", "mov edx,dword [esp + 0x20]", @@ -2280,17 +2205,16 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov x22, #0xffffffffffffffff", - "mov w23, #0x7fff", - "fmov d3, x22", - "mov v3.d[1], x23", + "mov x23, #0xffffffffffffffff", + "mov w24, #0x7fff", + "fmov d3, x23", + "mov v3.d[1], x24", "and v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2325,38 +2249,36 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "and v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "mov w25, #0x0", - "strb w25, [x28, #1017]", + "mov w12, #0x0", + "strb w12, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2388,43 +2310,41 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x24, x20, #1, #1", - "ubfx x12, x20, #0, #1", + "ubfx x25, x20, #1, #1", + "ubfx x13, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w24, w24, w20", - "orr w20, w12, w20", - "rmif x24, #63, #nzCv", + "orr w25, w25, w20", + "orr w20, w13, w20", + "rmif x25, #63, #nzCv", "rmif x20, #62, #nZcv", "csetm x20, hs", - "csel x20, x22, x20, eq", + "csel x20, x23, x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q4, [x0, #1040]", "bsl v2.16b, v4.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w12, w24", - "strb w24, [x28, #1298]", - "lsl w12, w21, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2455,17 +2375,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "and v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2500,18 +2419,185 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w12, w21, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", + "and v2.16b, v2.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "ldr q3, [x0, #1040]", + "strb w12, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1560]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov x20, x0", + "ubfx x25, x20, #1, #1", + "ubfx x13, x20, #0, #1", + "ubfx x20, x20, #2, #1", + "orr w25, w25, w20", + "orr w20, w13, w20", + "rmif x25, #63, #nzCv", + "rmif x20, #62, #nZcv", + "csetm x20, hs", + "csel x20, x23, x20, eq", + "dup v2.2d, x20", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "ldr q4, [x0, #1040]", + "bsl v2.16b, v4.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "lsl w25, w21, w25", + "orr w22, w22, w25", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x6, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x23", + "mov v3.d[1], x24", + "and v2.16b, v2.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "fmov d3, x23", + "mov v3.d[1], x24", "and v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2522,7 +2608,7 @@ "ldr q2, [x0, #1040]", "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", + "strb w12, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x24, lsl #4", @@ -2563,233 +2649,55 @@ "ldp x17, x30, [sp], #16", "mov x20, x0", "ubfx x24, x20, #1, #1", - "ubfx x12, x20, #0, #1", + "ubfx x25, x20, #0, #1", "ubfx x20, x20, #2, #1", "orr w24, w24, w20", - "orr w20, w12, w20", + "orr w20, w25, w20", "rmif x24, #63, #nzCv", "rmif x20, #62, #nZcv", "csetm x20, hs", - "csel x20, x22, x20, eq", + "csel x20, x23, x20, eq", "dup v2.2d, x20", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q4, [x0, #1040]", "bsl v2.16b, v4.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w12, w24", - "strb w24, [x28, #1298]", - "lsl w12, w21, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x6, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w12, w21, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", - "and v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add w23, w20, #0x1 (1)", "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1560]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov x20, x0", - "ubfx x23, x20, #1, #1", - "ubfx x24, x20, #0, #1", - "ubfx x20, x20, #2, #1", - "orr w23, w23, w20", - "orr w20, w24, w20", - "rmif x23, #63, #nzCv", - "rmif x20, #62, #nZcv", - "csetm x20, hs", - "csel x20, x22, x20, eq", - "dup v2.2d, x20", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q4, [x0, #1040]", - "bsl v2.16b, v4.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2823,31 +2731,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w25, [x28, #1017]", + "strb w12, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2884,9 +2790,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2920,19 +2826,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2969,9 +2873,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3005,26 +2909,22 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3062,9 +2962,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w22, w20, #0x0 (0)", + "and w22, w22, #0x7", + "add x0, x28, x22, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3096,18 +2996,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x21, x20, #1, #1", - "ubfx x22, x20, #0, #1", + "ubfx x22, x20, #1, #1", + "ubfx x23, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w21, w21, w20", "orr w22, w22, w20", - "rmif x21, #63, #nzCv", - "rmif x22, #62, #nZcv", - "eor w26, w20, #0x1" + "orr w23, w23, w20", + "rmif x22, #63, #nzCv", + "rmif x23, #62, #nZcv", + "eor w26, w20, #0x1", + "strb w21, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 1166, + "ExpectedInstructionCount": 1132, "x86Insts": [ "fld dword [ecx]", "fld dword [edx + 0x4]", @@ -3178,7 +3079,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3213,10 +3113,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3251,10 +3149,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3289,10 +3185,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3327,10 +3221,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3364,13 +3256,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x6, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3403,28 +3294,25 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3461,23 +3349,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3514,9 +3400,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3550,14 +3436,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", @@ -3623,17 +3507,17 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8]", @@ -3699,21 +3583,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3750,9 +3634,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3786,14 +3670,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", @@ -3826,17 +3708,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3870,31 +3750,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3928,31 +3806,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3986,26 +3862,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8]", @@ -4072,9 +3946,9 @@ "str q2, [x0, #1040]", "strb w21, [x8]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4108,14 +3982,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4]", @@ -4181,9 +4053,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4217,19 +4089,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4263,14 +4133,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -4302,17 +4170,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block4": { - "ExpectedInstructionCount": 241, + "ExpectedInstructionCount": 237, "x86Insts": [ "push ebp", "push edi", @@ -4374,13 +4241,13 @@ "str w11, [x8, #-4]!", "str w10, [x8, #-4]!", "str w7, [x8, #-4]!", - "mov x27, x8", "subs w26, w8, #0x4c (76)", "cfinv", + "mov x27, x8", "mov x8, x26", - "ldr w4, [x26, #104]", - "add w9, w26, #0x38 (56)", - "add w10, w26, #0x30 (48)", + "ldr w4, [x8, #104]", + "add w9, w8, #0x38 (56)", + "add w10, w8, #0x30 (48)", "ldrb w20, [x28, #1019]", "mov w21, #0x2098", "movk w21, #0x5, lsl #16", @@ -4418,7 +4285,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4521,13 +4387,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4560,7 +4425,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4594,27 +4458,26 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x423", "movk w20, #0x1, lsl #16", - "mov w21, #0xd0bc", - "movk w21, #0x6, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd0bc", + "movk w22, #0x6, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block5": { - "ExpectedInstructionCount": 1221, + "ExpectedInstructionCount": 1199, "x86Insts": [ "fld dword [esp + 0x80]", "fsub dword [esp + 0x7c]", @@ -4702,7 +4565,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4834,32 +4696,28 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w22, #0x0", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "mov w23, #0x0", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4893,26 +4751,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", @@ -5007,13 +4863,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5045,8 +4900,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5115,9 +4969,9 @@ "str q2, [x0, #1040]", "ldr s16, [x8, #44]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5246,13 +5100,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5284,8 +5137,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5353,9 +5205,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5484,13 +5336,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5522,8 +5373,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5591,9 +5441,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5627,14 +5477,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", @@ -5735,18 +5583,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", @@ -5782,29 +5628,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5835,35 +5679,31 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", - "mov x22, x0", - "ubfx x23, x22, #1, #1", - "ubfx x24, x22, #0, #1", - "ubfx x22, x22, #2, #1", - "orr w23, w23, w22", - "orr w24, w24, w22", - "rmif x23, #63, #nzCv", - "rmif x24, #62, #nZcv", - "eor w26, w22, #0x1", - "ldrb w22, [x28, #1298]", + "mov x23, x0", + "ubfx x24, x23, #1, #1", + "ubfx x25, x23, #0, #1", + "ubfx x23, x23, #2, #1", + "orr w24, w24, w23", + "orr w25, w25, w23", + "rmif x24, #63, #nzCv", + "rmif x25, #62, #nZcv", + "eor w26, w23, #0x1", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -5880,18 +5720,19 @@ "str w11, [x8]", "mov w20, #0x5f8", "movk w20, #0x1, lsl #16", - "mov w21, #0xb4fe", - "movk w21, #0x2, lsl #16", - "add w21, w20, w21", + "mov w22, #0xb4fe", + "movk w22, #0x2, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block6": { - "ExpectedInstructionCount": 1165, + "ExpectedInstructionCount": 1135, "x86Insts": [ "push ebp", "push edi", @@ -5938,8 +5779,9 @@ "str w11, [x8, #-4]!", "str w10, [x8, #-4]!", "str w7, [x8, #-4]!", + "subs w20, w8, #0x4 (4)", "mov x27, x8", - "subs w8, w8, #0x4 (4)", + "mov x8, x20", "ldr w5, [x8, #32]", "ldr w7, [x8, #36]", "ldr w4, [x8, #28]", @@ -5979,7 +5821,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6080,10 +5921,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6151,9 +5990,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6187,14 +6026,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x7]", @@ -6227,10 +6064,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6328,10 +6163,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6399,9 +6232,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6435,14 +6268,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", @@ -6475,10 +6306,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6576,10 +6405,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6647,9 +6474,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6683,14 +6510,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", @@ -6723,17 +6548,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6800,17 +6623,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6847,9 +6668,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6883,14 +6704,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4]", @@ -6923,17 +6742,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6970,9 +6787,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7006,43 +6823,39 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7074,35 +6887,33 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "mov x20, x0", - "ubfx x22, x20, #1, #1", - "ubfx x23, x20, #0, #1", + "ubfx x23, x20, #1, #1", + "ubfx x24, x20, #0, #1", "ubfx x20, x20, #2, #1", - "orr w22, w22, w20", "orr w23, w23, w20", - "rmif x22, #63, #nzCv", - "rmif x23, #62, #nZcv", + "orr w24, w24, w20", + "rmif x23, #63, #nzCv", + "rmif x24, #62, #nZcv", "eor w26, w20, #0x1", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block7": { - "ExpectedInstructionCount": 1067, + "ExpectedInstructionCount": 1045, "x86Insts": [ "fld dword [ebx + 0x4]", "fld dword [ebx]", @@ -7166,7 +6977,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7201,10 +7011,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7239,10 +7047,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7277,17 +7083,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7354,17 +7158,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7401,9 +7203,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7437,14 +7239,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", @@ -7510,17 +7310,17 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x6, #8]", @@ -7616,17 +7416,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7663,9 +7461,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7699,14 +7497,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", @@ -7772,9 +7568,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7808,14 +7604,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", @@ -7881,16 +7675,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x6, #8]", @@ -7956,9 +7750,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7992,26 +7786,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4]", @@ -8077,9 +7869,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8113,19 +7905,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8191,17 +7981,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block8": { - "ExpectedInstructionCount": 269, + "ExpectedInstructionCount": 258, "x86Insts": [ "fstp st0", "fstp st3", @@ -8242,83 +8031,76 @@ "mov w24, #0x1", "lsl w22, w24, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8350,23 +8132,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8398,23 +8179,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8446,13 +8226,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w21, [x28, #1298]", - "lsl w22, w24, w20", - "bic w21, w21, w22", - "strb w21, [x28, #1298]", + "lsl w21, w24, w20", + "bic w21, w22, w21", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8482,27 +8261,26 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "ldrb w21, [x28, #1298]", "lsl w22, w24, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x893", "movk w20, #0x1, lsl #16", - "mov w21, #0xd0b4", - "movk w21, #0x6, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd0b4", + "movk w22, #0x6, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block9": { - "ExpectedInstructionCount": 269, + "ExpectedInstructionCount": 258, "x86Insts": [ "fstp st0", "fstp st3", @@ -8543,83 +8321,76 @@ "mov w24, #0x1", "lsl w22, w24, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w24, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w24, w23", + "orr w22, w22, w23", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8651,23 +8422,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8699,23 +8469,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w24, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "strb w21, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8747,13 +8516,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w21, [x28, #1298]", - "lsl w22, w24, w20", - "bic w21, w21, w22", - "strb w21, [x28, #1298]", + "lsl w21, w24, w20", + "bic w21, w22, w21", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -8783,21 +8551,20 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8]", - "ldrb w21, [x28, #1298]", "lsl w22, w24, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x973", "movk w20, #0x1, lsl #16", - "mov w21, #0xd0b4", - "movk w21, #0x6, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd0b4", + "movk w22, #0x6, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] @@ -8940,9 +8707,9 @@ "ldr w20, [x28, #960]", "ldr w4, [x20, #20]", "str w4, [x8, #156]", - "mov w4, #0x0", - "mov x26, x4", - "tst w4, w4", + "mov w26, #0x0", + "tst w26, w26", + "mov x4, x26", "mov w20, #0x869c", "movk w20, #0x5, lsl #16", "add w20, w7, w20", diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json index b7a0d01d9..66afa5315 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json +++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 34853, + "ExpectedInstructionCount": 34065, "x86Insts": [ "sub esp,0x118", "fld dword [ecx + 0x1084]", @@ -964,7 +964,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1061,13 +1060,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1100,7 +1098,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1197,13 +1194,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1236,7 +1232,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1333,13 +1328,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1372,7 +1366,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1469,13 +1462,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1508,7 +1500,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1605,13 +1596,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4208]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1644,7 +1634,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1741,13 +1730,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4204]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1780,7 +1768,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1877,13 +1864,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1916,7 +1902,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2013,13 +1998,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2052,7 +2036,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2149,13 +2132,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2188,7 +2170,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2285,13 +2266,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2324,7 +2304,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2421,13 +2400,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2460,7 +2438,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2557,13 +2534,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2596,7 +2572,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2693,13 +2668,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4176]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2732,7 +2706,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2829,13 +2802,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4172]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2868,7 +2840,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2965,13 +2936,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4168]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3004,7 +2974,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3101,13 +3070,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3140,22 +3108,19 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w22, #0x0", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "mov w23, #0x0", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3190,31 +3155,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3248,26 +3209,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -3299,13 +3258,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3337,22 +3295,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3387,31 +3342,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3445,26 +3396,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -3496,13 +3445,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3534,22 +3482,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3584,31 +3529,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3642,26 +3583,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -3693,13 +3632,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3731,8 +3669,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3829,13 +3766,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3867,8 +3803,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3965,13 +3900,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4003,8 +3937,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4101,13 +4034,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4139,8 +4071,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4237,13 +4168,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4275,8 +4205,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4373,28 +4302,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4428,19 +4356,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0xc1d0", - "movk w23, #0xb3, lsl #16", - "ldr s2, [x23]", + "mov w24, #0xc1d0", + "movk w24, #0xb3, lsl #16", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -4470,17 +4396,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x5 (5)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4514,26 +4438,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -4565,160 +4487,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w24, #0xc1d4", - "movk w24, #0xb3, lsl #16", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #104]", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add w25, w20, #0x1 (1)", "and w25, w25, #0x7", "add x0, x28, x25, lsl #4", @@ -4755,17 +4529,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w25, #0xc1d8", + "mov w25, #0xc1d4", "movk w25, #0xb3, lsl #16", "ldr s2, [x25]", "mrs x0, nzcv", @@ -4858,79 +4630,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "str s2, [x8, #104]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", @@ -4963,10 +4673,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w12, #0xc1dc", + "mov w12, #0xc1d8", "movk w12, #0xb3, lsl #16", "ldr s2, [x12]", "mrs x0, nzcv", @@ -5059,15 +4774,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "str s2, [x8, #108]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5097,14 +4811,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5167,7 +4880,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w13, #0xc1e0", + "mov w13, #0xc1dc", "movk w13, #0xb3, lsl #16", "ldr s2, [x13]", "mrs x0, nzcv", @@ -5260,15 +4973,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "str s2, [x8, #112]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5298,14 +5010,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5368,7 +5079,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w14, #0xc1e4", + "mov w14, #0xc1e0", "movk w14, #0xb3, lsl #16", "ldr s2, [x14]", "mrs x0, nzcv", @@ -5461,15 +5172,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "str s2, [x8, #116]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5499,14 +5209,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5569,7 +5278,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w15, #0xc1e8", + "mov w15, #0xc1e4", "movk w15, #0xb3, lsl #16", "ldr s2, [x15]", "mrs x0, nzcv", @@ -5662,15 +5371,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "str s2, [x8, #120]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5700,14 +5408,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -5770,7 +5477,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w16, #0xc1ec", + "mov w16, #0xc1e8", "movk w16, #0xb3, lsl #16", "ldr s2, [x16]", "mrs x0, nzcv", @@ -5863,14 +5570,212 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "str s2, [x8, #124]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w17, w21, w20", + "orr w22, w22, w17", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w17, #0xc1ec", + "movk w17, #0xb3, lsl #16", + "ldr s2, [x17]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #128]", + "lsl w29, w21, w20", + "bic w22, w22, w29", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5902,22 +5807,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5952,31 +5854,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6010,26 +5908,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6061,13 +5957,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6099,22 +5994,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6149,31 +6041,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6207,26 +6095,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6258,13 +6144,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6296,22 +6181,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6346,31 +6228,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6404,26 +6282,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6455,13 +6331,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6493,8 +6368,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6591,28 +6465,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w17, w20, #0x4 (4)", - "and w17, w17, #0x7", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x4 (4)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x5 (5)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x5 (5)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6646,19 +6519,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w17, #0xc1f0", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "mov w29, #0xc1f0", + "movk w29, #0xb3, lsl #16", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6688,31 +6559,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x6 (6)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x6 (6)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6746,26 +6613,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x5 (5)", - "and w17, w17, #0x7", + "add w29, w20, #0x5 (5)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6797,28 +6662,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6852,19 +6716,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w17, #0xc1f4", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "mov w29, #0xc1f4", + "movk w29, #0xb3, lsl #16", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -6894,31 +6756,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x3 (3)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x3 (3)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6952,26 +6810,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7003,16 +6859,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7046,19 +6901,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w17, #0xc1f8", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "mov w29, #0xc1f8", + "movk w29, #0xb3, lsl #16", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7088,31 +6941,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x0 (0)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x0 (0)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x3 (3)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", + "add w29, w20, #0x3 (3)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7146,26 +6995,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w17, w20, #0x2 (2)", - "and w17, w17, #0x7", + "add w29, w20, #0x2 (2)", + "and w29, w29, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x17, lsl #4", + "add x0, x28, x29, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7197,13 +7044,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w17, [x28, #1298]", "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7235,8 +7081,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", + "orr w22, w22, w29", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7304,9 +7149,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w17, #0xc1fc", - "movk w17, #0xb3, lsl #16", - "ldr s2, [x17]", + "mov w29, #0xc1fc", + "movk w29, #0xb3, lsl #16", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -7336,31 +7181,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7394,26 +7235,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7445,13 +7284,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7483,22 +7321,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7533,31 +7368,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7591,26 +7422,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7642,13 +7471,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7680,8 +7508,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7778,13 +7605,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7816,8 +7642,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7914,13 +7739,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7952,8 +7776,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8050,16 +7873,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8093,19 +7915,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x4 (4)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x4 (4)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8171,13 +7991,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8209,8 +8028,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8278,9 +8096,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8346,13 +8164,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8384,8 +8201,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8453,9 +8269,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x3 (3)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8521,13 +8337,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8559,8 +8374,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8628,9 +8442,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8664,14 +8478,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8703,13 +8515,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8741,22 +8552,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8791,31 +8599,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8849,26 +8653,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8900,13 +8702,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8938,22 +8739,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9050,28 +8848,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9105,19 +8902,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w29, #0xc200", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w30, #0xc200", + "movk w30, #0xb3, lsl #16", + "ldr s2, [x30]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9147,31 +8942,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x3 (3)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x3 (3)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9205,26 +8996,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -9256,13 +9045,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9326,9 +9114,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w29, #0xc204", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w30, #0xc204", + "movk w30, #0xb3, lsl #16", + "ldr s2, [x30]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -9358,31 +9146,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9416,26 +9200,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -9467,13 +9249,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9505,22 +9286,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9617,13 +9395,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9655,8 +9432,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9753,13 +9529,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9823,9 +9598,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9891,13 +9666,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9929,8 +9703,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9998,9 +9771,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10066,13 +9839,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10104,22 +9876,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10216,13 +9985,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10254,8 +10022,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10352,13 +10119,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10422,9 +10188,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10490,13 +10256,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #108]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10528,8 +10293,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10597,9 +10361,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10665,13 +10429,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10703,22 +10466,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10815,13 +10575,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10853,8 +10612,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10951,13 +10709,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11021,9 +10778,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11089,13 +10846,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11127,8 +10883,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11196,9 +10951,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11264,13 +11019,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11302,22 +11056,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11414,13 +11165,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11484,9 +11234,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w29, #0xc208", - "movk w29, #0xb3, lsl #16", - "ldr s2, [x29]", + "mov w30, #0xc208", + "movk w30, #0xb3, lsl #16", + "ldr s2, [x30]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -11516,31 +11266,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x0 (0)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x0 (0)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x2 (2)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x2 (2)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11574,26 +11320,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x30, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -11625,13 +11369,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11663,8 +11406,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11761,13 +11503,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11799,8 +11540,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11868,9 +11608,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11936,13 +11676,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -11974,8 +11713,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12072,13 +11810,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12110,8 +11847,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12179,9 +11915,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12247,13 +11983,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12285,8 +12020,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12383,13 +12117,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12421,8 +12154,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12490,9 +12222,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12558,13 +12290,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12596,8 +12327,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12694,13 +12424,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12732,8 +12461,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12801,9 +12529,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12869,13 +12597,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12907,8 +12634,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13005,13 +12731,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13043,8 +12768,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13112,9 +12836,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13180,13 +12904,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13218,8 +12941,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13316,13 +13038,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13354,8 +13075,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13423,9 +13143,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13491,13 +13211,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13529,8 +13248,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13627,13 +13345,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13665,8 +13382,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13734,9 +13450,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13802,13 +13518,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13840,8 +13555,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13968,13 +13682,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #160]", - "ldrb w29, [x28, #1298]", "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", + "bic w22, w22, w30", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14006,17 +13719,16 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "orr w22, w22, w30", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w29, #0x8000", - "fmov d3, x22", - "mov v3.d[1], x29", + "mov w30, #0x8000", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14050,13 +13762,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #140]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14088,8 +13799,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14186,13 +13896,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #220]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14224,16 +13933,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14393,13 +14101,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #252]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14431,8 +14138,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14559,13 +14265,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #184]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14597,8 +14302,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14695,13 +14399,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #168]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14733,8 +14436,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14894,13 +14596,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #152]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14932,16 +14633,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14975,13 +14675,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15013,8 +14712,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15111,13 +14809,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #212]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15149,16 +14846,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15411,13 +15107,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15449,8 +15144,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15547,13 +15241,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #228]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15585,8 +15278,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15746,13 +15438,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #260]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15784,8 +15475,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15882,13 +15572,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #244]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15920,16 +15609,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15963,13 +15651,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #268]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16001,8 +15688,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16036,13 +15722,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #144]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16074,8 +15759,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16112,8 +15796,8 @@ "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16210,13 +15894,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #236]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16248,8 +15931,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16317,9 +15999,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc190", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc190", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16411,13 +16093,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16449,8 +16130,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16518,9 +16198,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc194", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc194", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16612,13 +16292,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16650,8 +16329,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16719,9 +16397,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc198", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc198", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -16813,13 +16491,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16851,8 +16528,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16920,9 +16596,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc19c", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc19c", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17014,13 +16690,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17052,8 +16727,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17121,9 +16795,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1a0", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1a0", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17215,13 +16889,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17253,8 +16926,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17322,9 +16994,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1a4", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1a4", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17416,13 +17088,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17454,8 +17125,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17523,9 +17193,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1a8", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1a8", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17617,13 +17287,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17655,8 +17324,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17724,9 +17392,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1ac", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1ac", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -17818,13 +17486,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17856,8 +17523,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17925,9 +17591,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1b0", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1b0", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18019,13 +17685,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18057,8 +17722,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18126,9 +17790,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1b4", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1b4", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18220,13 +17884,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18258,8 +17921,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18327,9 +17989,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1b8", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1b8", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18421,13 +18083,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18459,8 +18120,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18528,9 +18188,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1bc", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1bc", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18622,13 +18282,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18660,8 +18319,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18729,9 +18387,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1c0", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1c0", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -18823,13 +18481,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18861,8 +18518,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18930,9 +18586,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1c4", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1c4", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19024,13 +18680,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19062,8 +18717,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19131,9 +18785,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1c8", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1c8", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19225,13 +18879,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4164]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19263,8 +18916,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19332,9 +18984,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w30, #0xc1cc", - "movk w30, #0xb3, lsl #16", - "ldr s2, [x30]", + "mov w19, #0xc1cc", + "movk w19, #0xb3, lsl #16", + "ldr s2, [x19]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -19426,13 +19078,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19464,8 +19115,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19562,13 +19212,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19600,8 +19249,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19698,13 +19346,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19736,8 +19383,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19834,13 +19480,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19872,8 +19517,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19970,13 +19614,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20008,8 +19651,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20106,13 +19748,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20144,8 +19785,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20242,13 +19882,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20280,8 +19919,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20378,13 +20016,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20416,8 +20053,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20514,13 +20150,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w30, [x28, #1298]", "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "bic w22, w22, w19", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20552,8 +20187,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w19, w21, w20", - "orr w30, w30, w19", - "strb w30, [x28, #1298]", + "orr w22, w22, w19", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20621,205 +20255,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #100]", - "ldrb w23, [x28, #1298]", - "lsl w30, w21, w20", - "bic w23, w23, w30", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w23, w23, w30", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20911,15 +20346,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #100]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #8]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -20950,13 +20384,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #52]", + "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21110,15 +20543,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #108]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #104]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21149,13 +20581,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #48]", + "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21309,15 +20740,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #112]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #108]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21348,13 +20778,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #44]", + "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21508,15 +20937,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #116]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #112]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #20]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21547,13 +20975,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #40]", + "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21707,15 +21134,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #120]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #116]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #24]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21746,13 +21172,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #36]", + "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21906,15 +21331,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #124]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #120]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x8, #28]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -21945,13 +21369,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #32]", + "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -22105,14 +21528,210 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #128]", - "ldrb w23, [x28, #1298]", + "str s2, [x8, #124]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x17]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #128]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22144,8 +21763,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22242,13 +21860,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22280,8 +21897,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22378,13 +21994,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22416,8 +22031,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22514,13 +22128,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22552,8 +22165,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22650,13 +22262,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22688,8 +22299,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22757,9 +22367,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -22825,13 +22435,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22863,8 +22472,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22932,9 +22540,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -23000,13 +22608,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23038,8 +22645,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23107,9 +22713,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -23175,13 +22781,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23213,8 +22818,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23282,7 +22886,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x17]", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -23374,13 +22978,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23412,8 +23015,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23510,13 +23112,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23548,8 +23149,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23646,13 +23246,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23684,8 +23283,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23782,13 +23380,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23820,8 +23417,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23918,13 +23514,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23956,8 +23551,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24025,9 +23619,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -24061,26 +23655,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -24112,13 +23704,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24150,8 +23741,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24219,9 +23809,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -24255,26 +23845,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -24306,13 +23894,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24344,8 +23931,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24413,9 +23999,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -24449,26 +24035,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -24500,13 +24084,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24538,8 +24121,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24607,7 +24189,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x17]", + "ldr s2, [x29]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -24699,13 +24281,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24737,22 +24318,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24787,31 +24365,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -24845,26 +24419,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -24896,13 +24468,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24934,22 +24505,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25046,28 +24614,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25101,33 +24668,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25161,26 +24724,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -25212,13 +24773,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25282,9 +24842,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25350,13 +24910,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25388,22 +24947,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25438,31 +24994,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25496,26 +25048,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -25547,13 +25097,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25585,22 +25134,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25697,28 +25243,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25752,33 +25297,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25812,26 +25353,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -25863,13 +25402,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25933,9 +25471,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26001,13 +25539,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26039,22 +25576,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26089,31 +25623,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26147,26 +25677,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26198,13 +25726,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26236,22 +25763,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26348,28 +25872,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26403,33 +25926,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26463,26 +25982,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26514,13 +26031,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #108]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26584,9 +26100,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26652,13 +26168,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26690,22 +26205,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26740,31 +26252,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26798,26 +26306,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26849,13 +26355,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26887,22 +26392,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26999,28 +26501,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27054,31 +26555,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27112,26 +26611,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -27163,13 +26660,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27201,15 +26697,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27243,19 +26738,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27289,14 +26782,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -27328,13 +26819,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27366,22 +26856,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27416,31 +26903,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27474,26 +26957,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -27525,16 +27006,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27568,19 +27048,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27646,13 +27124,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27684,22 +27161,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27734,31 +27208,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27792,26 +27262,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -27843,16 +27311,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27886,19 +27353,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27964,13 +27429,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28002,22 +27466,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28052,31 +27513,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28110,26 +27567,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -28161,16 +27616,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28204,19 +27658,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28282,13 +27734,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28320,22 +27771,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28370,31 +27818,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28428,26 +27872,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -28479,16 +27921,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28522,19 +27963,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28600,13 +28039,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28638,22 +28076,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28688,31 +28123,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28746,26 +28177,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -28797,16 +28226,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28840,19 +28268,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28918,13 +28344,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28956,22 +28381,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29006,31 +28428,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29064,26 +28482,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -29115,16 +28531,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29158,19 +28573,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29236,13 +28649,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29274,22 +28686,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29324,31 +28733,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29382,26 +28787,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -29433,16 +28836,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29476,19 +28878,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29554,13 +28954,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29592,22 +28991,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29642,31 +29038,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29700,26 +29092,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -29751,16 +29141,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29794,19 +29183,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29840,14 +29227,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -29879,13 +29264,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29917,22 +29301,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29967,31 +29348,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30025,26 +29402,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -30076,13 +29451,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #196]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30114,22 +29488,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -30164,31 +29535,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30222,26 +29589,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -30273,13 +29638,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #188]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30311,8 +29675,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -30410,31 +29773,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30468,26 +29827,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -30519,30 +29876,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #164]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30671,13 +30025,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #180]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30709,15 +30062,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30783,30 +30135,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #172]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30935,13 +30284,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30973,8 +30321,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31071,13 +30418,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #148]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31109,16 +30455,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31152,13 +30497,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #272]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31190,8 +30534,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31226,31 +30569,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31284,26 +30623,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -31335,13 +30672,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #208]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31373,8 +30709,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31442,9 +30777,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31510,13 +30845,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #156]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31548,16 +30882,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31591,13 +30924,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #136]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31629,8 +30961,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31698,9 +31029,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31766,13 +31097,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #216]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31804,23 +31134,22 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31854,33 +31183,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31914,33 +31239,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31974,26 +31295,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -32025,13 +31344,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32063,29 +31381,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32119,14 +31434,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", @@ -32159,17 +31472,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32298,13 +31609,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #232]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32336,15 +31646,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32378,14 +31687,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", @@ -32418,17 +31725,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32462,33 +31767,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32522,26 +31823,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -32573,13 +31872,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #224]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32611,29 +31909,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32667,14 +31962,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", @@ -32707,17 +32000,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32846,13 +32137,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #240]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32884,8 +32174,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32953,9 +32242,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32989,28 +32278,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x5, #4100]", "ldr w6, [x5, #4096]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "add w4, w6, w4, lsl #2", "ldrb w20, [x28, #1019]", @@ -33043,13 +32330,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33081,29 +32367,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -33137,26 +32420,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -33188,13 +32469,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #248]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33226,23 +32506,22 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -33276,31 +32555,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -33334,19 +32611,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -33412,13 +32687,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33450,22 +32724,19 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33562,16 +32833,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #264]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -33605,26 +32875,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -33656,13 +32924,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #256]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33694,8 +32961,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33729,13 +32995,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33767,8 +33032,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33802,13 +33066,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33840,8 +33103,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33875,13 +33137,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #128]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33913,8 +33174,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33948,13 +33208,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #192]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33986,8 +33245,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34021,13 +33279,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #256]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34059,8 +33316,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34125,10 +33381,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34193,10 +33447,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34261,10 +33513,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34329,10 +33579,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34366,13 +33614,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #576]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34404,8 +33651,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34470,10 +33716,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34507,13 +33751,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #704]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34545,8 +33788,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34580,23 +33822,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #768]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -34659,10 +33900,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34696,23 +33935,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #896]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -34747,10 +33985,8 @@ "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", @@ -34785,17 +34021,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1024]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34829,13 +34064,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1088]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34867,16 +34101,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34910,29 +34143,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1152]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34966,13 +34198,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1216]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35004,16 +34235,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35047,13 +34277,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1280]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #188]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35085,16 +34314,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35128,29 +34356,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1344]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35184,13 +34411,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1408]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35222,16 +34448,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35265,29 +34490,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1472]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35321,29 +34545,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1536]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35377,29 +34600,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1600]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35433,17 +34655,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1664]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x29", + "fmov d3, x23", + "mov v3.d[1], x30", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35477,13 +34698,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1728]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35516,7 +34736,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35550,13 +34769,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1792]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35589,7 +34807,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35623,13 +34840,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1856]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35662,7 +34878,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35696,13 +34911,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1920]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #272]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35735,7 +34949,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35769,10 +34982,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #1984]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -35780,11 +34991,12 @@ "eor w27, w20, w5", "subs w26, w20, w5", "cfinv", - "add w4, w5, #0x800 (2048)" + "add w4, w5, #0x800 (2048)", + "strb w21, [x28, #1298]" ] }, "Block2": { - "ExpectedInstructionCount": 22706, + "ExpectedInstructionCount": 22089, "x86Insts": [ "mov eax,dword [ebp + 0x8]", "fld dword [eax + 0x40]", @@ -36454,7 +35666,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36489,17 +35700,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36565,13 +35774,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #68]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36604,29 +35812,26 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w22, #0x0", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "mov w23, #0x0", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36660,26 +35865,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -36711,13 +35914,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36749,29 +35951,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36805,26 +36004,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -36856,13 +36053,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36894,29 +36090,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36950,26 +36143,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37001,13 +36192,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37039,29 +36229,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37095,26 +36282,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37146,13 +36331,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37184,29 +36368,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37240,26 +36421,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37291,13 +36470,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37329,29 +36507,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37385,26 +36560,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37436,13 +36609,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37474,29 +36646,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37530,26 +36699,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37581,13 +36748,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37619,29 +36785,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37675,26 +36838,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37726,13 +36887,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37764,29 +36924,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37820,26 +36977,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -37871,13 +37026,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37909,29 +37063,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37965,26 +37116,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38016,13 +37165,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38054,29 +37202,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38110,26 +37255,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38161,13 +37304,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38199,29 +37341,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38255,26 +37394,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38306,13 +37443,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38344,29 +37480,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38400,26 +37533,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38451,13 +37582,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38489,29 +37619,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38545,26 +37672,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38596,13 +37721,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38634,29 +37758,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38690,26 +37811,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38741,13 +37860,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38779,8 +37897,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38815,23 +37932,21 @@ "mov v2.8b, v0.8b", "str d2, [x8, #32]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38865,26 +37980,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -38916,13 +38029,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38954,8 +38066,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39020,10 +38131,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39058,17 +38167,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39134,13 +38241,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39172,29 +38278,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39228,26 +38331,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -39279,13 +38380,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39317,29 +38417,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39373,26 +38470,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -39424,13 +38519,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39462,29 +38556,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39518,26 +38609,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -39569,13 +38658,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39607,29 +38695,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39663,26 +38748,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -39714,13 +38797,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39752,29 +38834,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39808,26 +38887,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -39859,13 +38936,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39897,29 +38973,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39953,26 +39026,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -40004,16 +39075,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40047,14 +39117,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -40086,13 +39154,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40124,8 +39191,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40159,16 +39225,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40202,7 +39267,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -40234,13 +39299,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40272,8 +39336,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40338,10 +39401,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40376,9 +39437,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #40]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40412,14 +39473,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -40451,13 +39510,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -40489,8 +39547,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40525,10 +39582,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40593,10 +39648,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -40631,31 +39684,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b70", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b70", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40685,17 +39734,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40732,21 +39779,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40780,33 +39827,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b68", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b68", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40836,17 +39879,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40883,21 +39924,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -40931,33 +39972,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b60", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b60", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -40987,17 +40024,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41034,21 +40069,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41082,14 +40117,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -41121,13 +40154,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #192]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41159,15 +40191,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41204,9 +40235,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41273,17 +40304,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41317,12 +40346,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41356,19 +40385,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41434,30 +40461,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #208]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41557,23 +40581,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41610,9 +40632,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41646,33 +40668,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41709,9 +40727,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41745,14 +40763,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -41784,30 +40800,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #184]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41907,23 +40920,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41960,9 +40971,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -41996,33 +41007,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42059,9 +41066,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42095,14 +41102,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -42134,13 +41139,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #200]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42172,15 +41176,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x6 (6)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x6 (6)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42214,31 +41217,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42272,26 +41273,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", @@ -42357,9 +41356,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42393,14 +41392,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -42432,13 +41429,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42470,15 +41466,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b58", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b58", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42570,13 +41565,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42608,8 +41602,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42674,10 +41667,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42742,10 +41733,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42810,10 +41799,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42848,9 +41835,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #40]", "ldrb w20, [x28, #1019]", - "mov w24, #0x7b50", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "mov w25, #0x7b50", + "movk w25, #0xa7, lsl #16", + "ldr d2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42880,17 +41867,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42927,21 +41912,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -42975,19 +41960,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w24, #0x7b48", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "mov w25, #0x7b48", + "movk w25, #0xa7, lsl #16", + "ldr d2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43017,17 +42000,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43064,21 +42045,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43112,19 +42093,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w24, #0x7b40", - "movk w24, #0xa7, lsl #16", - "ldr d2, [x24]", + "mov w25, #0x7b40", + "movk w25, #0xa7, lsl #16", + "ldr d2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43154,17 +42133,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43201,21 +42178,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43249,14 +42226,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -43288,13 +42263,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #180]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43326,8 +42300,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43362,17 +42335,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43406,19 +42377,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -43484,7 +42455,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr d2, [x23]", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43576,13 +42547,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #196]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43614,15 +42584,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43722,21 +42691,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43773,9 +42742,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43809,14 +42778,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -43849,17 +42816,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43896,9 +42861,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43932,14 +42897,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -43971,13 +42934,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #168]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44009,15 +42971,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44147,17 +43108,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44194,9 +43153,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44230,14 +43189,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -44270,17 +43227,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44317,9 +43272,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44353,14 +43308,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -44392,13 +43345,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #144]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44430,8 +43382,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44466,9 +43417,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #8]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44502,7 +43453,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -44534,13 +43485,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44572,8 +43522,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44638,10 +43587,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44676,9 +43623,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #160]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44712,14 +43659,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -44751,13 +43696,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44789,8 +43733,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44855,10 +43798,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44892,13 +43833,12 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8, #136]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44930,8 +43870,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44965,13 +43904,12 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8, #24]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45003,8 +43941,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -45038,16 +43975,15 @@ "ldp x17, x30, [sp], #16", "mov v2.8b, v0.8b", "str d2, [x8, #40]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45177,17 +44113,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45224,9 +44158,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45260,14 +44194,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -45300,17 +44232,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x7 (7)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x7 (7)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45347,9 +44277,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45383,14 +44313,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -45422,13 +44350,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #176]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45460,8 +44387,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -45622,17 +44548,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45666,12 +44590,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45705,14 +44629,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -45807,13 +44729,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45845,15 +44766,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45983,17 +44903,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x5 (5)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46030,9 +44948,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46066,14 +44984,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -46106,17 +45022,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46153,9 +45067,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46189,14 +45103,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -46228,13 +45140,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #160]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46266,29 +45177,26 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46322,14 +45230,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #136]", @@ -46362,17 +45268,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46406,14 +45310,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", @@ -46446,17 +45348,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x7 (7)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x7 (7)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46490,31 +45390,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", + "add w25, w20, #0x5 (5)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46548,14 +45446,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", @@ -46588,31 +45484,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x5 (5)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46646,31 +45538,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46704,26 +45594,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -46755,13 +45643,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46793,15 +45680,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46835,26 +45721,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr d2, [x8, #24]", @@ -46983,7 +45867,1246 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x4 (4)", + "add w25, w20, #0x4 (4)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w25, #0x7bd8", + "movk w25, #0xa7, lsl #16", + "ldr d2, [x25]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #24]", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #20]", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x6 (6)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x5 (5)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x25, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #20]", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w25, w21, w20", + "orr w22, w22, w25", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1448]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "mov v2.8b, v0.8b", + "str d2, [x8, #32]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr d2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #152]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x7 (7)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", "and w24, w24, #0x7", "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", @@ -47019,10 +47142,123 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #136]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr d2, [x8, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -47035,13 +47271,549 @@ "ldr q2, [x0, #1040]", "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w24, #0x7bd8", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #32]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #180]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #192]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #8]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #176]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w24, #0x7b38", "movk w24, #0xa7, lsl #16", "ldr d2, [x24]", "mrs x0, nzcv", @@ -47134,1960 +47906,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #24]", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x6 (6)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x5 (5)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1448]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "mov v2.8b, v0.8b", - "str d2, [x8, #32]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr d2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #152]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x7 (7)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #136]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr d2, [x8, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #180]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #192]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #176]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w23, #0x7b38", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49119,8 +47944,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49155,31 +47979,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49245,16 +48065,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49288,14 +48107,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -49327,13 +48144,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49365,8 +48181,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49401,31 +48216,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49491,13 +48302,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49529,8 +48339,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49595,10 +48404,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49633,9 +48440,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #152]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49669,19 +48476,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7bd0", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7bd0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -49773,13 +48578,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49811,8 +48615,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49847,10 +48650,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49885,9 +48686,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49953,13 +48754,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50052,13 +48852,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50090,8 +48889,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50156,10 +48954,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50194,9 +48990,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #184]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50230,14 +49026,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -50269,13 +49063,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50307,8 +49100,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50373,10 +49165,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50411,9 +49201,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #160]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50447,19 +49237,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b30", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b30", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -50551,13 +49339,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50589,8 +49376,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50625,10 +49411,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50663,9 +49447,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50731,13 +49515,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50830,13 +49613,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50868,8 +49650,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50934,10 +49715,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50972,9 +49751,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #200]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51008,14 +49787,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -51047,13 +49824,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51085,8 +49861,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51151,10 +49926,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51189,9 +49962,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #40]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51225,19 +49998,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b28", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b28", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -51329,13 +50100,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51367,8 +50137,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51403,10 +50172,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51441,9 +50208,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51509,13 +50276,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51608,13 +50374,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51646,8 +50411,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51682,10 +50446,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51720,9 +50482,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #128]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51788,13 +50550,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51887,13 +50648,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #108]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #200]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51925,8 +50685,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52023,13 +50782,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52061,8 +50819,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52130,9 +50887,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b20", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b20", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52224,13 +50981,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52262,8 +51018,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52298,10 +51053,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52336,9 +51089,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52404,13 +51157,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52503,13 +51255,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52541,8 +51292,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52639,13 +51389,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52677,8 +51426,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52746,9 +51494,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b18", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b18", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -52840,13 +51588,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52878,8 +51625,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52914,10 +51660,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52952,9 +51696,9 @@ "mov v2.8b, v0.8b", "str d2, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53020,13 +51764,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53119,16 +51862,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53162,14 +51904,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -53201,13 +51941,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr d2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53239,8 +51978,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -53308,9 +52046,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7be0", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7be0", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53402,13 +52140,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53440,8 +52177,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -53476,31 +52212,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53566,16 +52298,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53609,14 +52340,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -53648,28 +52377,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53703,26 +52431,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -53754,16 +52480,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53797,19 +52522,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w23, #0x7b10", - "movk w23, #0xa7, lsl #16", - "ldr d2, [x23]", + "mov w24, #0x7b10", + "movk w24, #0xa7, lsl #16", + "ldr d2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -53901,13 +52624,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53939,8 +52661,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -53975,33 +52696,29 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w4, w5, w5, lsl #3", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w5, [x9, #12]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -54073,16 +52790,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -54116,14 +52832,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -54155,13 +52869,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54193,31 +52906,28 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x8000", - "fmov d3, x22", - "mov v3.d[1], x23", + "mov w24, #0x8000", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54314,13 +53024,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54352,8 +53061,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54388,39 +53096,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -54454,26 +53158,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -54505,13 +53207,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #4]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54543,8 +53244,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54579,39 +53279,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -54645,26 +53341,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -54696,13 +53390,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #8]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54734,8 +53427,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54770,39 +53462,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -54836,26 +53524,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -54887,13 +53573,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #12]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54925,8 +53610,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54961,39 +53645,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55027,26 +53707,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -55078,13 +53756,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #16]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55116,8 +53793,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55152,39 +53828,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55218,26 +53890,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -55269,13 +53939,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55307,8 +53976,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55343,25 +54011,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55395,14 +54061,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -55434,13 +54098,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #24]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55472,8 +54135,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55508,25 +54170,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55560,14 +54220,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -55599,13 +54257,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #28]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55637,8 +54294,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55673,25 +54329,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -55725,14 +54379,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -55764,13 +54416,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #32]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55803,7 +54454,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55900,13 +54550,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #36]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55939,7 +54588,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56036,13 +54684,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56075,7 +54722,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56172,13 +54818,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56271,13 +54916,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56370,13 +55014,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #52]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56469,13 +55112,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56568,13 +55210,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #60]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56667,13 +55308,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #64]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56766,13 +55406,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #68]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56805,7 +55444,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56840,17 +55478,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56916,13 +55552,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #72]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56955,7 +55590,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56990,17 +55624,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57066,13 +55698,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #76]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57105,7 +55736,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57140,17 +55770,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57216,13 +55844,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #80]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57255,7 +55882,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57290,17 +55916,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57366,13 +55990,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #84]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57405,7 +56028,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57440,17 +56062,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57516,13 +56136,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #88]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57555,7 +56174,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57590,17 +56208,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57666,13 +56282,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #92]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57705,7 +56320,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57832,13 +56446,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #96]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57871,7 +56484,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57998,13 +56610,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #100]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58037,7 +56648,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -58072,17 +56682,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58148,13 +56756,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #104]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58247,13 +56854,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #108]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58286,7 +56892,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -58383,13 +56988,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #112]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58422,7 +57026,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -58519,13 +57122,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #116]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58618,13 +57220,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #120]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58717,13 +57318,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #124]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58816,13 +57416,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #128]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58915,13 +57514,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #132]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59014,13 +57612,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #136]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59113,21 +57710,19 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #140]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov x8, x9", - "ldr w20, [x9]", - "add x8, x9, #0x4 (4)", - "mov x9, x20" + "ldr w9, [x8]", + "add x8, x8, #0x4 (4)", + "strb w21, [x28, #1298]" ] }, "Block3": { - "ExpectedInstructionCount": 21364, + "ExpectedInstructionCount": 20918, "x86Insts": [ "fld dword [esi + 0x64]", "mov eax,dword [esi + 0x88]", @@ -59815,7 +58410,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59850,14 +58444,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x10, #140]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59890,7 +58483,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59925,15 +58517,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov w23, #0x3f", - "str w23, [x8, #740]", + "mov w20, #0x3f", + "str w20, [x8, #740]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59966,7 +58557,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60001,14 +58591,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w5, [x8, #152]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60041,7 +58630,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60076,14 +58664,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w4, [x8, #232]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60116,7 +58703,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60151,14 +58737,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w6, [x8, #240]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60191,7 +58776,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60225,13 +58809,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #244]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60264,7 +58847,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60298,13 +58880,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60337,7 +58918,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60372,17 +58952,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60448,13 +59026,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #140]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60487,14 +59064,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60560,13 +59136,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60659,13 +59234,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60698,7 +59272,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60732,13 +59305,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60771,7 +59343,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60805,13 +59376,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60844,7 +59414,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60878,13 +59447,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60917,7 +59485,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60951,13 +59518,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60990,7 +59556,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61025,17 +59590,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61101,13 +59664,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61140,14 +59702,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61213,13 +59774,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61312,13 +59872,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #256]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61351,7 +59910,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61385,13 +59943,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61424,7 +59981,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61459,17 +60015,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61535,13 +60089,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61574,7 +60127,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61639,17 +60191,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61715,13 +60265,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61754,7 +60303,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61819,17 +60367,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -61895,13 +60441,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61934,7 +60479,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61999,17 +60543,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62075,13 +60617,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62114,7 +60655,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62148,13 +60688,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62187,14 +60726,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62260,13 +60798,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #140]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62299,7 +60836,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62333,13 +60869,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62372,14 +60907,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62445,13 +60979,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62484,7 +61017,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62518,13 +61050,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62557,14 +61088,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62630,13 +61160,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62669,7 +61198,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62703,13 +61231,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62742,14 +61269,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62815,13 +61341,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62854,7 +61379,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62888,13 +61412,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62927,14 +61450,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62968,27 +61490,25 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -63020,13 +61540,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63057,9 +61576,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63093,13 +61611,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63130,9 +61647,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63167,17 +61683,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63243,13 +61757,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63280,9 +61793,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63317,17 +61829,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63393,13 +61903,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63430,9 +61939,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63467,17 +61975,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63543,13 +62049,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63580,9 +62085,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63679,13 +62183,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63716,9 +62219,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63815,13 +62317,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63852,9 +62353,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63951,13 +62451,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63988,9 +62487,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64087,13 +62585,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64124,9 +62621,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64223,13 +62719,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64260,9 +62755,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64359,13 +62853,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64396,9 +62889,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64432,14 +62924,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #92]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64470,9 +62961,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64507,14 +62997,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #96]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64545,9 +63034,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64582,24 +63070,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #100]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "str w6, [x8, #252]", "ldrb w20, [x28, #1019]", @@ -64633,16 +63120,16 @@ "fmov s2, s0", "str s2, [x8, #92]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -64675,16 +63162,16 @@ "fmov s2, s0", "str s2, [x8, #132]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -64747,10 +63234,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64784,13 +63269,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64821,9 +63305,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64857,13 +63340,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64894,9 +63376,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64930,13 +63411,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64967,9 +63447,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65003,13 +63482,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65040,9 +63518,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65076,13 +63553,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65113,9 +63589,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65149,13 +63624,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65186,16 +63660,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65261,13 +63734,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65298,16 +63770,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65373,13 +63844,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65410,16 +63880,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65485,13 +63954,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65522,9 +63990,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65621,13 +64088,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65658,9 +64124,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65757,13 +64222,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65794,9 +64258,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65893,13 +64356,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65930,9 +64392,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66029,13 +64490,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66066,9 +64526,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66165,13 +64624,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66202,9 +64660,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66301,13 +64758,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66338,9 +64794,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66374,14 +64829,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #20]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66412,9 +64866,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66449,14 +64902,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #24]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66487,9 +64939,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66524,24 +64975,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #28]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "str w6, [x8, #264]", "ldrb w20, [x28, #1019]", @@ -66575,16 +65025,16 @@ "fmov s2, s0", "str s2, [x8, #92]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -66617,16 +65067,16 @@ "fmov s2, s0", "str s2, [x8, #132]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -66689,10 +65139,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66726,13 +65174,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66763,9 +65210,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66799,13 +65245,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66836,9 +65281,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66872,13 +65316,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66909,9 +65352,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66945,13 +65387,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66982,9 +65423,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67018,13 +65458,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67055,9 +65494,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67091,13 +65529,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67128,16 +65565,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -67203,13 +65639,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67240,16 +65675,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -67315,13 +65749,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67352,16 +65785,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -67427,13 +65859,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67464,9 +65895,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67563,13 +65993,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67600,9 +66029,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67699,13 +66127,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67736,9 +66163,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67835,13 +66261,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -67872,9 +66297,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67971,13 +66395,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68008,9 +66431,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68107,13 +66529,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68144,9 +66565,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68243,13 +66663,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68280,9 +66699,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68316,14 +66734,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #20]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68354,9 +66771,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68391,14 +66807,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #24]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68429,9 +66844,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68466,24 +66880,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #28]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "str w6, [x8, #276]", "ldrb w20, [x28, #1019]", @@ -68516,23 +66929,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -68564,23 +66976,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -68612,13 +67023,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68649,9 +67059,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68685,13 +67094,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68722,9 +67130,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68758,13 +67165,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68795,9 +67201,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68831,13 +67236,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68868,9 +67272,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68904,13 +67307,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68941,9 +67343,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68977,13 +67378,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69014,9 +67414,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69050,13 +67449,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69087,16 +67485,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -69130,26 +67527,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -69181,13 +67576,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69218,16 +67612,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -69261,26 +67654,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -69312,13 +67703,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69411,13 +67801,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69448,9 +67837,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69547,13 +67935,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69584,9 +67971,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69683,13 +68069,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69720,9 +68105,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69819,13 +68203,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69856,9 +68239,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69955,13 +68337,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69992,9 +68373,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70091,13 +68471,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70128,9 +68507,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70227,13 +68605,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70264,9 +68641,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70300,14 +68676,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #20]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70338,9 +68713,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70376,13 +68750,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70413,9 +68786,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70450,14 +68822,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #28]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70488,9 +68859,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70526,13 +68896,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70563,9 +68932,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70601,13 +68969,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70638,9 +69005,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70677,14 +69043,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w4, [x8, #172]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70715,9 +69080,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70752,14 +69116,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w6, [x8, #180]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70790,9 +69153,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70826,13 +69188,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70863,9 +69224,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70899,13 +69259,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #244]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70936,9 +69295,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70972,13 +69330,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71009,9 +69366,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71046,17 +69402,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -71122,13 +69476,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71159,16 +69512,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -71234,13 +69586,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71333,13 +69684,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71370,9 +69720,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71406,13 +69755,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71443,9 +69791,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71479,13 +69826,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71516,9 +69862,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71552,13 +69897,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71589,9 +69933,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71625,13 +69968,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71662,9 +70004,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71699,17 +70040,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -71775,13 +70114,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71812,16 +70150,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -71887,13 +70224,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71986,13 +70322,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #256]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72023,9 +70358,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72059,13 +70393,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72096,9 +70429,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72133,17 +70465,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -72209,13 +70539,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72246,9 +70575,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72313,17 +70641,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -72389,13 +70715,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72426,9 +70751,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72493,17 +70817,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -72569,13 +70891,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72606,9 +70927,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72673,17 +70993,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -72749,13 +71067,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72786,9 +71103,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72822,13 +71138,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72859,16 +71174,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -72934,13 +71248,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72971,9 +71284,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73007,13 +71319,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73044,16 +71355,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -73119,13 +71429,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73156,9 +71465,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73192,13 +71500,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73229,16 +71536,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -73304,13 +71610,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73341,9 +71646,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73377,13 +71681,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73414,16 +71717,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -73489,13 +71791,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #140]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73526,9 +71827,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73562,13 +71862,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73599,16 +71898,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -73642,26 +71940,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -73693,13 +71989,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73730,9 +72025,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73766,13 +72060,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #148]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73803,9 +72096,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73840,17 +72132,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -73916,13 +72206,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -73953,9 +72242,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -73990,17 +72278,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -74066,13 +72352,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74103,9 +72388,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74140,17 +72424,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -74216,13 +72498,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74253,9 +72534,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74352,13 +72632,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74389,9 +72668,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74488,13 +72766,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74525,9 +72802,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74624,13 +72900,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74661,9 +72936,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74760,13 +73034,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74797,9 +73070,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74896,13 +73168,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -74933,9 +73204,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75032,13 +73302,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75069,9 +73338,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75105,14 +73373,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #112]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75143,9 +73410,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75180,14 +73446,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #116]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75218,9 +73483,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75255,24 +73519,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #120]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "str w6, [x8, #192]", "ldrb w20, [x28, #1019]", @@ -75306,16 +73569,16 @@ "fmov s2, s0", "str s2, [x8, #92]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -75348,16 +73611,16 @@ "fmov s2, s0", "str s2, [x8, #132]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -75420,10 +73683,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75457,13 +73718,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75494,9 +73754,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75530,13 +73789,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75567,9 +73825,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75603,13 +73860,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75640,9 +73896,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75676,13 +73931,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75713,9 +73967,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75749,13 +74002,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75786,9 +74038,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75822,13 +74073,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75859,16 +74109,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -75934,13 +74183,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -75971,16 +74219,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -76046,13 +74293,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76083,16 +74329,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -76158,13 +74403,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76195,9 +74439,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76294,13 +74537,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76331,9 +74573,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76430,13 +74671,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76467,9 +74707,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76566,13 +74805,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76603,9 +74841,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76702,13 +74939,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76739,9 +74975,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76838,13 +75073,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76875,9 +75109,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -76974,13 +75207,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77011,9 +75243,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77047,14 +75278,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #112]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77085,9 +75315,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77122,14 +75351,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #116]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77160,9 +75388,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77197,24 +75424,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #120]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "str w6, [x8, #204]", "ldrb w20, [x28, #1019]", @@ -77248,16 +75474,16 @@ "fmov s2, s0", "str s2, [x8, #92]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -77290,16 +75516,16 @@ "fmov s2, s0", "str s2, [x8, #132]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -77362,10 +75588,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77399,13 +75623,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77436,9 +75659,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77472,13 +75694,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77509,9 +75730,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77545,13 +75765,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77582,9 +75801,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77618,13 +75836,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77655,9 +75872,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77691,13 +75907,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77728,9 +75943,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77764,13 +75978,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77801,16 +76014,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -77876,13 +76088,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -77913,16 +76124,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -77988,13 +76198,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78025,16 +76234,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -78100,13 +76308,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78137,9 +76344,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78236,13 +76442,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78273,9 +76478,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78372,13 +76576,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78409,9 +76612,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78508,13 +76710,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78545,9 +76746,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78644,13 +76844,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78681,9 +76880,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78780,13 +76978,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78817,9 +77014,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78916,13 +77112,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -78953,9 +77148,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78989,14 +77183,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #112]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79027,9 +77220,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79064,14 +77256,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #116]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79102,9 +77293,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79139,27 +77329,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w6, [x8, #120]", "str w6, [x8, #216]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "str w23, [x8, #-4]!", + "str w24, [x8, #-4]!", + "strb w22, [x28, #1298]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -79191,22 +77381,22 @@ "fmov s2, s0", "str s2, [x8, #96]", "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -79238,23 +77428,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #136]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -79286,13 +77475,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79323,9 +77511,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79359,13 +77546,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79396,9 +77582,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79432,13 +77617,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79469,9 +77653,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79505,13 +77688,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79542,9 +77724,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79578,13 +77759,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79615,9 +77795,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79651,13 +77830,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79688,9 +77866,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79724,13 +77901,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79761,16 +77937,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -79804,26 +77979,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -79855,13 +78028,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -79892,16 +78064,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -79935,26 +78106,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -79986,13 +78155,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80085,13 +78253,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80124,7 +78291,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80221,13 +78387,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80260,7 +78425,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80357,13 +78521,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80396,7 +78559,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80493,13 +78655,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80532,7 +78693,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80629,13 +78789,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80668,7 +78827,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80765,13 +78923,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80804,7 +78961,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80901,13 +79057,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80940,7 +79095,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80974,14 +79128,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #116]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81014,7 +79167,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81049,14 +79201,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w5, [x8, #120]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81089,7 +79240,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81124,10 +79274,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81136,12 +79284,13 @@ "str w6, [x8, #232]", "mov w20, #0x2296", "movk w20, #0x1, lsl #16", - "mov w21, #0xd4f1", - "movk w21, #0x70, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd4f1", + "movk w22, #0x70, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] @@ -83208,13 +81357,13 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "mov w20, #0x0", "str w20, [x8, #-4]!", + "strb w22, [x28, #1298]", "mov w22, #0xffffffff", "str w22, [x8, #-4]!", "mov w22, #0x172", @@ -83256,11 +81405,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "bic w21, w23, w21", - "strb w21, [x28, #1298]", - "add w21, w22, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w22, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "mov w20, #0x3c14", "movk w20, #0xa3, lsl #16", "str w20, [x8, #-4]!", @@ -83280,7 +81429,7 @@ ] }, "Block5": { - "ExpectedInstructionCount": 602, + "ExpectedInstructionCount": 586, "x86Insts": [ "mov ebx,dword [eax + 0x68]", "fld dword [esi + 0x2c]", @@ -83688,7 +81837,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83727,19 +81875,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "uxtb w5, w4", + "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", @@ -83775,19 +81921,17 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "uxtb w6, w7", + "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", @@ -83822,48 +81966,47 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", - "ldr w22, [x8, #56]", - "mov w23, #0x0", - "sxtw x22, w22", - "mrs x24, nzcv", - "cmp x22, #0x0 (0)", - "mov w25, #0x8000", - "csel x12, x25, xzr, lt", - "cneg x22, x22, mi", - "mov w13, #0x3f", + "ldr w23, [x8, #56]", + "mov w24, #0x0", + "sxtw x23, w23", + "mrs x25, nzcv", + "cmp x23, #0x0 (0)", + "mov w12, #0x8000", + "csel x13, x12, xzr, lt", + "cneg x23, x23, mi", + "mov w14, #0x3f", "mov x0, #0x3f", - "clz x14, x22", - "sub x14, x0, x14", - "sub x14, x13, x14", - "lsl x15, x22, x14", - "mov w16, #0x403e", - "sub x14, x16, x14", - "cmp x22, #0x0 (0)", - "csel x22, x23, x14, eq", - "orr x22, x12, x22", - "fmov d2, x15", - "fmov d3, x22", + "clz x15, x23", + "sub x15, x0, x15", + "sub x15, x14, x15", + "lsl x16, x23, x15", + "mov w17, #0x403e", + "sub x15, x17, x15", + "cmp x23, #0x0 (0)", + "csel x23, x24, x15, eq", + "orr x23, x13, x23", + "fmov d2, x16", + "fmov d3, x23", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "msr nzcv, x25", "str w4, [x8, #64]", "ldrb w20, [x28, #1019]", - "mov w22, #0xddd8", - "movk w22, #0xa3, lsl #16", - "ldr d2, [x22]", + "mov w23, #0xddd8", + "movk w23, #0xa3, lsl #16", + "ldr d2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83893,17 +82036,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -83937,19 +82078,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -83981,13 +82122,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84018,9 +82158,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -84054,43 +82193,43 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w6, [x8, #56]", + "ldrb w20, [x28, #1019]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", - "ldr w22, [x8, #56]", - "sxtw x22, w22", - "cmp x22, #0x0 (0)", - "csel x25, x25, xzr, lt", - "cneg x22, x22, mi", + "ldr w23, [x8, #56]", + "sxtw x23, w23", + "mrs x25, nzcv", + "cmp x23, #0x0 (0)", + "csel x12, x12, xzr, lt", + "cneg x23, x23, mi", "mov x0, #0x3f", - "clz x12, x22", - "sub x12, x0, x12", - "sub x12, x13, x12", - "lsl x13, x22, x12", - "sub x12, x16, x12", - "cmp x22, #0x0 (0)", - "csel x22, x23, x12, eq", - "orr x22, x25, x22", - "fmov d2, x13", - "fmov d3, x22", + "clz x13, x23", + "sub x13, x0, x13", + "sub x13, x14, x13", + "lsl x14, x23, x13", + "sub x13, x17, x13", + "cmp x23, #0x0 (0)", + "csel x23, x24, x13, eq", + "orr x23, x12, x23", + "fmov d2, x14", + "fmov d3, x23", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", + "msr nzcv, x25", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -84124,14 +82263,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w25, w21, w20", - "bic w23, w23, w25", - "strb w23, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -84163,13 +82300,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84202,7 +82338,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -84236,22 +82371,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x3e2b", "movk w20, #0x1, lsl #16", - "mov w21, #0xe52", - "movk w21, #0x41, lsl #16", - "add w21, w20, w21", + "mov w22, #0xe52", + "movk w22, #0x41, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", - "msr nzcv, x24", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] @@ -84584,7 +82717,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", @@ -84600,6 +82732,7 @@ "str w4, [x7, #20]", "ldr w5, [x10, #80]", "str w5, [x8, #-4]!", + "strb w22, [x28, #1298]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -84633,24 +82766,24 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x43c4", "movk w20, #0x1, lsl #16", - "mov w21, #0x433f", - "movk w21, #0x78, lsl #16", - "add w21, w20, w21", + "mov w22, #0x433f", + "movk w22, #0x78, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block7": { - "ExpectedInstructionCount": 7821, + "ExpectedInstructionCount": 7653, "x86Insts": [ "fld dword [ecx + 0xc]", "fld dword [ecx + 0x18]", @@ -84903,7 +83036,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -84938,17 +83070,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85014,13 +83144,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85053,14 +83182,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85094,20 +83222,20 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -85139,15 +83267,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov x24, #0xfffffffffffffff4", - "ldr s2, [x5, w24, sxtw]", + "ldrb w20, [x28, #1019]", + "mov x23, #0xfffffffffffffff4", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85179,28 +83306,25 @@ "and w20, w20, #0x7", "lsl w25, w21, w20", "orr w22, w22, w25", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w25, w21, w20", "orr w22, w22, w25", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85234,26 +83358,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -85285,13 +83407,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w22, [x28, #1298]", "lsl w25, w21, w20", "bic w22, w22, w25", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov x25, #0xffffffffffffffe8", "ldr s2, [x5, w25, sxtw]", "mrs x0, nzcv", @@ -85325,28 +83446,25 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85380,26 +83498,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -85430,14 +83546,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w24, sxtw]", - "ldrb w22, [x28, #1298]", + "str s2, [x5, w23, sxtw]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov x12, #0xffffffffffffffdc", "ldr s2, [x5, w12, sxtw]", "mrs x0, nzcv", @@ -85471,28 +83586,25 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85526,26 +83638,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -85577,13 +83687,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85616,7 +83725,6 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -85681,10 +83789,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -85719,17 +83825,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85795,16 +83899,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #24]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -85870,13 +83973,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -85909,7 +84011,6 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -85944,7 +84045,7 @@ "fmov s2, s0", "str s2, [x5]", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w24, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -85974,17 +84075,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x6 (6)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86050,13 +84149,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86089,28 +84187,25 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x6 (6)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86176,13 +84271,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86215,14 +84309,13 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86288,16 +84381,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86331,26 +84423,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -86382,13 +84472,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86421,7 +84510,6 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -86456,31 +84544,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86546,16 +84630,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86589,14 +84672,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -86628,28 +84709,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86715,13 +84795,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86754,28 +84833,25 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x4 (4)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86841,13 +84917,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -86880,14 +84955,13 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86953,16 +85027,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86996,14 +85069,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -87035,13 +85106,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "bic w22, w22, w12", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -87074,7 +85144,6 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -87109,2356 +85178,20 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7be0", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bd8", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bd0", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #8]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bc8", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bc0", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #64]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bb8", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #68]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7bb0", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #72]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7ba8", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #76]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w22, #0x7ba0", - "movk w22, #0xa7, lsl #16", - "ldr d2, [x22]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w12, w21, w20", - "bic w22, w22, w12", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr s2, [x8, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w22, w22, w12", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mov w22, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x22", - "eor v2.16b, v2.16b, v3.16b", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", "add w12, w20, #0x0 (0)", "and w12, w12, #0x7", "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89485,6 +85218,2298 @@ "umov w2, v3.h[4]", "mov x3, v2.d[0]", "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #76]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #8]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7be0", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #68]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bd8", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #72]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bd0", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #76]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #8]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "strb w24, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #56]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #76]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #8]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "strb w24, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #60]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #72]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #8]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "ldr q3, [x0, #1040]", + "strb w24, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #64]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #68]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bc8", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #56]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bc0", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #60]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #64]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bb8", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #64]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #68]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7bb0", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #68]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #72]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7ba8", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #72]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #76]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w12, #0x7ba0", + "movk w12, #0xa7, lsl #16", + "ldr d2, [x12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #76]", + "lsl w12, w21, w20", + "bic w22, w22, w12", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x8, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mov w12, #0x8000", + "fmov d3, x24", + "mov v3.d[1], x12", + "eor v2.16b, v2.16b, v3.16b", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", + "ldr q2, [x0, #1040]", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w13, w21, w20", + "orr w22, w22, w13", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", "ldr x5, [x28, #1680]", "blr x5", "ldr w4, [x28, #1000]", @@ -89531,13 +87556,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w13, #0x7b98", "movk w13, #0xa7, lsl #16", "ldr d2, [x13]", @@ -89571,15 +87595,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -89616,16 +87639,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -89657,13 +87680,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89695,37 +87717,34 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x22", + "fmov d3, x24", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w12, #0x7b90", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "mov w13, #0x7b90", + "movk w13, #0xa7, lsl #16", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89755,17 +87774,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -89802,16 +87819,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -89843,28 +87860,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w12, #0x7b88", - "movk w12, #0xa7, lsl #16", - "ldr d2, [x12]", + "mov w13, #0x7b88", + "movk w13, #0xa7, lsl #16", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89956,13 +87972,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -89994,23 +88009,22 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x22", + "fmov d3, x24", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w13, #0x7b80", - "movk w13, #0xa7, lsl #16", - "ldr d2, [x13]", + "mov w14, #0x7b80", + "movk w14, #0xa7, lsl #16", + "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90040,17 +88054,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90116,16 +88128,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov w14, #0x7b78", - "movk w14, #0xa7, lsl #16", - "ldr d2, [x14]", + "ldrb w20, [x28, #1019]", + "mov w15, #0x7b78", + "movk w15, #0xa7, lsl #16", + "ldr d2, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90217,13 +88228,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90255,8 +88265,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -90290,13 +88299,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90328,13 +88336,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr d2, [x12]", + "ldr d2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -90364,17 +88371,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "orr w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90440,13 +88445,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "bic w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90477,30 +88481,27 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "orr w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x4 (4)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x4 (4)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90534,26 +88535,24 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -90585,36 +88584,35 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "bic w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x22", + "fmov d3, x24", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90652,9 +88650,9 @@ "str q2, [x0, #1040]", "add w4, w4, #0x18 (24)", "add w5, w5, #0x4 (4)", - "mov x27, x6", "subs w26, w6, #0x1 (1)", "cfinv", + "mov x27, x6", "mov x6, x26", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -90686,36 +88684,35 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "bic w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x22", + "fmov d3, x24", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -90749,14 +88746,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -90788,13 +88783,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "bic w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90825,134 +88819,32 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w15, w21, w20", - "orr w12, w12, w15", - "strb w12, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x22", + "fmov d3, x24", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr d2, [x13]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "mov v0.8b, v2.8b", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1432]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "ldr d2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91044,16 +88936,113 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", + "str s2, [x8, #76]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov x23, #0xffffffffffffffe4", - "ldr s2, [x4, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr d2, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "mov v0.8b, v2.8b", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1432]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #56]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "mov x24, #0xffffffffffffffe4", + "ldr s2, [x4, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91085,7 +89074,6 @@ "and w20, w20, #0x7", "lsl w12, w21, w20", "orr w22, w22, w12", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91181,14 +89169,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", + "str s2, [x4, w24, sxtw]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, w25, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91219,9 +89206,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91318,13 +89304,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, w25, sxtw]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91355,15 +89340,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov x22, #0xffffffffffffffec", - "ldr s2, [x4, w22, sxtw]", + "mov x24, #0xffffffffffffffec", + "ldr s2, [x4, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91454,16 +89438,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w22, sxtw]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", + "str s2, [x4, w24, sxtw]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov x23, #0xfffffffffffffff0", - "ldr s2, [x4, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "mov x24, #0xfffffffffffffff0", + "ldr s2, [x4, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91495,7 +89478,6 @@ "and w20, w20, #0x7", "lsl w25, w21, w20", "orr w22, w22, w25", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91591,15 +89573,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w23, sxtw]", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "bic w22, w22, w23", - "strb w22, [x28, #1298]", + "str s2, [x4, w24, sxtw]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x4, w24, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91629,9 +89610,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91727,14 +89707,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w24, sxtw]", - "ldrb w22, [x28, #1298]", + "str s2, [x4, w23, sxtw]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov x23, #0xfffffffffffffff8", "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", @@ -91768,7 +89747,6 @@ "and w20, w20, #0x7", "lsl w24, w21, w20", "orr w22, w22, w24", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91865,13 +89843,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, w23, sxtw]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -91904,13 +89881,12 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov x22, #0xfffffffffffffffc", - "ldr s2, [x4, w22, sxtw]", + "mov x23, #0xfffffffffffffffc", + "ldr s2, [x4, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92001,14 +89977,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x4, w22, sxtw]", - "ldrb w22, [x28, #1298]", + "str s2, [x4, w23, sxtw]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92041,7 +90016,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92138,13 +90112,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92177,7 +90150,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92274,13 +90246,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92313,7 +90284,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92410,13 +90380,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92449,7 +90418,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92546,13 +90514,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92585,7 +90552,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92682,17 +90648,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #16]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block8": { - "ExpectedInstructionCount": 8478, + "ExpectedInstructionCount": 8284, "x86Insts": [ "movzx eax,word [esi + edx*0x8]", "fld dword [esi + edx*0x8 + 0x4]", @@ -92964,7 +90929,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92998,14 +90962,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w10, [x8, #456]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #156]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93038,25 +91001,24 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "uxth w4, w4", "mov x5, x4", "ldr w20, [x8, #484]", - "mul w5, w4, w20", + "mul w5, w5, w20", "mov w20, #0x0", "add w4, w4, w4, lsl #1", "add w4, w4, w4", "add w4, w4, w4", - "add w22, w4, #0x8 (8)", - "add w11, w22, w10", + "add w23, w4, #0x8 (8)", + "add w11, w23, w10", "str w11, [x8, #16]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93084,7 +91046,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93116,9 +91078,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #152]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93147,18 +91109,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93186,7 +91146,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93218,14 +91178,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93257,16 +91217,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #160]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93295,16 +91253,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93333,7 +91289,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93365,14 +91321,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93404,16 +91360,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93442,7 +91396,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93474,10 +91428,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93506,13 +91460,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #208]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #168]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93541,18 +91494,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93580,7 +91532,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93612,9 +91564,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #164]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93643,18 +91595,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93682,7 +91632,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93714,14 +91664,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93753,16 +91703,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #172]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93791,16 +91739,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93829,7 +91775,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93861,14 +91807,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93900,16 +91846,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #140]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93938,7 +91882,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93970,10 +91914,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94002,13 +91946,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #212]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #180]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94037,18 +91980,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94076,7 +92018,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94108,9 +92050,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #176]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94139,18 +92081,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w10", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w10", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94178,7 +92118,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94210,15 +92150,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "mov x10, x11", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94250,16 +92190,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #184]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94288,16 +92226,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94326,7 +92262,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94358,18 +92294,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldr w10, [x8, #56]", - "add w22, w10, #0x8 (8)", - "add w11, w22, w4", + "add w23, w10, #0x8 (8)", + "add w11, w23, w4", "str w11, [x8, #16]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94401,16 +92337,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #144]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94439,7 +92373,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94471,10 +92405,10 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94503,13 +92437,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #216]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94538,31 +92471,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94590,7 +92520,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94622,9 +92552,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94653,33 +92583,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94707,7 +92633,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94739,14 +92665,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94778,16 +92704,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94816,33 +92740,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94870,7 +92790,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94902,14 +92822,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94941,29 +92861,27 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -94992,13 +92910,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #232]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #112]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95027,31 +92944,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95079,7 +92993,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95111,9 +93025,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95142,33 +93056,29 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95196,7 +93106,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95228,14 +93138,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95267,16 +93177,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95305,19 +93213,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95345,7 +93251,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95377,14 +93283,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95416,29 +93322,27 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95467,13 +93371,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #236]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95502,17 +93405,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95540,7 +93442,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95572,9 +93474,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95603,19 +93505,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95643,7 +93543,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95675,14 +93575,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95714,16 +93614,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95752,19 +93650,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w7", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w7", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95792,7 +93688,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95824,14 +93720,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95863,17 +93759,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95902,30 +93796,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #240]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", + "ldrb w23, [x28, #1019]", + "add w24, w10, #0x4 (4)", + "add w24, w24, w4", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -95953,7 +93844,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95985,1120 +93876,21 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x5 (5)", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x11]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #88]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x8, #120]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x11]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #92]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "ldr s2, [x8, #128]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, #0x4 (4)", - "add w23, w23, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "mov x10, x11", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x8, #132]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x10]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w10, [x8, #32]", - "add w22, w10, #0x4 (4)", - "add w11, w22, w4", - "str w11, [x8, #16]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "add w22, w10, #0x8 (8)", - "add w11, w22, w4", - "str w11, [x8, #188]", - "ldr w11, [x8, #16]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #96]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "add w24, w10, w4", "ldr s2, [x24]", "mrs x0, nzcv", @@ -97128,20 +93920,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x5 (5)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97173,119 +93952,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x11]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97316,16 +93991,26 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97354,22 +94039,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #16]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x3 (3)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97401,34 +94071,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97459,29 +94110,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97509,16 +94146,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", + "str s2, [x8, #88]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w10, #0x4 (4)", + "add w24, w24, w4", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97546,7 +94195,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97578,10 +94227,23 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w10, w4", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97609,22 +94271,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w11, [x8, #188]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97656,21 +94303,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97702,16 +94342,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97740,16 +94378,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97778,7 +94414,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97810,14 +94446,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97849,17 +94485,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97887,116 +94521,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #80]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "ldr s2, [x8, #124]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w10, w4", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #16]", - "ldrb w22, [x28, #1019]", + "str s2, [x8, #92]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98025,17 +94556,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x4]", + "ldrb w23, [x28, #1019]", + "add w24, w10, #0x4 (4)", + "add w24, w24, w4", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98063,7 +94594,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98095,15 +94626,115 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x8, #468]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w10, w4", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "mov x10, x11", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98135,16 +94766,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", + "ldrb w23, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98173,17 +94802,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x11]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98211,7 +94838,7 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98243,14 +94870,18 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr w10, [x8, #32]", + "add w23, w10, #0x4 (4)", + "add w11, w23, w4", + "str w11, [x8, #16]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98282,17 +94913,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add w23, w10, #0x8 (8)", + "add w11, w23, w4", + "str w11, [x8, #188]", + "ldr w11, [x8, #16]", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98320,15 +94953,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x8, #84]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", - "ldr s2, [x8, #208]", + "str s2, [x8, #96]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "add w24, w10, w4", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98356,72 +94989,19 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "ldr s2, [x8, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x0 (0)", + "sub w23, w23, #0x1 (1)", "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "sub w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w22", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w22, [x28, #1019]", - "add x0, x28, x22, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98453,26 +95033,1263 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w22", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w22, w22, #0x1 (1)", - "and w22, w22, #0x7", - "strb w22, [x28, #1019]", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w22, [x28, #1019]", - "add w23, w22, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x22, lsl #4", + "ldr w11, [x8, #188]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w20, [x28, #1017]", - "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x4 (4)", + "and w24, w24, #0x7", "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr w11, [x8, #16]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #76]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "add w24, w10, w4", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr w11, [x8, #188]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #120]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #80]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #124]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w10, w4", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x8, #16]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #128]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x8, #468]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #132]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x11]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #84]", + "lsl w24, w21, w23", + "bic w22, w22, w24", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #208]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "ldr s2, [x8, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "sub w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "lsl w24, w21, w23", + "orr w22, w22, w24", + "strb w23, [x28, #1019]", + "add x0, x28, x23, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x23, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w23", + "bic w22, w22, w25", + "add w23, w23, #0x1 (1)", + "and w23, w23, #0x7", + "strb w23, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w23, [x28, #1019]", + "add w24, w23, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x23, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w20, [x28, #1017]", + "add x0, x28, x23, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -98504,13 +96321,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #192]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #212]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98543,14 +96359,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98616,13 +96431,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #196]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #216]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98655,14 +96469,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98728,13 +96541,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #200]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #192]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98767,13 +96579,12 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, w4", - "ldr s2, [x22]", + "add w23, w5, w4", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -98864,20 +96675,19 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add w6, w6, #0x1 (1)", - "ldr w23, [x8, #28]", - "eor w27, w6, w23", - "subs w26, w6, w23", + "ldr w20, [x8, #28]", + "eor w27, w6, w20", + "subs w26, w6, w20", "cfinv", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #196]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98910,14 +96720,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "ldr s2, [x22]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99008,18 +96817,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w4, w23, w4", + "add w20, w5, #0x8 (8)", + "add w4, w20, w4", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99052,7 +96860,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -99149,14 +96956,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #476]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #232]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99189,14 +96995,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99262,13 +97067,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #220]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #236]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99301,14 +97105,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99374,13 +97177,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #224]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #240]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99413,14 +97215,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99486,13 +97287,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #228]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #220]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99525,13 +97325,12 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, w9", - "ldr s2, [x22]", + "add w23, w5, w9", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99622,15 +97421,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, w9", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, w9", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #224]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99663,14 +97461,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, #0x4 (4)", - "add w22, w22, w9", - "ldr s2, [x22]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w9", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99761,16 +97558,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, #0x4 (4)", - "add w22, w22, w9", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w9", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #228]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99803,14 +97599,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, #0x8 (8)", - "add w22, w22, w9", - "ldr s2, [x22]", + "add w23, w5, #0x8 (8)", + "add w23, w23, w9", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -99901,16 +97696,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, #0x8 (8)", - "add w22, w22, w9", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, #0x8 (8)", + "add w23, w23, w9", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99943,14 +97737,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100016,13 +97809,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100055,14 +97847,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100128,13 +97919,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100167,14 +97957,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100240,13 +98029,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w23, w5, w4", "ldr s2, [x23]", "mrs x0, nzcv", @@ -100280,7 +98068,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -100376,15 +98163,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #64]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100417,14 +98203,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "ldr s2, [x22]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100515,18 +98300,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w4, w23, w4", + "add w20, w5, #0x8 (8)", + "add w4, w20, w4", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100559,7 +98343,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -100656,14 +98439,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x8, #480]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100696,14 +98478,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100769,13 +98550,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100808,14 +98588,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -100881,13 +98660,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -100980,13 +98758,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w23, w5, w4", "ldr s2, [x23]", "mrs x0, nzcv", @@ -101020,7 +98797,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -101116,15 +98892,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101157,14 +98932,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "ldr s2, [x22]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101255,18 +99029,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w5, #0x4 (4)", - "add w22, w22, w4", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w5, #0x4 (4)", + "add w23, w23, w4", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w5, #0x8 (8)", - "add w5, w23, w4", + "add w20, w5, #0x8 (8)", + "add w5, w20, w4", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101299,7 +99072,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -101396,17 +99168,16 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block9": { - "ExpectedInstructionCount": 299, + "ExpectedInstructionCount": 295, "x86Insts": [ "fld dword [edi]", "fmul st0", @@ -101705,14 +99476,13 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101778,13 +99548,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101817,14 +99586,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w22, #0xf928", - "movk w22, #0xa2, lsl #16", - "ldr d2, [x22]", + "mov w23, #0xf928", + "movk w23, #0xa2, lsl #16", + "ldr d2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101916,13 +99684,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101955,24 +99722,24 @@ "and w20, w20, #0x7", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "mov w20, #0x4fe2", "movk w20, #0x1, lsl #16", - "mov w21, #0x2c11", - "movk w21, #0x98, lsl #16", - "add w21, w20, w21", + "mov w22, #0x2c11", + "movk w22, #0x98, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block10": { - "ExpectedInstructionCount": 1294, + "ExpectedInstructionCount": 1268, "x86Insts": [ "fld dword [0x00b42a74]", "push ecx", @@ -102219,11 +99986,11 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w5, [x8, #-4]!", + "strb w22, [x28, #1298]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -102259,11 +100026,11 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add w5, w8, #0x48 (72)", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a78", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102298,7 +100065,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102331,16 +100097,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a24", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a24", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a7c", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102375,7 +100140,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102408,16 +100172,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a28", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a28", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a68", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102452,7 +100215,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102485,16 +100247,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a2c", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a2c", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a6c", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102529,7 +100290,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102562,16 +100322,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a30", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a30", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a70", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102606,7 +100365,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102639,16 +100397,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a34", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a34", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a5c", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102683,7 +100440,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102716,16 +100472,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a38", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a38", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a60", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102760,7 +100515,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102793,16 +100547,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a3c", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a3c", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a64", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102837,7 +100590,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102870,16 +100622,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a40", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a40", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a50", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102914,7 +100665,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102947,16 +100697,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a44", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a44", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a54", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -102991,7 +100740,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -103024,16 +100772,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a48", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a48", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov w23, #0x2a58", "movk w23, #0xb4, lsl #16", "ldr s2, [x23]", @@ -103068,7 +100815,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -103101,16 +100847,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov w22, #0x2a4c", - "movk w22, #0xb4, lsl #16", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "mov w23, #0x2a4c", + "movk w23, #0xb4, lsl #16", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103200,13 +100945,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -103386,13 +101130,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -103425,7 +101168,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -103459,21 +101201,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mov w20, #0x54a9", "movk w20, #0x1, lsl #16", - "mov w21, #0x39db", - "movk w21, #0x79, lsl #16", - "add w21, w20, w21", + "mov w22, #0x39db", + "movk w22, #0x79, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json index 1465d6036..76676fc38 100644 --- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json +++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json @@ -13,7 +13,7 @@ }, "Instructions": { "Block1": { - "ExpectedInstructionCount": 20980, + "ExpectedInstructionCount": 20546, "x86Insts": [ "sub esp,0x88", "fld dword [ecx + 0x4]", @@ -573,7 +573,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -609,10 +608,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -648,10 +645,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -687,10 +682,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -726,10 +719,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -764,10 +755,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -865,10 +854,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -966,10 +953,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1066,13 +1051,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1105,7 +1089,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1202,13 +1185,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1241,7 +1223,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1309,9 +1290,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1377,13 +1358,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1416,7 +1396,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -1484,9 +1463,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1552,13 +1531,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1591,14 +1569,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1664,13 +1641,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1703,14 +1679,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -1776,24 +1751,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", @@ -1888,13 +1862,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -1987,13 +1960,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2024,9 +1996,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2124,10 +2095,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2225,10 +2194,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2325,13 +2292,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2362,9 +2328,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2461,13 +2426,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2498,9 +2462,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2568,9 +2531,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2636,13 +2599,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2673,9 +2635,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2743,9 +2704,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x7 (7)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x7 (7)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -2811,23 +2772,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -2924,13 +2882,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -2961,16 +2918,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3036,13 +2992,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3073,16 +3028,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3148,13 +3102,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3247,29 +3200,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3300,9 +3250,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3400,10 +3349,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -3500,30 +3447,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3590,17 +3534,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3637,9 +3579,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3673,14 +3615,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -3712,16 +3652,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3788,17 +3727,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3835,9 +3772,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -3871,14 +3808,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -3910,13 +3845,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -3947,9 +3881,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4047,10 +3980,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4147,13 +4078,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4184,16 +4114,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4260,10 +4189,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4331,9 +4258,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4367,14 +4294,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -4406,13 +4331,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4443,9 +4367,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4513,16 +4436,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", @@ -4588,9 +4511,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -4624,14 +4547,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -4663,13 +4584,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4700,9 +4620,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4799,13 +4718,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4836,9 +4754,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -4935,13 +4852,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4972,9 +4888,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5071,13 +4986,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5108,9 +5022,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5207,13 +5120,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5244,9 +5156,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5344,10 +5255,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5444,13 +5353,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5481,16 +5389,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5557,10 +5464,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5628,9 +5533,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5664,14 +5569,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -5703,13 +5606,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5803,10 +5705,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -5874,9 +5774,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -5910,14 +5810,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -5949,13 +5847,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -5986,9 +5883,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6086,10 +5982,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6187,9 +6081,9 @@ "fmov s2, s0", "str s2, [x8]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6226,23 +6120,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6279,9 +6171,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6315,14 +6207,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6354,13 +6244,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6391,16 +6280,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6437,21 +6325,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6488,9 +6376,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -6524,14 +6412,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -6563,13 +6449,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6600,9 +6485,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6699,13 +6583,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6736,9 +6619,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6835,13 +6717,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -6872,9 +6753,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -6971,13 +6851,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7008,9 +6887,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7107,13 +6985,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7144,9 +7021,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7244,10 +7120,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7344,30 +7218,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7434,17 +7305,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7481,9 +7350,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7517,14 +7386,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7556,16 +7423,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7632,17 +7498,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7679,9 +7543,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -7715,14 +7579,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -7754,13 +7616,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -7791,9 +7652,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7891,10 +7751,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -7991,30 +7849,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8081,17 +7936,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8128,9 +7981,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8164,14 +8017,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8203,13 +8054,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8240,16 +8090,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8286,21 +8135,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8337,9 +8186,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -8373,14 +8222,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -8412,13 +8259,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8449,9 +8295,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8548,13 +8393,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8585,9 +8429,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8684,13 +8527,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8721,9 +8563,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8820,13 +8661,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8857,9 +8697,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -8956,13 +8795,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -8993,9 +8831,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9093,10 +8930,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9193,30 +9028,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9283,17 +9115,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9330,9 +9160,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9366,14 +9196,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -9405,13 +9233,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9442,16 +9269,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9488,21 +9314,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9539,9 +9365,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9575,14 +9401,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -9614,13 +9438,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -9651,9 +9474,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9751,10 +9573,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -9851,30 +9671,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9941,17 +9758,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -9988,9 +9803,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10024,14 +9839,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -10063,16 +9876,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10139,17 +9951,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10186,9 +9996,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -10222,14 +10032,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -10261,45 +10069,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10330,9 +10133,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10429,13 +10231,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10466,9 +10267,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10565,13 +10365,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10602,9 +10401,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10701,13 +10499,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #108]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10738,9 +10535,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10837,13 +10633,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -10874,9 +10669,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -10974,10 +10768,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11045,16 +10837,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11122,16 +10912,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11199,9 +10987,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11235,14 +11023,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -11274,23 +11060,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", @@ -11356,16 +11141,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", @@ -11431,9 +11216,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11467,14 +11252,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #56]", @@ -11507,10 +11290,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11608,10 +11389,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -11679,23 +11458,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11732,23 +11509,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11785,9 +11560,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11821,14 +11596,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -11860,16 +11633,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11906,21 +11678,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11957,9 +11729,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -11993,14 +11765,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -12032,13 +11802,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12069,9 +11838,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12168,13 +11936,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12205,16 +11972,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12280,13 +12046,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12317,9 +12082,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12416,13 +12180,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12515,13 +12278,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -12552,9 +12314,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12652,10 +12413,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -12723,23 +12482,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12776,23 +12533,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12829,9 +12584,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12865,14 +12620,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -12904,16 +12657,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -12950,21 +12702,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13001,9 +12753,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13037,48 +12789,42 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13109,9 +12855,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13209,10 +12954,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13280,16 +13023,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13357,16 +13098,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13434,9 +13173,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13470,14 +13209,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -13509,13 +13246,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13579,16 +13315,16 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", @@ -13654,9 +13390,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13690,14 +13426,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", @@ -13730,10 +13464,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -13830,30 +13562,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -13919,13 +13648,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -13956,9 +13684,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14055,16 +13782,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14098,14 +13824,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", @@ -14138,10 +13862,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14239,10 +13961,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14340,10 +14060,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14441,10 +14159,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -14541,30 +14257,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14630,13 +14343,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14667,16 +14379,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14742,28 +14453,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -14829,29 +14539,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14944,13 +14651,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #12]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -14981,9 +14687,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15081,10 +14786,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15182,10 +14885,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15283,10 +14984,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15354,23 +15053,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15436,30 +15133,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #16]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15525,16 +15219,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15600,28 +15293,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -15687,45 +15379,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #28]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #96]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -15756,9 +15443,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15856,10 +15542,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -15957,10 +15641,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16058,10 +15740,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16129,23 +15809,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16182,9 +15860,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16250,16 +15928,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16293,19 +15970,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16372,17 +16047,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16448,30 +16121,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #32]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16537,23 +16207,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #36]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", @@ -16648,16 +16317,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #40]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -16723,29 +16391,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #44]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -16776,9 +16441,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16876,10 +16540,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -16977,10 +16639,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17078,10 +16738,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17149,23 +16807,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17202,9 +16858,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17270,16 +16926,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17313,19 +16968,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17362,23 +17015,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17444,13 +17095,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #48]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17481,16 +17131,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17556,16 +17205,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #52]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -17631,13 +17279,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #56]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17730,29 +17377,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #60]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -17783,9 +17427,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17883,10 +17526,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -17984,10 +17625,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18085,10 +17724,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18185,30 +17822,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -18274,13 +17908,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #64]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18311,16 +17944,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -18386,28 +18018,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #68]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -18473,29 +18104,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #72]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18588,13 +18216,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #76]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -18625,9 +18252,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18725,10 +18351,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18826,10 +18450,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18927,10 +18549,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -18998,23 +18618,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19080,30 +18698,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #80]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19169,16 +18784,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #84]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19244,28 +18858,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #88]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19331,45 +18944,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #92]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w24, w22", - "strb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -19400,9 +19008,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19500,10 +19107,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19571,16 +19176,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19678,10 +19281,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -19749,23 +19350,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19802,9 +19401,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x6 (6)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x6 (6)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19870,16 +19469,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19913,19 +19511,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x4 (4)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x4 (4)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -19992,17 +19588,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20068,30 +19662,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #96]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "orr w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20157,23 +19748,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #100]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", @@ -20268,16 +19858,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #104]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20343,29 +19932,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #108]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20398,7 +19984,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20495,13 +20080,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20534,7 +20118,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20631,13 +20214,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -20731,10 +20313,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -20802,23 +20382,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20855,9 +20433,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20923,16 +20501,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -20969,9 +20546,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -21005,32 +20582,28 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21063,14 +20636,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -21136,13 +20708,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #112]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21175,7 +20746,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -21272,13 +20842,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #116]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21371,13 +20940,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #120]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -21410,7 +20978,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -21507,20 +21074,19 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #124]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov x27, x8", "adds w26, w8, #0x88 (136)", + "strb w21, [x28, #1298]", + "mov x27, x8", "mov x8, x26" ] }, "Block2": { - "ExpectedInstructionCount": 17714, + "ExpectedInstructionCount": 17382, "x86Insts": [ "sub esp,0x90", "fld dword [ecx + 0x4]", @@ -21994,22 +21560,19 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w22, #0x0", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "mov w23, #0x0", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22077,16 +21640,14 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22184,10 +21745,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22285,10 +21844,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22386,10 +21943,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22486,13 +22041,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22524,8 +22078,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22622,13 +22175,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22660,8 +22212,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22759,10 +22310,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22859,13 +22408,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -22897,8 +22445,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -22995,13 +22542,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23033,8 +22579,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23131,30 +22676,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -23220,13 +22762,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23258,15 +22799,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -23332,28 +22872,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #100]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -23419,29 +22958,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23534,13 +23070,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23572,8 +23107,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23670,13 +23204,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23708,8 +23241,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23806,13 +23338,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #120]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23844,8 +23375,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -23942,13 +23472,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -23980,8 +23509,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24078,13 +23606,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24116,8 +23643,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24215,10 +23741,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24316,10 +23840,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24416,13 +23938,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24454,8 +23975,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24552,13 +24072,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24590,8 +24109,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24689,10 +24207,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24789,13 +24305,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24827,8 +24342,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -24925,13 +24439,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -24963,8 +24476,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25061,30 +24573,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25150,13 +24659,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #116]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25188,15 +24696,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25262,28 +24769,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #132]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25349,29 +24855,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25464,13 +24967,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -25502,8 +25004,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25601,10 +25102,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -25672,23 +25171,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25725,23 +25222,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25778,9 +25273,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25814,14 +25309,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -25853,16 +25346,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25899,21 +25391,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25950,9 +25442,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -25986,14 +25478,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26025,13 +25515,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #136]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26063,8 +25552,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26162,10 +25650,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26233,23 +25719,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26286,23 +25770,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26339,9 +25821,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26375,14 +25857,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26414,28 +25894,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #128]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26472,21 +25951,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26523,9 +26002,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -26559,14 +26038,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -26598,13 +26075,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26636,8 +26112,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26735,10 +26210,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26836,10 +26309,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -26936,13 +26407,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -26974,8 +26444,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27072,13 +26541,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27110,8 +26578,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27209,10 +26676,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27309,13 +26774,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27347,8 +26811,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27445,13 +26908,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27483,8 +26945,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -27581,30 +27042,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27670,13 +27128,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27708,15 +27165,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27782,28 +27238,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #108]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -27869,29 +27324,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -27984,13 +27436,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28022,8 +27473,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28121,10 +27571,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28192,23 +27640,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28245,9 +27691,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28313,16 +27759,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28359,9 +27804,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28427,29 +27872,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28481,8 +27923,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28580,10 +28021,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -28651,23 +28090,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28704,9 +28141,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28772,16 +28209,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28818,9 +28254,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -28886,29 +28322,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -28940,8 +28373,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29039,10 +28471,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29140,10 +28570,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29240,13 +28668,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29278,8 +28705,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29376,13 +28802,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29414,8 +28839,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29513,10 +28937,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29613,13 +29035,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29651,8 +29072,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29749,13 +29169,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -29787,8 +29206,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -29885,30 +29303,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -29974,13 +29389,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #124]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30012,15 +29426,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30086,28 +29499,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #140]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30173,29 +29585,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30288,13 +29697,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #112]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30326,8 +29734,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -30425,10 +29832,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -30496,23 +29901,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30549,23 +29952,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30602,9 +30003,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30638,14 +30039,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -30677,28 +30076,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30735,21 +30133,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30786,9 +30184,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -30822,14 +30220,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -30861,13 +30257,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -30899,8 +30294,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -30998,10 +30392,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31069,23 +30461,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31122,23 +30512,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x5 (5)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x5 (5)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31175,9 +30563,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31211,14 +30599,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -31250,16 +30636,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31296,21 +30681,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31347,9 +30732,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -31383,48 +30768,42 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31456,8 +30835,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31555,10 +30933,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31655,13 +31031,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31693,8 +31068,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31791,13 +31165,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31829,8 +31202,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -31927,13 +31299,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #128]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -31965,8 +31336,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32064,17 +31434,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32140,13 +31508,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32178,8 +31545,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32276,23 +31642,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", @@ -32387,42 +31752,39 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32488,13 +31850,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #96]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32526,8 +31887,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32624,28 +31984,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #100]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -32711,29 +32070,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32765,8 +32121,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32863,13 +32218,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #108]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -32901,8 +32255,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -32999,13 +32352,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #112]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33037,8 +32389,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33135,13 +32486,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #116]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33173,8 +32523,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33271,13 +32620,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #120]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33309,8 +32657,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33407,13 +32754,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #124]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33445,8 +32791,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33544,10 +32889,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33645,10 +32988,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33745,13 +33086,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #120]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33783,8 +33123,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -33881,13 +33220,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -33919,8 +33257,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34018,10 +33355,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34118,13 +33453,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34156,8 +33490,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34254,13 +33587,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #136]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34292,8 +33624,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34390,30 +33721,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -34479,13 +33807,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #64]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34517,15 +33844,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -34591,28 +33917,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #68]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -34678,29 +34003,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #72]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34793,13 +34115,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #76]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34831,8 +34152,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -34929,13 +34249,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #80]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -34967,8 +34286,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35065,13 +34383,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #84]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35103,8 +34420,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35201,13 +34517,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #88]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35239,8 +34554,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35337,13 +34651,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #92]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -35375,8 +34688,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35474,10 +34786,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35545,23 +34855,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -35598,9 +34906,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -35666,16 +34974,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -35709,19 +35016,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -35788,10 +35093,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35889,10 +35192,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -35960,23 +35261,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36013,9 +35312,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36081,16 +35380,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36127,9 +35425,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36195,29 +35493,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36249,8 +35544,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36348,10 +35642,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36448,13 +35740,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36486,8 +35777,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36584,13 +35874,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36622,8 +35911,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36720,13 +36008,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -36758,15 +36045,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -36832,23 +36118,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -36945,13 +36228,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #36]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37044,13 +36326,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37082,15 +36363,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -37156,45 +36436,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37226,8 +36501,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37324,13 +36598,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37362,8 +36635,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37460,13 +36732,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #52]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37498,8 +36769,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37596,13 +36866,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #56]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37634,8 +36903,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37732,13 +37000,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #60]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #92]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -37770,8 +37037,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37869,10 +37135,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -37970,10 +37234,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38070,13 +37332,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #100]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38108,8 +37369,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38206,13 +37466,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #124]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38244,8 +37503,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38343,10 +37601,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38443,13 +37699,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #116]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38481,8 +37736,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38579,13 +37833,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #132]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38617,8 +37870,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -38715,30 +37967,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38804,13 +38053,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -38842,15 +38090,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -38916,28 +38163,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #4]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x2 (2)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -39003,29 +38249,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39118,13 +38361,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39157,7 +38399,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39254,13 +38495,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39293,7 +38533,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39390,13 +38629,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39429,7 +38667,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39526,13 +38763,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -39565,7 +38801,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -39662,15 +38897,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4, #28]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "mvn w27, w8", "adds w26, w8, #0x90 (144)", + "strb w21, [x28, #1298]", "mov x8, x26" ] }, @@ -40387,7 +39621,7 @@ "mov x21, #0xffffffffffffff7c", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w5, w4", @@ -40397,7 +39631,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "add w4, w4, #0x1 (1)", "lsl w4, w4, #5", @@ -40408,7 +39642,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w4, #0x40 (64)", @@ -40419,7 +39653,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w5, w4", @@ -40430,7 +39664,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "add w4, w4, #0x1 (1)", "lsl w4, w4, #5", @@ -40442,7 +39676,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w4, #0x40 (64)", @@ -40454,7 +39688,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w5, w4", @@ -40465,7 +39699,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "add w4, w4, #0x1 (1)", "lsl w4, w4, #5", @@ -40477,7 +39711,7 @@ "ldr w5, [x4, #4]", "ldr w6, [x9, w21, sxtw]", "mov x4, x6", - "add w4, w6, w6", + "add w4, w4, w4", "add w4, w4, w6", "lsl w4, w4, #5", "add w4, w4, #0x40 (64)", @@ -40486,7 +39720,7 @@ "adds w26, w4, #0x18 (24)", "mov x4, x26", "mov x20, #0xffffffffffffffa4", - "str w26, [x9, w20, sxtw]", + "str w4, [x9, w20, sxtw]", "sub w4, w9, #0xfc (252)", "str w4, [x8]", "mov w20, #0xf07", @@ -40502,7 +39736,7 @@ ] }, "Block4": { - "ExpectedInstructionCount": 12596, + "ExpectedInstructionCount": 12319, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -41020,10 +40254,10 @@ "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41056,13 +40290,12 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov x21, #0xfffffffffffffffc", - "ldr s2, [x9, w21, sxtw]", + "mov x23, #0xfffffffffffffffc", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41217,13 +40450,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41255,8 +40487,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -41416,13 +40647,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41454,8 +40684,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -41615,13 +40844,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov x24, #0xfffffffffffffff8", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -41654,12 +40882,11 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w22, w20", - "orr w23, w23, w25", - "strb w23, [x28, #1298]", + "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w21, sxtw]", + "ldr w9, [x9, w23, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", @@ -41696,20 +40923,18 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w25, w22, w20", - "orr w23, w23, w25", - "strb w23, [x28, #1298]", + "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x0", - "mov w25, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x25", + "mov w25, #0x0", + "mov w12, #0x8000", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -41743,13 +40968,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -41781,8 +41005,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -41850,7 +41073,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w21, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41880,23 +41103,21 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x25", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w21, sxtw]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -41989,10 +41210,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42089,14 +41308,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x6, w21, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42127,13 +41345,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w21, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42225,13 +41442,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42263,8 +41479,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42361,13 +41576,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42399,16 +41613,15 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x25", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42505,13 +41718,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42543,8 +41755,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42641,13 +41852,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x6, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42679,8 +41889,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42777,13 +41986,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -42815,8 +42023,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -42884,7 +42091,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w21, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -42914,15 +42121,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w21, sxtw]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43014,13 +42219,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43052,8 +42256,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43150,14 +42353,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x10, w21, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43188,13 +42390,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w21, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -43286,13 +42487,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43324,8 +42524,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43422,13 +42621,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43460,8 +42658,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43558,13 +42755,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43596,8 +42792,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43694,13 +42889,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -43732,8 +42926,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -43830,30 +43023,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -43919,23 +43109,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11, w24, sxtw]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44031,14 +43218,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w21, sxtw]", - "ldrb w12, [x28, #1298]", + "str s2, [x11, w23, sxtw]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44070,8 +43256,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44168,13 +43353,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44206,8 +43390,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44304,28 +43487,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11, #4]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44391,29 +43573,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10, w24, sxtw]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44445,15 +43624,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -44518,30 +43696,27 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w21, sxtw]", - "ldrb w12, [x28, #1298]", + "str s2, [x10, w23, sxtw]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44573,8 +43748,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44671,13 +43845,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44709,8 +43882,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44807,13 +43979,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10, #4]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -44845,8 +44016,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -44944,10 +44114,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -45045,17 +44213,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45122,17 +44288,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45169,9 +44333,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45205,14 +44369,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w21, w21, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -45244,13 +44406,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, w24, sxtw]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45282,15 +44443,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45357,17 +44517,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45404,9 +44562,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45440,14 +44598,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w21, w21, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -45478,46 +44634,41 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w21, sxtw]", - "ldrb w12, [x28, #1298]", + "str s2, [x6, w23, sxtw]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -45549,8 +44700,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -45648,10 +44798,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -45719,23 +44867,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45802,17 +44948,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45849,9 +44993,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -45885,14 +45029,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w21, w21, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -45924,30 +45066,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x2 (2)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x2 (2)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46014,17 +45153,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46061,9 +45198,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46097,14 +45234,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w21, w21, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -46136,45 +45271,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #4]", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w12, w20, #0x0 (0)", - "and w12, w12, #0x7", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x0 (0)", + "and w13, w13, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", - "ldrb w13, [x28, #1298]", - "lsl w12, w22, w12", - "orr w12, w13, w12", - "strb w12, [x28, #1298]", + "lsl w13, w22, w13", + "orr w21, w21, w13", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46206,8 +45336,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -46305,10 +45434,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -46406,17 +45533,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46484,17 +45609,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "orr w21, w21, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x3 (3)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x3 (3)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46531,9 +45654,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -46567,14 +45690,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", "lsl w14, w22, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w21, w21, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", + "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -46606,13 +45727,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, w24, sxtw]", - "ldrb w24, [x28, #1298]", - "lsl w12, w22, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46643,9 +45763,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w22, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -46719,10 +45838,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w12, w22, w20", - "orr w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -46802,10 +45919,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -46840,46 +45955,41 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w21, sxtw]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "str s2, [x5, w23, sxtw]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -46910,9 +46020,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47010,10 +46119,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47111,17 +46218,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47188,17 +46293,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47235,9 +46338,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47271,14 +46374,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w12, w22, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -47310,13 +46411,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47347,16 +46447,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47423,17 +46522,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47470,9 +46567,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -47506,14 +46603,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w12, w22, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -47545,45 +46640,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #4]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47614,9 +46704,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47716,10 +46805,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47727,8 +46814,8 @@ "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x25", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47827,10 +46914,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -47928,13 +47013,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -47965,9 +47049,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48066,13 +47149,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48103,9 +47185,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48203,13 +47284,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48240,9 +47320,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48250,8 +47329,8 @@ "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x23", - "mov v3.d[1], x25", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48349,13 +47428,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48386,9 +47464,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48486,13 +47563,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48523,9 +47599,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48624,13 +47699,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48661,9 +47735,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48761,10 +47834,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48861,13 +47932,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -48898,9 +47968,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -48997,13 +48066,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49034,9 +48102,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49133,13 +48200,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49170,9 +48236,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49269,13 +48334,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49306,9 +48370,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49405,13 +48468,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49442,9 +48504,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49541,13 +48602,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49578,9 +48638,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49678,30 +48737,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -49767,23 +48823,20 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -49880,13 +48933,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -49917,9 +48969,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50016,13 +49067,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50053,9 +49103,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50152,29 +49201,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #4]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50240,29 +49288,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50295,14 +49340,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50368,29 +49412,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50423,7 +49464,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50520,13 +49560,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50559,7 +49598,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50656,14 +49694,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #4]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #48]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -50696,7 +49733,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50794,10 +49830,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -50895,17 +49929,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -50972,17 +50004,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51019,9 +50049,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51055,14 +50085,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -51094,13 +50122,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51133,14 +50160,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51207,17 +50233,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51254,9 +50278,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51290,14 +50314,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -51329,45 +50351,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51400,7 +50417,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51498,10 +50514,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -51599,17 +50613,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51646,23 +50658,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51699,9 +50709,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51735,14 +50745,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -51774,14 +50782,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "sub w9, w9, #0x10 (16)", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -51814,15 +50821,14 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #48]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51860,24 +50866,22 @@ "str q2, [x0, #1040]", "add w5, w5, #0x10 (16)", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add w6, w6, #0x10 (16)", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51916,9 +50920,9 @@ "add w10, w10, #0x10 (16)", "add w11, w11, #0x10 (16)", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -51952,14 +50956,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "sub w7, w7, #0x10 (16)", "ldrb w20, [x28, #1019]", @@ -51992,49 +50994,44 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #20]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52067,7 +51064,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52168,10 +51164,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52240,9 +51234,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "cset w20, hs", - "mov x27, x9", "subs w26, w9, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x9", "mov x9, x26", "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", @@ -52275,18 +51269,16 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "str w9, [x8, #124]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52353,17 +51345,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52400,9 +51390,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52436,14 +51426,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -52475,13 +51463,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #24]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52514,14 +51501,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52588,17 +51574,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52635,9 +51619,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -52671,14 +51655,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -52710,45 +51692,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #28]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -52781,7 +51758,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52879,10 +51855,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -52980,17 +51954,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53057,17 +52029,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53104,9 +52074,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53140,14 +52110,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -53179,13 +52147,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #16]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -53218,14 +52185,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53292,17 +52258,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53339,9 +52303,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -53375,14 +52339,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -53414,49 +52376,44 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #20]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block5": { - "ExpectedInstructionCount": 12507, + "ExpectedInstructionCount": 12238, "x86Insts": [ "mov ebp,dword [esp + 0x64]", "fadd dword [ebp + 0x8]", @@ -53969,10 +52926,10 @@ "mov w22, #0x1", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54005,13 +52962,12 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov x21, #0xfffffffffffffffc", - "ldr s2, [x9, w21, sxtw]", + "mov x23, #0xfffffffffffffffc", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54166,13 +53122,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #104]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54204,8 +53159,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54365,13 +53319,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54403,8 +53356,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w22, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54564,13 +53516,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "mov x24, #0xfffffffffffffff8", "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", @@ -54603,12 +53554,11 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w22, w20", - "orr w23, w23, w25", - "strb w23, [x28, #1298]", + "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "ldr w9, [x9, w21, sxtw]", + "ldr w9, [x9, w23, sxtw]", "str w9, [x8, #52]", "ldr w9, [x8, #100]", "ldr w9, [x9]", @@ -54645,20 +53595,18 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w25, w22, w20", - "orr w23, w23, w25", - "strb w23, [x28, #1298]", + "orr w21, w21, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x0", - "mov w25, #0x8000", - "fmov d3, x23", - "mov v3.d[1], x25", + "mov w25, #0x0", + "mov w12, #0x8000", + "fmov d3, x25", + "mov v3.d[1], x12", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54692,13 +53640,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x6, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -54730,8 +53677,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -54799,7 +53745,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x11, w21, sxtw]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54829,15 +53775,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w21, sxtw]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -54930,10 +53874,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55030,14 +53972,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x11, w21, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x11, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55068,13 +54009,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x6, w21, sxtw]", + "ldr s2, [x6, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55166,13 +54106,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55204,8 +54143,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55302,13 +54240,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55340,8 +54277,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55438,13 +54374,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55476,8 +54411,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55574,13 +54508,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x11, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55612,8 +54545,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55710,13 +54642,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55748,8 +54679,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -55817,7 +54747,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w21, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55847,15 +54777,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x10, w21, sxtw]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -55947,13 +54875,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -55985,8 +54912,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56083,14 +55009,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x10, w21, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x10, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56121,13 +55046,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x5, w21, sxtw]", + "ldr s2, [x5, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -56219,13 +55143,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56257,8 +55180,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56355,13 +55277,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x5, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56393,8 +55314,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56491,13 +55411,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56529,8 +55448,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56627,13 +55545,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x10, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56665,8 +55582,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -56763,30 +55679,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56852,13 +55765,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11, w24, sxtw]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -56890,15 +55802,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -56963,14 +55874,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x11, w21, sxtw]", - "ldrb w25, [x28, #1298]", + "str s2, [x11, w23, sxtw]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57002,8 +55912,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57100,13 +56009,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57138,8 +56046,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57236,28 +56143,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x11, #4]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -57323,29 +56229,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10, w24, sxtw]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w25, w22, w25", - "orr w25, w12, w25", - "strb w25, [x28, #1298]", + "lsl w12, w22, w12", + "orr w21, w21, w12", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57437,14 +56340,13 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x10, w21, sxtw]", - "ldrb w25, [x28, #1298]", + "str s2, [x10, w23, sxtw]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57476,8 +56378,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57574,13 +56475,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57612,8 +56512,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57710,13 +56609,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x10, #4]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -57748,8 +56646,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57847,10 +56744,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -57948,17 +56843,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58025,17 +56918,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58072,9 +56963,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58108,14 +56999,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -58147,13 +57036,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, w24, sxtw]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #108]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58185,15 +57073,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58260,17 +57147,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58307,9 +57192,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58343,14 +57228,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -58381,46 +57264,41 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x6, w21, sxtw]", - "ldrb w25, [x28, #1298]", + "str s2, [x6, w23, sxtw]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w25, w22, w25", - "orr w25, w12, w25", - "strb w25, [x28, #1298]", + "lsl w12, w22, w12", + "orr w21, w21, w12", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w25, w22, w25", - "orr w25, w12, w25", - "strb w25, [x28, #1298]", + "lsl w12, w22, w12", + "orr w21, w21, w12", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -58452,8 +57330,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -58551,10 +57428,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -58622,23 +57497,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58705,17 +57578,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58752,9 +57623,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58788,14 +57659,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -58827,30 +57696,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x2 (2)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x2 (2)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58917,17 +57783,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -58964,9 +57828,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59000,14 +57864,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -59039,45 +57901,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6, #4]", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w25, w22, w25", - "orr w25, w12, w25", - "strb w25, [x28, #1298]", + "lsl w12, w22, w12", + "orr w21, w21, w12", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w25, w20, #0x0 (0)", - "and w25, w25, #0x7", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x0 (0)", + "and w12, w12, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", - "ldrb w12, [x28, #1298]", - "lsl w25, w22, w25", - "orr w25, w12, w25", - "strb w25, [x28, #1298]", + "lsl w12, w22, w12", + "orr w21, w21, w12", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59109,8 +57966,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59208,10 +58064,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59309,17 +58163,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59386,17 +58238,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "orr w21, w21, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x3 (3)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x3 (3)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59433,9 +58283,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -59469,14 +58319,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", "lsl w13, w22, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w21, w21, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", + "add x0, x28, x12, lsl #4", "str q2, [x0, #1040]", "ldr w9, [x8, #36]", "ldrb w20, [x28, #1019]", @@ -59509,13 +58357,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, w24, sxtw]", - "ldrb w24, [x28, #1298]", - "lsl w25, w22, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59546,9 +58393,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w22, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59622,10 +58468,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w22, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "orr w21, w21, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59705,10 +58549,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w22, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w21, w21, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -59743,46 +58585,41 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x5, w21, sxtw]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "str s2, [x5, w23, sxtw]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -59813,9 +58650,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -59913,10 +58749,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60014,17 +58848,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60091,17 +58923,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60138,9 +58968,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60174,14 +59004,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w22, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -60213,13 +59041,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60250,16 +59077,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60326,17 +59152,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60373,9 +59197,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -60409,14 +59233,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w22, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w22, w20", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -60448,45 +59270,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x5, #4]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w24, w21", - "strb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60517,9 +59334,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60619,10 +59435,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60722,10 +59536,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60824,13 +59636,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60861,9 +59672,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -60962,13 +59772,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -60999,9 +59808,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61100,13 +59908,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #68]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61137,9 +59944,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61238,13 +60044,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #76]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61275,9 +60080,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61376,13 +60180,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #88]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61413,9 +60216,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61514,13 +60316,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #92]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61551,9 +60352,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61651,10 +60451,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61751,13 +60549,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61788,9 +60585,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -61887,13 +60683,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -61924,9 +60719,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62023,13 +60817,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x7]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62060,9 +60853,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62159,13 +60951,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #72]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62196,9 +60987,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62295,13 +61085,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #80]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62332,9 +61121,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62431,13 +61219,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #96]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62468,9 +61255,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62568,30 +61354,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #84]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62657,13 +61440,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62694,16 +61476,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -62769,13 +61550,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #72]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62806,9 +61586,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -62905,13 +61684,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #80]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -62942,9 +61720,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w24, w22, w20", - "orr w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "orr w21, w21, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63041,29 +61818,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #4]", - "ldrb w21, [x28, #1298]", - "lsl w24, w22, w20", - "bic w21, w21, w24", - "strb w21, [x28, #1298]", + "lsl w23, w22, w20", + "bic w21, w21, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w25, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63129,29 +61905,26 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63244,13 +62017,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #68]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63283,7 +62055,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63380,13 +62151,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #76]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63419,7 +62189,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63516,14 +62285,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #4]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #40]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63556,7 +62324,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63654,10 +62421,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -63755,17 +62520,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63832,17 +62595,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63879,9 +62640,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -63915,14 +62676,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -63954,13 +62713,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #8]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #104]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -63993,14 +62751,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64067,17 +62824,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64114,9 +62869,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64150,14 +62905,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -64189,45 +62942,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #12]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #88]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64260,7 +63008,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64358,10 +63105,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -64459,17 +63204,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64506,23 +63249,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x2 (2)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x2 (2)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64559,9 +63300,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64595,14 +63336,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -64634,13 +63373,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64673,14 +63411,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64717,23 +63454,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64773,9 +63508,9 @@ "str w9, [x8, #40]", "add w5, w5, #0x10 (16)", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -64809,14 +63544,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "add w6, w6, #0x10 (16)", "add w10, w10, #0x10 (16)", @@ -64850,49 +63583,44 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, #20]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #112]", "sub w9, w9, #0x10 (16)", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w9, [x8, #112]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8, #36]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -64925,7 +63653,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65025,10 +63752,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65128,24 +63853,22 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "subs w7, w7, #0x10 (16)", "cfinv", "cset w20, hs", - "mov x27, x9", "subs w26, w9, #0x1 (1)", "rmif x20, #63, #nzCv", + "mov x27, x9", "mov x9, x26", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65213,17 +63936,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65260,9 +63981,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65296,14 +64017,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -65335,13 +64054,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #24]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65374,14 +64092,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65448,17 +64165,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65495,9 +64210,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65531,14 +64246,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -65570,45 +64283,40 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #28]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #84]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -65641,7 +64349,6 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65739,10 +64446,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -65840,17 +64545,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65917,17 +64620,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -65964,9 +64665,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66000,14 +64701,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -66039,13 +64738,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #16]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -66078,14 +64776,13 @@ "and w20, w20, #0x7", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66152,17 +64849,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "orr w21, w21, w23", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x3 (3)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66199,9 +64894,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "add x0, x28, x21, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66235,14 +64930,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w22, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w21, w21, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -66274,49 +64967,44 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x7, #20]", - "ldrb w21, [x28, #1298]", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w23, w22, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w21, w20, #0x0 (0)", - "and w21, w21, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w21, w22, w21", - "orr w21, w23, w21", - "strb w21, [x28, #1298]", + "lsl w23, w22, w23", + "orr w21, w21, w23", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "Block6": { - "ExpectedInstructionCount": 11501, + "ExpectedInstructionCount": 10995, "x86Insts": [ "mov eax,dword [ebp + 0x10]", "fld dword [eax + 0x30]", @@ -66765,7 +65453,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66801,17 +65488,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66845,14 +65530,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", @@ -66886,10 +65569,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -66925,17 +65606,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -66969,19 +65648,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -67015,14 +65692,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", @@ -67056,10 +65731,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67095,386 +65768,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x22, #0xffffffffffffffd0", - "str s2, [x9, w22, sxtw]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67515,134 +65810,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -67685,180 +65854,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -67896,16 +65893,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -67935,10 +65930,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -67979,10 +65972,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68025,10 +66016,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68063,16 +66052,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd4", + "mov x23, #0xffffffffffffffd0", "str s2, [x9, w23, sxtw]", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68103,15 +66091,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68141,10 +66128,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68185,10 +66170,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68226,16 +66209,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68265,10 +66246,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68309,10 +66288,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68355,10 +66332,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68396,16 +66371,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68435,10 +66408,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68479,10 +66450,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68525,10 +66494,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68566,16 +66533,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68605,10 +66570,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68649,10 +66612,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68695,10 +66656,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68733,16 +66692,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd8", + "mov x24, #0xffffffffffffffd4", "str s2, [x9, w24, sxtw]", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -68773,15 +66731,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68811,10 +66768,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68855,10 +66810,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -68896,16 +66849,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -68935,10 +66886,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -68979,10 +66928,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69025,10 +66972,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69066,16 +67011,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69105,10 +67048,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69149,10 +67090,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69195,10 +67134,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69236,16 +67173,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -69275,10 +67210,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69319,10 +67252,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69365,10 +67296,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69403,16 +67332,332 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffdc", + "mov x25, #0xffffffffffffffd8", "str s2, [x9, w25, sxtw]", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69443,48 +67688,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69525,134 +67730,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69695,10 +67774,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -69706,215 +67783,6 @@ "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -69945,10 +67813,45 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -69989,10 +67892,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70035,10 +67936,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70073,16 +67972,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffe0", + "mov x12, #0xffffffffffffffdc", "str s2, [x9, w12, sxtw]", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70113,15 +68011,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70151,10 +68048,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70195,10 +68090,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70236,16 +68129,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70275,10 +68166,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70319,10 +68208,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70365,10 +68252,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70406,16 +68291,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70445,10 +68328,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70489,10 +68370,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70535,10 +68414,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70576,16 +68453,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70615,10 +68490,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70659,10 +68532,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70705,10 +68576,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70743,16 +68612,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe4", + "mov x13, #0xffffffffffffffe0", "str s2, [x9, w13, sxtw]", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -70783,15 +68651,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70821,10 +68688,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70865,10 +68730,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -70906,16 +68769,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -70945,10 +68806,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -70989,10 +68848,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71035,10 +68892,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71076,16 +68931,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71115,10 +68968,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71159,10 +69010,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71205,10 +69054,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71246,16 +69093,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71285,10 +69130,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71329,10 +69172,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71375,10 +69216,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71413,16 +69252,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe8", + "mov x14, #0xffffffffffffffe4", "str s2, [x9, w14, sxtw]", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -71453,15 +69291,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71491,10 +69328,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71535,10 +69370,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71576,16 +69409,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71615,10 +69446,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71659,10 +69488,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71705,10 +69532,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71746,16 +69571,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71785,10 +69608,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71829,10 +69650,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71875,10 +69694,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -71916,16 +69733,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -71955,10 +69770,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -71999,10 +69812,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72045,10 +69856,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72083,16 +69892,170 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffec", + "mov x15, #0xffffffffffffffe8", "str s2, [x9, w15, sxtw]", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72123,48 +70086,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72205,134 +70128,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72375,10 +70172,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72386,7 +70181,7 @@ "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72416,15 +70211,138 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -72455,147 +70373,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -72625,10 +70410,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -72669,10 +70452,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72715,10 +70496,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -72753,1318 +70532,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xfffffffffffffff0", + "mov x16, #0xffffffffffffffec", "str s2, [x9, w16, sxtw]", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xfffffffffffffff4", - "str s2, [x9, w17, sxtw]", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", @@ -74096,644 +70571,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74769,17 +70608,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -74813,18 +70650,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -74854,10 +70689,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -74893,17 +70726,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -74937,19 +70768,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -74983,18 +70812,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75024,10 +70851,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75063,17 +70888,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -75107,19 +70930,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -75153,18 +70974,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -75194,10 +71013,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -75233,17 +71050,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -75277,19 +71092,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -75323,1448 +71136,51 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "mov x17, #0xfffffffffffffff0", + "str s2, [x9, w17, sxtw]", + "lsl w29, w21, w20", + "bic w22, w22, w29", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -76795,480 +71211,4271 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w29, w21, w20", "orr w22, w22, w29", - "strb w22, [x28, #1298]", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "mov x29, #0xfffffffffffffff4", + "str s2, [x9, w29, sxtw]", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77302,14 +75509,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77341,7 +75547,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77375,14 +75580,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w25, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77414,7 +75618,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77448,14 +75651,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w12, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77487,7 +75689,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77521,14 +75722,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w13, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77560,7 +75760,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77594,14 +75793,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w14, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77633,7 +75831,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77667,14 +75864,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w15, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77706,7 +75902,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77740,14 +75935,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w16, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77779,7 +75973,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77813,14 +76006,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w17, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77852,7 +76044,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77886,14 +76077,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w29, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -77925,7 +76115,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -77959,24 +76148,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -78008,23 +76196,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -78056,23 +76243,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -78104,13 +76290,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -78140,13 +76325,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -78176,13 +76360,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -78212,28 +76395,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w7, [x8]", "mov w20, #0x26ea", "movk w20, #0x1, lsl #16", - "mov w21, #0xd118", - "movk w21, #0x818, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd118", + "movk w22, #0x818, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block7": { - "ExpectedInstructionCount": 11512, + "ExpectedInstructionCount": 11003, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -78657,16 +76839,13 @@ "ExpectedArm64ASM": [ "str w9, [x8, #-4]!", "mov x9, x8", - "mov w20, w8", - "str w7, [x20, #-4]!", - "mov x21, x8", - "mov x8, x20", - "mov x27, x20", - "subs w26, w20, #0x84 (132)", + "str w7, [x8, #-4]!", + "subs w26, w8, #0x84 (132)", "cfinv", + "mov x27, x8", "mov x8, x26", - "ldr w7, [x21, #8]", - "ldr w4, [x21, #16]", + "ldr w7, [x9, #8]", + "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", @@ -78702,7 +76881,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78738,17 +76916,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -78782,14 +76958,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", @@ -78823,10 +76997,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -78862,17 +77034,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -78906,19 +77076,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -78952,14 +77120,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", @@ -78993,10 +77159,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79032,386 +77196,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x22, #0xffffffffffffffd0", - "str s2, [x9, w22, sxtw]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79452,134 +77238,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -79622,180 +77282,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -79833,16 +77321,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -79872,10 +77358,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -79916,10 +77400,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -79962,10 +77444,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80000,16 +77480,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xffffffffffffffd4", + "mov x23, #0xffffffffffffffd0", "str s2, [x9, w23, sxtw]", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80040,15 +77519,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80078,10 +77556,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80122,10 +77598,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80163,16 +77637,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80202,10 +77674,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80246,10 +77716,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80292,10 +77760,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80333,16 +77799,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80372,10 +77836,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80416,10 +77878,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80462,10 +77922,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80503,16 +77961,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80542,10 +77998,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80586,10 +78040,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80632,10 +78084,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80670,16 +78120,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x24, #0xffffffffffffffd8", + "mov x24, #0xffffffffffffffd4", "str s2, [x9, w24, sxtw]", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -80710,15 +78159,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80748,10 +78196,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80792,10 +78238,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80833,16 +78277,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -80872,10 +78314,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -80916,10 +78356,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -80962,10 +78400,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81003,16 +78439,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81042,10 +78476,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81086,10 +78518,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81132,10 +78562,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81173,16 +78601,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -81212,10 +78638,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81256,10 +78680,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81302,10 +78724,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81340,16 +78760,332 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x25, #0xffffffffffffffdc", + "mov x25, #0xffffffffffffffd8", "str s2, [x9, w25, sxtw]", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w12, w20, #0x1 (1)", + "and w12, w12, #0x7", + "add x0, x28, x12, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81380,48 +79116,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81462,134 +79158,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81632,10 +79202,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81643,215 +79211,6 @@ "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #44]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -81882,10 +79241,45 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -81926,10 +79320,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -81972,10 +79364,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82010,16 +79400,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x12, #0xffffffffffffffe0", + "mov x12, #0xffffffffffffffdc", "str s2, [x9, w12, sxtw]", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -82050,15 +79439,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s2, [x4, #12]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82088,10 +79476,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82132,10 +79518,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82173,16 +79557,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82212,10 +79594,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82256,10 +79636,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82302,10 +79680,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82343,16 +79719,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", + "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82382,10 +79756,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82426,10 +79798,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82472,10 +79842,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82513,16 +79881,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", + "ldr s2, [x4, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82552,10 +79918,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82596,10 +79960,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82642,10 +80004,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82680,16 +80040,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x13, #0xffffffffffffffe4", + "mov x13, #0xffffffffffffffe0", "str s2, [x9, w13, sxtw]", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -82720,15 +80079,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #8]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82758,10 +80116,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82802,10 +80158,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82843,16 +80197,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -82882,10 +80234,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -82926,10 +80276,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -82972,10 +80320,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83013,16 +80359,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83052,10 +80396,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83096,10 +80438,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83142,10 +80482,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83183,16 +80521,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", + "ldr s2, [x4, #56]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83222,10 +80558,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83266,10 +80600,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83312,10 +80644,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83350,16 +80680,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x14, #0xffffffffffffffe8", + "mov x14, #0xffffffffffffffe4", "str s2, [x9, w14, sxtw]", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #32]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -83390,15 +80719,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", + "ldr s2, [x4, #4]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83428,10 +80756,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83472,10 +80798,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83513,16 +80837,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83552,10 +80874,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83596,10 +80916,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83642,10 +80960,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83683,16 +80999,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", + "ldr s2, [x4, #36]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83722,10 +81036,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83766,10 +81078,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83812,10 +81122,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83853,16 +81161,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", + "ldr s2, [x4, #52]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -83892,10 +81198,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -83936,10 +81240,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -83982,10 +81284,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -84020,16 +81320,170 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x15, #0xffffffffffffffec", + "mov x15, #0xffffffffffffffe8", "str s2, [x9, w15, sxtw]", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84060,48 +81514,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -84142,134 +81556,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -84312,10 +81600,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -84323,7 +81609,7 @@ "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", + "ldr s2, [x4, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84353,15 +81639,138 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -84392,147 +81801,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w16, w20, #0x1 (1)", - "and w16, w16, #0x7", - "add x0, x28, x16, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x16, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #12]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #60]", + "ldr s2, [x4, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -84562,10 +81838,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "orr w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -84606,10 +81880,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -84652,10 +81924,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -84690,1318 +81960,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x16, #0xfffffffffffffff0", + "mov x16, #0xffffffffffffffec", "str s2, [x9, w16, sxtw]", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "bic w17, w17, w29", - "strb w17, [x28, #1298]", + "lsl w17, w21, w20", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w17, [x28, #1298]", - "lsl w29, w21, w20", - "orr w17, w17, w29", - "strb w17, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w17, w20, #0x1 (1)", - "and w17, w17, #0x7", - "add x0, x28, x17, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x17, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "mov x17, #0xfffffffffffffff4", - "str s2, [x9, w17, sxtw]", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "bic w29, w29, w30", - "strb w29, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #16]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", @@ -86033,644 +81999,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #16]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #28]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -86706,17 +82036,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86750,18 +82078,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", + "ldr s2, [x4, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86791,10 +82117,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -86830,17 +82154,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86874,19 +82196,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -86920,18 +82240,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", + "ldr s2, [x4, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -86961,10 +82279,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -87000,17 +82316,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -87044,19 +82358,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -87090,18 +82402,16 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", + "ldr s2, [x4, #28]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -87131,10 +82441,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -87170,17 +82478,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", + "lsl w17, w21, w20", + "orr w22, w22, w17", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -87214,19 +82520,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", + "add w17, w20, #0x1 (1)", + "and w17, w17, #0x7", + "add x0, x28, x17, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -87260,1448 +82564,51 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", + "lsl w29, w21, w20", + "bic w22, w22, w29", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", + "add x0, x28, x17, lsl #4", "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "mov x17, #0xfffffffffffffff0", + "str s2, [x9, w17, sxtw]", + "lsl w29, w21, w20", + "bic w22, w22, w29", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", "ldr w4, [x9, #16]", "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #40]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #56]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #20]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #36]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #52]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", "ldr s2, [x4, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -88732,480 +82639,4271 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #8]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #32]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #16]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #12]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4, #48]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w29, [x28, #1298]", - "lsl w30, w21, w20", - "orr w29, w29, w30", - "strb w29, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w29, w20, #0x1 (1)", - "and w29, w29, #0x7", - "add x0, x28, x29, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w30, [x28, #1298]", - "lsl w19, w21, w20", - "bic w30, w30, w19", - "strb w30, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x29, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w29, w21, w20", "orr w22, w22, w29", - "strb w22, [x28, #1298]", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w29, w21, w20", + "orr w22, w22, w29", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w29, w20, #0x1 (1)", + "and w29, w29, #0x7", + "add x0, x28, x29, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x29, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "mov x29, #0xfffffffffffffff4", + "str s2, [x9, w29, sxtw]", + "lsl w30, w21, w20", + "bic w22, w22, w30", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #28]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #44]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #60]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #40]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #56]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #20]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #36]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #52]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #16]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #8]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #32]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #16]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #12]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #12]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4, #48]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w30, w21, w20", + "orr w22, w22, w30", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w30, w20, #0x1 (1)", + "and w30, w30, #0x7", + "add x0, x28, x30, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w19, w21, w20", + "bic w22, w22, w19", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x30, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89239,14 +86937,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #64]", - "ldrb w22, [x28, #1298]", - "lsl w29, w21, w20", - "bic w22, w22, w29", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89278,7 +86975,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89312,14 +87008,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #60]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w24, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w25, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89351,7 +87046,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89385,14 +87079,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #56]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w25, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w12, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89424,7 +87117,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89458,14 +87150,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #52]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w12, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w13, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89497,7 +87188,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89531,14 +87221,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w13, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w14, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89570,7 +87259,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89604,14 +87292,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w14, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w15, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89643,7 +87330,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89677,14 +87363,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w15, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w16, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89716,7 +87401,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89750,14 +87434,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #36]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w16, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w17, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89789,7 +87472,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89823,14 +87505,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr s2, [x9, w17, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w29, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -89862,7 +87543,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -89896,24 +87576,23 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x5 (5)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x5 (5)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "mov w23, #0x0", - "strb w23, [x28, #1017]", + "mov w24, #0x0", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -89945,23 +87624,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -89993,23 +87671,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", - "lsl w24, w21, w20", - "bic w22, w22, w24", - "strb w22, [x28, #1298]", + "lsl w23, w21, w20", + "bic w22, w22, w23", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "ldr q3, [x0, #1040]", - "strb w23, [x28, #1017]", + "strb w24, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -90041,13 +87718,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90077,13 +87753,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #12]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90113,13 +87788,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #8]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", "mrs x0, nzcv", @@ -90149,28 +87823,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #4]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "str w7, [x8]", "mov w20, #0x2bf5", "movk w20, #0x1, lsl #16", - "mov w21, #0xd10b", - "movk w21, #0x818, lsl #16", - "add w21, w20, w21", + "mov w22, #0xd10b", + "movk w22, #0x818, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] }, "Block8": { - "ExpectedInstructionCount": 8783, + "ExpectedInstructionCount": 8590, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -90569,7 +88242,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -90731,10 +88403,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -90894,13 +88564,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -90933,7 +88602,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -91093,13 +88761,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #40]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x8 (8)", "add w23, w23, w10, lsl #2", "ldr s2, [x23]", @@ -91134,13 +88801,12 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w4, w7, lsl #2", - "ldr s2, [x22]", + "add w23, w4, w7, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91203,9 +88869,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w5, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w5, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91235,27 +88901,25 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w22, #0x0", - "mov w23, #0x8000", - "fmov d3, x22", - "mov v3.d[1], x23", + "mov w23, #0x0", + "mov w24, #0x8000", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91318,8 +88982,8 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w7, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w7, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91349,17 +89013,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91451,13 +89113,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w25, w4, #0x4 (4)", "add w25, w25, w10, lsl #2", "ldr s2, [x25]", @@ -91491,15 +89152,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w5, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91591,13 +89251,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w25, w4, #0x8 (8)", "add w25, w25, w6, lsl #2", "ldr s2, [x25]", @@ -91631,15 +89290,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91702,9 +89360,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w6, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91734,17 +89392,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91836,13 +89492,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w25, w4, #0x8 (8)", "add w25, w25, w6, lsl #2", "ldr s2, [x25]", @@ -91876,15 +89531,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -91976,13 +89630,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w25, w4, #0x4 (4)", "add w25, w25, w6, lsl #2", "ldr s2, [x25]", @@ -92016,15 +89669,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -92116,30 +89768,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92204,25 +89853,22 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w7, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, w7, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92318,31 +89964,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w5, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92407,32 +90052,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w6, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92464,15 +90106,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92537,32 +90178,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w6, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -92594,8 +90232,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92693,10 +90330,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -92764,23 +90399,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92817,23 +90450,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92870,9 +90501,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -92906,14 +90537,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -92944,33 +90573,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w10, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93007,23 +90633,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93060,9 +90684,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93096,14 +90720,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -93134,48 +90756,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w10, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93207,8 +90824,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -93306,10 +90922,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -93407,17 +91021,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93484,17 +91096,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93531,9 +91141,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93567,14 +91177,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -93605,16 +91213,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x8 (8)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x8 (8)", + "add w25, w25, w11, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -93646,15 +91253,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93721,17 +91327,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93768,9 +91372,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -93804,14 +91408,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -93842,48 +91444,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "sub w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, w5, lsl #2", "ldr s2, [x25]", "mrs x0, nzcv", @@ -93916,14 +91513,13 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -93986,9 +91582,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w5, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94018,25 +91614,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94099,8 +91693,8 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w5, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w5, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94130,16 +91724,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w10, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94231,13 +91823,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, #0x4 (4)", "add w25, w25, w10, lsl #2", "ldr s2, [x25]", @@ -94271,15 +91862,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w5, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94371,13 +91961,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, w11, lsl #2", "ldr s2, [x25]", "mrs x0, nzcv", @@ -94410,14 +91999,13 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w6, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94480,9 +92068,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w6, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94512,17 +92100,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94614,13 +92200,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, w6, lsl #2", "ldr s2, [x25]", "mrs x0, nzcv", @@ -94653,14 +92238,13 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, w11, lsl #2", - "ldr s2, [x24]", + "add w25, w4, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94752,13 +92336,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, #0x4 (4)", "add w25, w25, w6, lsl #2", "ldr s2, [x25]", @@ -94792,15 +92375,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -94892,30 +92474,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -94980,25 +92559,22 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w5, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, w5, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -95094,31 +92670,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w5, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w5, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95183,31 +92758,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w6, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, w6, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95239,15 +92811,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95312,32 +92883,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w6, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w6, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95369,8 +92937,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -95468,10 +93035,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -95539,23 +93104,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95683,18 +93246,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w10, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, w10, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -95822,32 +93384,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w10, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w10, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -95879,8 +93438,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -95978,10 +93536,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -96079,39 +93635,35 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x3 (3)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x3 (3)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96148,9 +93700,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96215,30 +93767,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, w11, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, w11, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x2 (2)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x2 (2)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96275,9 +93826,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -96342,48 +93893,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w24, w4, #0x4 (4)", - "add w24, w24, w11, lsl #2", - "str s2, [x24]", - "ldrb w24, [x28, #1298]", + "add w25, w4, #0x4 (4)", + "add w25, w25, w11, lsl #2", + "str s2, [x25]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w24, w20, #0x0 (0)", - "and w24, w24, #0x7", + "ldrb w20, [x28, #1019]", + "add w25, w20, #0x0 (0)", + "and w25, w25, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", - "ldrb w25, [x28, #1298]", - "lsl w24, w21, w24", - "orr w24, w25, w24", - "strb w24, [x28, #1298]", + "lsl w25, w21, w25", + "orr w22, w22, w25", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w25, w4, #0x8 (8)", "add w25, w25, w5, lsl #2", "ldr s2, [x25]", @@ -96417,15 +93963,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0x8 (8)", - "add w24, w24, w10, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0x8 (8)", + "add w25, w25, w10, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96488,9 +94033,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w4, #0xc (12)", - "add w24, w24, w5, lsl #2", - "ldr s2, [x24]", + "add w25, w4, #0xc (12)", + "add w25, w25, w5, lsl #2", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96520,25 +94065,23 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "fmov d3, x22", - "mov v3.d[1], x23", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96601,9 +94144,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96633,17 +94176,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96735,13 +94276,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0xc (12)", "add w24, w24, w10, lsl #2", "ldr s2, [x24]", @@ -96775,15 +94315,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96875,13 +94414,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x8 (8)", "add w24, w24, w11, lsl #2", "ldr s2, [x24]", @@ -96915,15 +94453,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -96986,9 +94523,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97018,17 +94555,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97120,13 +94655,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x8 (8)", "add w24, w24, w6, lsl #2", "ldr s2, [x24]", @@ -97160,15 +94694,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97260,13 +94793,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0xc (12)", "add w24, w24, w6, lsl #2", "ldr s2, [x24]", @@ -97300,15 +94832,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -97400,30 +94931,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -97488,26 +95016,23 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -97603,31 +95128,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -97692,32 +95216,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97749,15 +95270,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -97822,32 +95342,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0xc (12)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -97879,8 +95396,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -97978,10 +95494,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -98049,23 +95563,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98102,23 +95614,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98155,9 +95665,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98191,14 +95701,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -98229,246 +95737,238 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "str s2, [x24]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "add w23, w4, #0xc (12)", "add w23, w23, w10, lsl #2", "str s2, [x23]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w22, w4, #0xc (12)", - "add w22, w22, w10, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98501,7 +96001,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -98599,10 +96098,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -98700,17 +96197,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98777,17 +96272,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98824,9 +96317,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -98860,14 +96353,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -98898,16 +96389,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w4, #0x8 (8)", - "add w22, w22, w11, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w11, lsl #2", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #40]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -98940,14 +96430,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99014,17 +96503,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99061,9 +96548,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -99097,14 +96584,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -99135,13 +96620,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w4, #0xc (12)", - "add w22, w22, w11, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w4, #0xc (12)", + "add w23, w23, w11, lsl #2", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -99149,37 +96632,33 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -99187,11 +96666,12 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", + "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block9": { - "ExpectedInstructionCount": 8669, + "ExpectedInstructionCount": 8488, "x86Insts": [ "fadd dword [esp + 0x40]", "lea edx,[ecx + ecx*0x2]", @@ -99581,7 +97061,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -99743,10 +97222,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -99906,13 +97383,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #48]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #60]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -99945,7 +97421,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -100105,13 +97580,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #44]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x8 (8)", "add w23, w23, w10, lsl #2", "ldr s2, [x23]", @@ -100146,13 +97620,12 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w4, w7, lsl #2", - "ldr s2, [x22]", + "add w23, w4, w7, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100215,9 +97688,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w5, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w5, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100247,17 +97720,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w10, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100320,8 +97791,8 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w4, w7, lsl #2", - "ldr s2, [x22]", + "add w23, w4, w7, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100351,17 +97822,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x8 (8)", - "add w22, w22, w10, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x8 (8)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100453,13 +97922,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x4 (4)", "add w23, w23, w5, lsl #2", "ldr s2, [x23]", @@ -100494,14 +97962,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w10, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w10, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100593,13 +98060,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x8 (8)", "add w23, w23, w11, lsl #2", "ldr s2, [x23]", @@ -100634,14 +98100,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x8 (8)", - "add w22, w22, w6, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x8 (8)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100704,9 +98169,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w6, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w6, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100736,17 +98201,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w11, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100838,13 +98301,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x8 (8)", "add w23, w23, w6, lsl #2", "ldr s2, [x23]", @@ -100879,14 +98341,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x8 (8)", - "add w22, w22, w11, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x8 (8)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -100978,13 +98439,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "sub w23, w4, #0x4 (4)", "add w23, w23, w6, lsl #2", "ldr s2, [x23]", @@ -101019,14 +98479,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "sub w22, w4, #0x4 (4)", - "add w22, w22, w11, lsl #2", - "ldr s2, [x22]", + "sub w23, w4, #0x4 (4)", + "add w23, w23, w11, lsl #2", + "ldr s2, [x23]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -101118,31 +98577,28 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "mov w22, #0x0", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "mov w23, #0x0", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101207,15 +98663,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w7, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, w7, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101247,15 +98702,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101320,31 +98774,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101409,32 +98862,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101526,16 +98976,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -101567,8 +99016,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -101666,10 +99114,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -101737,23 +99183,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101790,23 +99234,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101843,9 +99285,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101879,14 +99321,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -101917,33 +99357,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -101980,23 +99417,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102033,9 +99468,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102069,14 +99504,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -102107,48 +99540,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102180,8 +99608,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102279,10 +99706,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -102380,17 +99805,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102457,17 +99880,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102504,9 +99925,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102540,14 +99961,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -102578,16 +99997,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #48]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -102619,15 +100037,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102694,17 +100111,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102741,9 +100156,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -102777,14 +100192,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -102815,48 +100228,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "sub w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "sub w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, w5, lsl #2", "ldr s2, [x24]", "mrs x0, nzcv", @@ -102889,14 +100297,13 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102959,9 +100366,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -102991,17 +100398,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103064,8 +100469,8 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103095,16 +100500,14 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103196,13 +100599,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x4 (4)", "add w24, w24, w5, lsl #2", "ldr s2, [x24]", @@ -103236,15 +100638,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103336,13 +100737,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, w6, lsl #2", "ldr s2, [x24]", "mrs x0, nzcv", @@ -103375,14 +100775,13 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103445,285 +100844,6 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w24, w4, w6, lsl #2", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w4, w11, lsl #2", - "ldr s2, [x23]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", "add w24, w4, #0x4 (4)", "add w24, w24, w6, lsl #2", "ldr s2, [x24]", @@ -103757,15 +100877,288 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #16]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "add w24, w4, w6, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w4, w11, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x8, #32]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -103857,30 +101250,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -103945,15 +101335,14 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -103985,15 +101374,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104058,31 +101446,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104147,31 +101534,28 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104263,16 +101647,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104304,8 +101687,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -104403,10 +101785,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -104474,23 +101854,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104618,18 +101996,17 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w10, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, w10, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -104757,32 +102134,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w10, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w10, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -104814,8 +102188,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -104913,10 +102286,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -105014,40 +102385,36 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "mov w23, #0x8000", - "fmov d3, x22", - "mov v3.d[1], x23", + "mov w24, #0x8000", + "fmov d3, x23", + "mov v3.d[1], x24", "eor v2.16b, v2.16b, v3.16b", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105084,9 +102451,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105151,30 +102518,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, w11, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, w11, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105211,9 +102577,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -105278,48 +102644,43 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x4 (4)", - "add w23, w23, w11, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x4 (4)", + "add w24, w24, w11, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x8 (8)", "add w24, w24, w5, lsl #2", "ldr s2, [x24]", @@ -105353,15 +102714,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105424,9 +102784,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105456,17 +102816,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105529,9 +102887,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105561,17 +102919,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105663,13 +103019,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #24]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0xc (12)", "add w24, w24, w5, lsl #2", "ldr s2, [x24]", @@ -105703,15 +103058,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w10, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w10, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105803,13 +103157,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #28]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x8 (8)", "add w24, w24, w11, lsl #2", "ldr s2, [x24]", @@ -105843,15 +103196,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105914,9 +103266,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -105946,17 +103298,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w6, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106048,13 +103398,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #16]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0x8 (8)", "add w24, w24, w6, lsl #2", "ldr s2, [x24]", @@ -106088,15 +103437,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0x8 (8)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106188,13 +103536,12 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #32]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "add w24, w4, #0xc (12)", "add w24, w24, w6, lsl #2", "ldr s2, [x24]", @@ -106228,15 +103575,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w4, #0xc (12)", - "add w23, w23, w11, lsl #2", - "ldr s2, [x23]", + "add w24, w4, #0xc (12)", + "add w24, w24, w11, lsl #2", + "ldr s2, [x24]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -106328,30 +103674,27 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x8, #20]", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x0 (0)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x0 (0)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -106416,16 +103759,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106457,15 +103799,14 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -106530,31 +103871,30 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w5, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0xc (12)", + "add w24, w24, w5, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", + "strb w23, [x28, #1017]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -106619,32 +103959,29 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0x8 (8)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", - "ldrb w24, [x28, #1298]", - "lsl w23, w21, w23", - "orr w23, w24, w23", - "strb w23, [x28, #1298]", + "lsl w24, w21, w24", + "orr w22, w22, w24", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #16]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106736,16 +104073,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0xc (12)", - "add w23, w23, w6, lsl #2", - "str s2, [x23]", - "ldrb w23, [x28, #1298]", + "add w24, w4, #0xc (12)", + "add w24, w24, w6, lsl #2", + "str s2, [x24]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #24]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -106777,8 +104113,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -106876,10 +104211,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -106947,23 +104280,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107000,23 +104331,21 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x4 (4)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x4 (4)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107053,9 +104382,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107089,14 +104418,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -107127,246 +104454,238 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w23, w4, #0x8 (8)", + "add w24, w4, #0x8 (8)", + "add w24, w24, w10, lsl #2", + "str s2, [x24]", + "lsl w24, w21, w20", + "bic w22, w22, w24", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x3 (3)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x2 (2)", + "and w24, w24, #0x7", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "ldr q3, [x0, #1040]", + "strb w23, [x28, #1017]", + "add x0, x28, x20, lsl #4", + "str q3, [x0, #1040]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "add w23, w4, #0xc (12)", "add w23, w23, w10, lsl #2", "str s2, [x23]", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x3 (3)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w23, w20, #0x2 (2)", - "and w23, w23, #0x7", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "ldr q3, [x0, #1040]", - "strb w22, [x28, #1017]", - "add x0, x28, x20, lsl #4", - "str q3, [x0, #1040]", - "add x0, x28, x23, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "add w22, w4, #0xc (12)", - "add w22, w22, w10, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #20]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107399,7 +104718,6 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -107497,10 +104815,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -107598,17 +104914,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107675,17 +104989,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107722,9 +105034,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107758,14 +105070,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -107796,16 +105106,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w4, #0x8 (8)", - "add w22, w22, w11, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w4, #0x8 (8)", + "add w23, w23, w11, lsl #2", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", "ldr s2, [x8, #44]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -107838,14 +105147,13 @@ "and w20, w20, #0x7", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107912,17 +105220,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x3 (3)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x3 (3)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107959,9 +105265,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -107995,14 +105301,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -108033,13 +105337,11 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "add w22, w4, #0xc (12)", - "add w22, w22, w11, lsl #2", - "str s2, [x22]", - "ldrb w22, [x28, #1298]", + "add w23, w4, #0xc (12)", + "add w23, w23, w11, lsl #2", + "str s2, [x23]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -108047,37 +105349,33 @@ "add x8, x8, #0x4 (4)", "ldr w10, [x8]", "add x8, x8, #0x4 (4)", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w9, [x8]", "add x8, x8, #0x4 (4)", - "add w22, w20, #0x0 (0)", - "and w22, w22, #0x7", + "ldrb w20, [x28, #1019]", + "add w23, w20, #0x0 (0)", + "and w23, w23, #0x7", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", - "ldrb w23, [x28, #1298]", - "lsl w22, w21, w22", - "orr w22, w23, w22", - "strb w22, [x28, #1298]", + "lsl w23, w21, w23", + "orr w22, w22, w23", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -108085,11 +105383,12 @@ "add x8, x8, #0x4 (4)", "mvn w27, w8", "adds w26, w8, #0x74 (116)", + "strb w21, [x28, #1298]", "mov x8, x26" ] }, "Block10": { - "ExpectedInstructionCount": 8735, + "ExpectedInstructionCount": 8405, "x86Insts": [ "push ebp", "mov ebp,esp", @@ -108515,10 +105814,8 @@ "ExpectedArm64ASM": [ "str w9, [x8, #-4]!", "mov x9, x8", - "sub w20, w8, #0x14 (20)", - "mov x21, x8", - "mov x8, x20", - "ldr w4, [x21, #8]", + "sub w8, w8, #0x14 (20)", + "ldr w4, [x9, #8]", "add w4, w4, #0x78 (120)", "ldrb w20, [x28, #1019]", "ldr s2, [x4]", @@ -108555,7 +105852,6 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -108592,17 +105888,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "orr w22, w22, w23", - "strb w22, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -108636,14 +105930,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -108674,17 +105966,16 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x22, #0xfffffffffffffff8", - "str s2, [x9, w22, sxtw]", - "ldrb w23, [x28, #1298]", + "mov x23, #0xfffffffffffffff8", + "str s2, [x9, w23, sxtw]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x7c (124)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108716,8 +106007,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -108754,17 +106044,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w24", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w23, w20, #0x1 (1)", - "and w23, w23, #0x7", - "add x0, x28, x23, lsl #4", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -108798,14 +106086,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x23, lsl #4", + "add x0, x28, x24, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -108836,12 +106122,10 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "mov x23, #0xfffffffffffffffc", - "str s2, [x9, w23, sxtw]", - "ldrb w24, [x28, #1298]", + "mov x24, #0xfffffffffffffffc", + "str s2, [x9, w24, sxtw]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -108849,6 +106133,7 @@ "add w4, w4, #0x78 (120)", "ldr w6, [x9, #8]", "add w6, w6, #0x78 (120)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -108880,8 +106165,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -108918,17 +106202,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -108962,14 +106244,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109001,10 +106281,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -109012,6 +106290,7 @@ "add w4, w4, #0x7c (124)", "ldr w6, [x9, #8]", "add w6, w6, #0x7c (124)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109043,8 +106322,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -109081,17 +106359,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -109125,14 +106401,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109164,23 +106438,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x38 (56)", - "ldr w4, [x9, w22, sxtw]", - "str w4, [x6]", - "ldr w4, [x9, #8]", - "add w6, w4, #0x3c (60)", "ldr w4, [x9, w23, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", + "add w6, w4, #0x3c (60)", + "ldr w4, [x9, w24, sxtw]", + "str w4, [x6]", + "ldr w4, [x9, #8]", "add w4, w4, #0x70 (112)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109212,8 +106485,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -109250,17 +106522,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -109294,14 +106564,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109332,16 +106600,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w24, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x74 (116)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109373,8 +106640,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -109411,17 +106677,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -109455,14 +106719,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109493,11 +106755,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w24, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -109505,6 +106765,7 @@ "add w4, w4, #0x70 (112)", "ldr w6, [x9, #8]", "add w6, w6, #0x70 (112)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109536,8 +106797,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -109574,17 +106834,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -109618,14 +106876,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109657,10 +106913,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -109668,6 +106922,7 @@ "add w4, w4, #0x74 (116)", "ldr w6, [x9, #8]", "add w6, w6, #0x74 (116)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -109699,8 +106954,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -109737,17 +106991,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w24, w20, #0x1 (1)", - "and w24, w24, #0x7", - "add x0, x28, x24, lsl #4", + "add w25, w20, #0x1 (1)", + "and w25, w25, #0x7", + "add x0, x28, x25, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -109781,14 +107033,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w25, [x28, #1298]", "lsl w12, w21, w20", - "bic w25, w25, w12", - "strb w25, [x28, #1298]", + "bic w22, w22, w12", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x24, lsl #4", + "add x0, x28, x25, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -109820,137 +107070,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w24, [x28, #1298]", "lsl w25, w21, w20", - "bic w24, w24, w25", - "strb w24, [x28, #1298]", + "bic w22, w22, w25", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x30 (48)", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w25, w21, w20", - "orr w24, w24, w25", - "strb w24, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "mov w24, #0x3140", - "movk w24, #0x855, lsl #16", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w25, w20, #0x1 (1)", - "and w25, w25, #0x7", - "add x0, x28, x25, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x25, lsl #4", - "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", @@ -109982,15 +107108,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w25, [x28, #1298]", - "lsl w12, w21, w20", - "orr w25, w25, w12", - "strb w25, [x28, #1298]", + "lsl w25, w21, w20", + "orr w22, w22, w25", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w25, #0x3144", + "mov w25, #0x3140", "movk w25, #0x855, lsl #16", "ldr s2, [x25]", "mrs x0, nzcv", @@ -110022,10 +107146,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -110066,101 +107188,15 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "ldrb w12, [x28, #1298]", "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "add w4, w4, #0x34 (52)", - "ldr s2, [x9, w22, sxtw]", + "add x0, x28, x12, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -110190,14 +107226,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", + "lsl w12, w21, w20", + "orr w22, w22, w12", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w12, #0x3148", + "mov w12, #0x3144", "movk w12, #0x855, lsl #16", "ldr s2, [x12]", "mrs x0, nzcv", @@ -110229,10 +107264,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "orr w22, w22, w13", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -110273,132 +107306,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -110441,10 +107350,8 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -110480,15 +107387,329 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr w4, [x9, #8]", + "add w4, w4, #0x34 (52)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w13, w21, w20", + "orr w22, w22, w13", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w13, #0x3148", + "movk w13, #0x855, lsl #16", + "ldr s2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w15, w21, w20", + "bic w22, w22, w15", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x14, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w14, w21, w20", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x25]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w14, w21, w20", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w15, w21, w20", + "bic w22, w22, w15", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x14, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w15, w21, w20", + "bic w22, w22, w15", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x14, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x4]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x68 (104)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110520,8 +107741,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -110558,17 +107778,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -110602,14 +107820,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -110640,16 +107856,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w13, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x6c (108)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110681,8 +107896,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -110719,17 +107933,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -110763,14 +107975,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -110801,11 +108011,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w13, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -110813,6 +108021,7 @@ "add w4, w4, #0x68 (104)", "ldr w6, [x9, #8]", "add w6, w6, #0x68 (104)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -110844,8 +108053,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -110882,17 +108090,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -110926,14 +108132,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -110965,10 +108169,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -110976,6 +108178,7 @@ "add w4, w4, #0x6c (108)", "ldr w6, [x9, #8]", "add w6, w6, #0x6c (108)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111007,8 +108210,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -111045,17 +108247,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -111089,14 +108289,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -111128,16 +108326,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x28 (40)", - "ldr s2, [x9, w22, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111168,13 +108365,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111237,9 +108433,9 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w13, #0x313c", - "movk w13, #0x855, lsl #16", - "ldr s2, [x13]", + "mov w14, #0x313c", + "movk w14, #0x855, lsl #16", + "ldr s2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111269,17 +108465,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -111313,14 +108507,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -111352,16 +108544,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x2c (44)", - "ldr s2, [x9, w22, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111392,13 +108583,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w23, sxtw]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111461,7 +108651,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -111491,17 +108681,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -111535,14 +108723,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -111574,15 +108760,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x60 (96)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111614,8 +108799,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -111652,17 +108836,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -111696,14 +108878,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -111734,16 +108914,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w14, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x64 (100)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111775,8 +108954,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -111813,17 +108991,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -111857,14 +109033,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -111895,11 +109069,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w14, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -111907,6 +109079,7 @@ "add w4, w4, #0x60 (96)", "ldr w6, [x9, #8]", "add w6, w6, #0x60 (96)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -111938,8 +109111,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -111976,17 +109148,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -112020,14 +109190,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -112059,10 +109227,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -112070,6 +109236,7 @@ "add w4, w4, #0x64 (100)", "ldr w6, [x9, #8]", "add w6, w6, #0x64 (100)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112101,8 +109268,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -112139,17 +109305,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -112183,14 +109347,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -112222,135 +109384,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x20 (32)", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", @@ -112382,17 +109422,13 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "mov w14, #0x314c", - "movk w14, #0x855, lsl #16", - "ldr s2, [x14]", + "ldr s2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112422,10 +109458,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -112466,19 +109500,135 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w15, w21, w20", + "orr w22, w22, w15", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "mov w15, #0x314c", + "movk w15, #0x855, lsl #16", + "ldr s2, [x15]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -112512,14 +109662,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -112551,15 +109699,130 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x24 (36)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112591,13 +109854,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "ldr s2, [x25]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -112627,17 +109889,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -112671,141 +109931,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -112839,14 +109975,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -112878,15 +110012,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x58 (88)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -112918,8 +110051,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -112956,17 +110088,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113000,14 +110130,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113038,16 +110166,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w15, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x1c (28)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113079,8 +110206,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113117,17 +110243,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113161,14 +110285,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113199,11 +110321,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w15, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -113211,6 +110331,7 @@ "add w4, w4, #0x58 (88)", "ldr w6, [x9, #8]", "add w6, w6, #0x58 (88)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113242,8 +110363,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113280,17 +110400,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113324,14 +110442,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113363,10 +110479,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -113374,6 +110488,7 @@ "add w4, w4, #0x5c (92)", "ldr w6, [x9, #8]", "add w6, w6, #0x5c (92)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113405,8 +110520,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113443,17 +110557,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113487,14 +110599,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113526,23 +110636,22 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w6, w4, #0x18 (24)", - "ldr w4, [x9, w23, sxtw]", + "ldr w4, [x9, w24, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w6, w4, #0x1c (28)", - "ldr w4, [x9, w22, sxtw]", + "ldr w4, [x9, w23, sxtw]", "str w4, [x6]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113574,8 +110683,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113612,17 +110720,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113656,14 +110762,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113694,16 +110798,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w15, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113735,8 +110838,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113773,17 +110875,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113817,14 +110917,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -113855,11 +110953,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w15, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -113867,6 +110963,7 @@ "add w4, w4, #0x50 (80)", "ldr w6, [x9, #8]", "add w6, w6, #0x50 (80)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -113898,8 +110995,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -113936,17 +111032,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -113980,14 +111074,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -114019,10 +111111,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -114030,6 +111120,7 @@ "add w4, w4, #0x54 (84)", "ldr w6, [x9, #8]", "add w6, w6, #0x54 (84)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -114061,8 +111152,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -114099,17 +111189,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -114143,14 +111231,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -114182,15 +111268,130 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x10 (16)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x25]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -114222,13 +111423,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", + "ldr s2, [x13]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114258,17 +111458,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -114302,141 +111500,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w15, w20, #0x1 (1)", - "and w15, w15, #0x7", - "add x0, x28, x15, lsl #4", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -114470,14 +111544,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "bic w22, w22, w17", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x15, lsl #4", + "add x0, x28, x16, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -114509,15 +111581,130 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x14 (20)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w16, w21, w20", + "orr w22, w22, w16", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w16, w20, #0x1 (1)", + "and w16, w16, #0x7", + "add x0, x28, x16, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w17, w21, w20", + "bic w22, w22, w17", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x16, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -114549,13 +111736,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "orr w22, w22, w16", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x12]", + "ldr s2, [x15]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -114585,10 +111771,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", + "lsl w15, w21, w20", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -114629,141 +111813,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w16, [x28, #1298]", - "lsl w17, w21, w20", - "bic w16, w16, w17", - "strb w16, [x28, #1298]", + "lsl w16, w21, w20", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "orr w15, w15, w16", - "strb w15, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x14]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", - "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -114797,14 +111857,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -114836,15 +111894,14 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -114876,8 +111933,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -114914,17 +111970,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -114958,14 +112012,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -114996,16 +112048,15 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w14, [x28, #1298]", + "str s2, [x9, w23, sxtw]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -115037,8 +112088,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -115075,17 +112125,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -115119,14 +112167,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -115157,11 +112203,9 @@ "ldr x16, [sp], #16", "ldp x17, x30, [sp], #16", "fmov s2, s0", - "str s2, [x9, w23, sxtw]", - "ldrb w14, [x28, #1298]", + "str s2, [x9, w24, sxtw]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -115169,6 +112213,7 @@ "add w4, w4, #0x48 (72)", "ldr w6, [x9, #8]", "add w6, w6, #0x48 (72)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -115200,8 +112245,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -115238,17 +112282,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -115282,14 +112324,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -115321,10 +112361,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -115332,6 +112370,7 @@ "add w4, w4, #0x4c (76)", "ldr w6, [x9, #8]", "add w6, w6, #0x4c (76)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -115363,8 +112402,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -115401,17 +112439,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -115445,14 +112481,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -115484,16 +112518,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0x8 (8)", - "ldr s2, [x9, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115524,13 +112557,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115593,7 +112625,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115623,17 +112655,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w14, w20, #0x1 (1)", - "and w14, w14, #0x7", - "add x0, x28, x14, lsl #4", + "add w15, w20, #0x1 (1)", + "and w15, w15, #0x7", + "add x0, x28, x15, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -115667,14 +112697,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w15, [x28, #1298]", "lsl w16, w21, w20", - "bic w15, w15, w16", - "strb w15, [x28, #1298]", + "bic w22, w22, w16", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x14, lsl #4", + "add x0, x28, x15, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -115706,16 +112734,15 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", "add w4, w4, #0xc (12)", - "ldr s2, [x9, w23, sxtw]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115746,13 +112773,12 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w15, w21, w20", - "orr w14, w14, w15", - "strb w14, [x28, #1298]", + "orr w22, w22, w15", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", + "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115815,7 +112841,7 @@ "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x13]", + "ldr s2, [x14]", "mrs x0, nzcv", "str w0, [x28, #1000]", "stp x4, x5, [x28, #280]", @@ -115845,17 +112871,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -115889,14 +112913,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -115928,14 +112950,13 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "ldr w4, [x9, #8]", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -115967,8 +112988,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -116005,17 +113025,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -116049,175 +113067,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x9, w22, sxtw]", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "add w4, w4, #0x4 (4)", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #8]", - "add w4, w4, #0x44 (68)", - "ldrb w20, [x28, #1019]", - "ldr s2, [x4]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "mov x3, v3.d[0]", - "umov w4, v3.h[4]", - "ldr x5, [x28, #1672]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -116249,10 +113104,163 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x9, w23, sxtw]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldr w4, [x9, #8]", + "add w4, w4, #0x4 (4)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w14, w21, w20", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldr w4, [x9, #8]", + "add w4, w4, #0x44 (68)", + "ldrb w20, [x28, #1019]", + "ldr s2, [x4]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w14, w21, w20", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "mov x3, v3.d[0]", + "umov w4, v3.h[4]", + "ldr x5, [x28, #1672]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w15, w21, w20", + "bic w22, w22, w15", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x14, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x9, w24, sxtw]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -116260,6 +113268,7 @@ "add w6, w4, #0x40 (64)", "ldr w4, [x9, #8]", "add w4, w4, #0x40 (64)", + "ldrb w20, [x28, #1019]", "ldr s2, [x4]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -116291,8 +113300,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -116328,17 +113336,15 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "add w13, w20, #0x1 (1)", - "and w13, w13, #0x7", - "add x0, x28, x13, lsl #4", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -116372,14 +113378,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "bic w22, w22, w15", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x13, lsl #4", + "add x0, x28, x14, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -116411,10 +113415,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x6]", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -116422,6 +113424,7 @@ "add w4, w4, #0x44 (68)", "ldr w6, [x9, #8]", "add w6, w6, #0x44 (68)", + "ldrb w20, [x28, #1019]", "ldr s2, [x6]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -116453,8 +113456,7 @@ "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -116491,14 +113493,323 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w13, [x28, #1298]", "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "orr w22, w22, w14", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", + "add w14, w20, #0x1 (1)", + "and w14, w14, #0x7", + "add x0, x28, x14, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1664]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w15, w21, w20", + "bic w22, w22, w15", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x14, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "ldr q2, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v2.d[0]", + "umov w2, v2.h[4]", + "ldr x3, [x28, #1440]", + "blr x3", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "fmov s2, s0", + "str s2, [x4]", + "lsl w14, w21, w20", + "bic w22, w22, w14", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w14, w21, w20", + "orr w22, w22, w14", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x13]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w13, w21, w20", + "orr w22, w22, w13", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w14, w21, w20", + "bic w22, w22, w14", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x13, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w23, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w13, w21, w20", + "orr w22, w22, w13", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x25]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w13, w21, w20", + "orr w22, w22, w13", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w13, w20, #0x1 (1)", + "and w13, w13, #0x7", + "add x0, x28, x13, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w14, w21, w20", + "bic w22, w22, w14", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x13, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", "add w13, w20, #0x1 (1)", "and w13, w13, #0x7", "add x0, x28, x13, lsl #4", @@ -116535,15 +113846,14 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w14, [x28, #1298]", - "lsl w15, w21, w20", - "bic w14, w14, w15", - "strb w14, [x28, #1298]", + "lsl w14, w21, w20", + "bic w22, w22, w14", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x13, lsl #4", "str q2, [x0, #1040]", + "ldr w4, [x9, #8]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -116574,13 +113884,132 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w13, w21, w20", + "bic w22, w22, w13", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", + "ldr w4, [x9, #8]", + "adds w26, w4, #0x4 (4)", + "mov x27, x4", + "mov x4, x26", + "ldrb w20, [x28, #1019]", + "ldr s2, [x9, w24, sxtw]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "ldr s2, [x25]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "fmov s0, s2", + "ldrh w0, [x28, #1296]", + "ldr x1, [x28, #1424]", + "blr x1", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "sub w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "lsl w24, w21, w20", + "orr w22, w22, w24", + "strb w20, [x28, #1019]", + "add x0, x28, x20, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", + "add w24, w20, #0x1 (1)", + "and w24, w24, #0x7", + "add x0, x28, x24, lsl #4", + "ldr q2, [x0, #1040]", + "add x0, x28, x20, lsl #4", + "ldr q3, [x0, #1040]", + "mrs x0, nzcv", + "str w0, [x28, #1000]", + "stp x4, x5, [x28, #280]", + "stp x6, x7, [x28, #296]", + "str x8, [x28, #312]", + "sub sp, sp, #0x80 (128)", + "mov x0, sp", + "st1 {v2.2d, v3.2d}, [x0], #32", + "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", + "str x16, [x0], #16", + "stp x17, x30, [x0], #16", + "ldrh w0, [x28, #1296]", + "mov x1, v3.d[0]", + "umov w2, v3.h[4]", + "mov x3, v2.d[0]", + "umov w4, v2.h[4]", + "ldr x5, [x28, #1680]", + "blr x5", + "ldr w4, [x28, #1000]", + "msr nzcv, x4", + "ldp x4, x5, [x28, #280]", + "ldp x6, x7, [x28, #296]", + "ldr x8, [x28, #312]", + "ld1 {v2.2d, v3.2d}, [sp], #32", + "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", + "ldr x16, [sp], #16", + "ldp x17, x30, [sp], #16", + "eor v2.16b, v2.16b, v2.16b", + "mov v2.d[0], x0", + "mov v2.h[4], w1", + "lsl w25, w21, w20", + "bic w22, w22, w25", + "add w20, w20, #0x1 (1)", + "and w20, w20, #0x7", + "strb w20, [x28, #1019]", + "add x0, x28, x24, lsl #4", + "str q2, [x0, #1040]", + "ldrb w20, [x28, #1019]", "ldr s2, [x9, w23, sxtw]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -116611,9 +114040,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "lsl w14, w21, w20", - "orr w13, w13, w14", - "strb w13, [x28, #1298]", + "lsl w23, w21, w20", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -116648,340 +114076,8 @@ "mov v2.h[4], w1", "sub w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "orr w12, w12, w13", - "strb w12, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w12, w20, #0x1 (1)", - "and w12, w12, #0x7", - "add x0, x28, x12, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1664]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w13, [x28, #1298]", - "lsl w14, w21, w20", - "bic w13, w13, w14", - "strb w13, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x12, lsl #4", - "str q2, [x0, #1040]", - "ldr w4, [x9, #8]", - "ldrb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "ldr q2, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v2.d[0]", - "umov w2, v2.h[4]", - "ldr x3, [x28, #1440]", - "blr x3", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "fmov s2, s0", - "str s2, [x4]", - "ldrb w12, [x28, #1298]", - "lsl w13, w21, w20", - "bic w12, w12, w13", - "strb w12, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "ldr w4, [x9, #8]", - "mov x27, x4", - "adds w26, w4, #0x4 (4)", - "mov x4, x26", - "ldr s2, [x9, w23, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", "lsl w23, w21, w20", - "orr w23, w12, w23", - "strb w23, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x24]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "orr w23, w23, w24", - "strb w23, [x28, #1298]", + "orr w22, w22, w23", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", @@ -117022,141 +114118,17 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w24, [x28, #1298]", - "lsl w12, w21, w20", - "bic w24, w24, w12", - "strb w24, [x28, #1298]", + "lsl w24, w21, w20", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", - "ldr s2, [x9, w22, sxtw]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "ldr s2, [x25]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "fmov s0, s2", - "ldrh w0, [x28, #1296]", - "ldr x1, [x28, #1424]", - "blr x1", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "sub w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "ldrb w22, [x28, #1298]", - "lsl w23, w21, w20", - "orr w22, w22, w23", - "strb w22, [x28, #1298]", - "strb w20, [x28, #1019]", - "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", - "ldr q2, [x0, #1040]", - "add x0, x28, x20, lsl #4", - "ldr q3, [x0, #1040]", - "mrs x0, nzcv", - "str w0, [x28, #1000]", - "stp x4, x5, [x28, #280]", - "stp x6, x7, [x28, #296]", - "str x8, [x28, #312]", - "sub sp, sp, #0x80 (128)", - "mov x0, sp", - "st1 {v2.2d, v3.2d}, [x0], #32", - "st1 {v4.2d, v5.2d, v6.2d, v7.2d}, [x0], #64", - "str x16, [x0], #16", - "stp x17, x30, [x0], #16", - "ldrh w0, [x28, #1296]", - "mov x1, v3.d[0]", - "umov w2, v3.h[4]", - "mov x3, v2.d[0]", - "umov w4, v2.h[4]", - "ldr x5, [x28, #1680]", - "blr x5", - "ldr w4, [x28, #1000]", - "msr nzcv, x4", - "ldp x4, x5, [x28, #280]", - "ldp x6, x7, [x28, #296]", - "ldr x8, [x28, #312]", - "ld1 {v2.2d, v3.2d}, [sp], #32", - "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", - "ldr x16, [sp], #16", - "ldp x17, x30, [sp], #16", - "eor v2.16b, v2.16b, v2.16b", - "mov v2.d[0], x0", - "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", - "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", - "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]", - "ldrb w20, [x28, #1019]", - "add w22, w20, #0x1 (1)", - "and w22, w22, #0x7", - "add x0, x28, x22, lsl #4", + "add w23, w20, #0x1 (1)", + "and w23, w23, #0x7", + "add x0, x28, x23, lsl #4", "ldr q2, [x0, #1040]", "add x0, x28, x20, lsl #4", "ldr q3, [x0, #1040]", @@ -117190,14 +114162,12 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "ldrb w23, [x28, #1298]", "lsl w24, w21, w20", - "bic w23, w23, w24", - "strb w23, [x28, #1298]", + "bic w22, w22, w24", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "add x0, x28, x22, lsl #4", + "add x0, x28, x23, lsl #4", "str q2, [x0, #1040]", "ldrb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", @@ -117229,10 +114199,8 @@ "ldp x17, x30, [sp], #16", "fmov s2, s0", "str s2, [x4]", - "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", @@ -117240,12 +114208,13 @@ "str w4, [x8]", "mov w20, #0x37f1", "movk w20, #0x1, lsl #16", - "mov w21, #0xda1c", - "movk w21, #0x816, lsl #16", - "add w21, w20, w21", + "mov w22, #0xda1c", + "movk w22, #0x816, lsl #16", + "add w22, w20, w22", "str w20, [x8, #-4]!", + "strb w21, [x28, #1298]", "ldr x0, [x28, #2336]", - "and x3, x21, #0xfffff", + "and x3, x22, #0xfffff", "add x0, x0, x3, lsl #4", "ldp x1, x0, [x0]" ] diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json index e7847ada5..9080a088d 100644 --- a/unittests/InstructionCountCI/FlagM/x87.json +++ b/unittests/InstructionCountCI/FlagM/x87.json @@ -311,10 +311,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub dword [rax]": { @@ -1832,10 +1832,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st1": { @@ -1893,10 +1893,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st2": { @@ -1954,10 +1954,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st3": { @@ -2015,10 +2015,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st4": { @@ -2076,10 +2076,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st5": { @@ -2137,10 +2137,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st6": { @@ -2198,10 +2198,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st7": { @@ -2259,10 +2259,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub st0, st0": { @@ -3810,10 +3810,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3894,10 +3894,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fldenv [rax]": { @@ -3952,8 +3952,8 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w21, w20, lsl #7", - "strb w20, [x28, #1298]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w20, [x28, #1298]" ] }, "fldcw [rax]": { @@ -4065,10 +4065,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st1": { @@ -4088,10 +4088,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st2": { @@ -4111,10 +4111,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st3": { @@ -4134,10 +4134,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st4": { @@ -4157,10 +4157,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st5": { @@ -4180,10 +4180,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st6": { @@ -4203,10 +4203,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st7": { @@ -4226,10 +4226,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxch st0, st0": { @@ -4530,11 +4530,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2t": { @@ -4550,11 +4550,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2e": { @@ -4570,11 +4570,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2704]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldpi": { @@ -4590,11 +4590,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2720]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldlg2": { @@ -4610,11 +4610,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2736]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldln2": { @@ -4630,11 +4630,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2752]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldz": { @@ -4650,11 +4650,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "f2xm1": { @@ -4709,13 +4709,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4747,8 +4746,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fptan": { @@ -4764,7 +4764,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -4797,12 +4796,13 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "ldr q3, [x28, #2672]", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]" + "str q3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fpatan": { @@ -4816,13 +4816,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4854,8 +4853,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxtract": { @@ -4871,7 +4871,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -4934,7 +4933,8 @@ "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fprem1": { @@ -5070,13 +5070,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "ldr q4, [x28, #2672]", "mrs x0, nzcv", @@ -5139,8 +5138,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsqrt": { @@ -5197,7 +5197,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -5257,12 +5256,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "frndint": { @@ -5737,10 +5737,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub dword [rax]": { @@ -6732,7 +6732,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 58, + "ExpectedInstructionCount": 57, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -6786,19 +6786,18 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 34, + "ExpectedInstructionCount": 35, "Comment": [ "0xdf !11b /5" ], @@ -6810,33 +6809,34 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldr w21, [x4]", - "mov w22, #0x0", - "sxtw x21, w21", - "mrs x23, nzcv", - "cmp x21, #0x0 (0)", - "mov w24, #0x8000", - "csel x24, x24, xzr, lt", - "cneg x21, x21, mi", - "mov w25, #0x3f", + "ldr w22, [x4]", + "mov w23, #0x0", + "sxtw x22, w22", + "mrs x24, nzcv", + "cmp x22, #0x0 (0)", + "mov w25, #0x8000", + "csel x25, x25, xzr, lt", + "cneg x22, x22, mi", + "mov w30, #0x3f", "mov x0, #0x3f", - "clz x30, x21", - "sub x30, x0, x30", - "sub x25, x25, x30", - "lsl x30, x21, x25", - "mov w18, #0x403e", - "sub x25, x18, x25", - "cmp x21, #0x0 (0)", - "csel x21, x22, x25, eq", - "orr x21, x24, x21", - "fmov d2, x30", - "fmov d3, x21", + "clz x18, x22", + "sub x18, x0, x18", + "sub x30, x30, x18", + "lsl x18, x22, x30", + "mov w23, #0x403e", + "sub x23, x23, x30", + "mov w30, #0x0", + "cmp x22, #0x0 (0)", + "csel x22, x30, x23, eq", + "orr x22, x25, x22", + "fmov d2, x18", + "fmov d3, x22", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x24", + "strb w21, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6879,10 +6879,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist dword [rax]": { @@ -6963,10 +6963,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fld tword [rax]": { @@ -6983,10 +6983,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -7005,10 +7005,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcmovnb st0, st0": { @@ -8845,10 +8845,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub qword [rax]": { @@ -11444,10 +11444,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11490,10 +11490,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fst qword [rax]": { @@ -11574,10 +11574,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "frstor [rax]": { @@ -11632,63 +11632,63 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w22, w20, lsl #7", - "strb w20, [x28, #1298]", - "mov x20, #0xffffffffffffffff", - "mov w22, #0xffff", - "fmov d2, x20", - "mov v2.d[1], x22", + "mov x22, #0xffffffffffffffff", + "mov w24, #0xffff", + "fmov d2, x22", + "mov v2.d[1], x24", "ldur q3, [x4, #28]", "and v3.16b, v3.16b, v2.16b", "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w21, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #38]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldr q3, [x4, #48]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #58]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #68]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #78]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #88]", "and v2.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur d2, [x4, #98]", "ldr h3, [x4, #106]", "mov v2.h[4], v3.h[0]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w20, [x28, #1298]" ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 111, + "ExpectedInstructionCount": 113, "Comment": [ "0xdd !11b /6" ], @@ -11697,8 +11697,10 @@ "ldrh w21, [x28, #1296]", "str w21, [x4]", "mov w21, #0x0", - "mov x22, x21", - "bfi x22, x20, #11, #3", + "ldrb w22, [x28, #1019]", + "mov x0, x21", + "bfi x0, x22, #11, #3", + "mov x22, x0", "ldrb w23, [x28, #1016]", "ldrb w24, [x28, #1017]", "ldrb w25, [x28, #1018]", @@ -11802,8 +11804,8 @@ "strb w21, [x28, #1017]", "strb w21, [x28, #1018]", "strb w21, [x28, #1022]", - "strb w21, [x28, #1298]", - "msr nzcv, x25" + "msr nzcv, x25", + "strb w21, [x28, #1298]" ] }, "fnstsw [rax]": { @@ -12115,7 +12117,7 @@ ] }, "fstp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd8 /3" ], @@ -12131,17 +12133,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd9 /3" ], @@ -12157,17 +12158,16 @@ "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st2": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xda /3" ], @@ -12183,17 +12183,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st3": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdb /3" ], @@ -12209,17 +12208,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st4": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdc /3" ], @@ -12235,17 +12233,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st5": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdd /3" ], @@ -12261,17 +12258,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st6": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xde /3" ], @@ -12287,17 +12283,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st7": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdf /3" ], @@ -12313,13 +12308,12 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucom st0": { @@ -12801,10 +12795,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st1": { @@ -12862,10 +12856,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st2": { @@ -12923,10 +12917,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st3": { @@ -12984,10 +12978,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st4": { @@ -13045,10 +13039,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st5": { @@ -13106,10 +13100,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st6": { @@ -13167,10 +13161,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st7": { @@ -13228,10 +13222,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fiadd word [rax]": { @@ -13532,10 +13526,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub word [rax]": { @@ -13869,12 +13863,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st1": { @@ -13924,12 +13918,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "faddp st2": { @@ -13979,12 +13973,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st3": { @@ -14034,12 +14028,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st4": { @@ -14089,12 +14083,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st5": { @@ -14144,12 +14138,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st6": { @@ -14199,12 +14193,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st7": { @@ -14254,12 +14248,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st0": { @@ -14309,12 +14303,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st1": { @@ -14364,12 +14358,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fmulp st2": { @@ -14419,12 +14413,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st3": { @@ -14474,12 +14468,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st4": { @@ -14529,12 +14523,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st5": { @@ -14584,12 +14578,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st6": { @@ -14639,12 +14633,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st7": { @@ -14694,16 +14688,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fcompp": { - "ExpectedInstructionCount": 58, + "ExpectedInstructionCount": 57, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -14757,15 +14751,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "db 0xde, 0xe0": { @@ -14817,12 +14810,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st1, st0": { @@ -14872,12 +14865,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubrp st2, st0": { @@ -14927,12 +14920,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st3, st0": { @@ -14982,12 +14975,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st4, st0": { @@ -15037,12 +15030,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st5, st0": { @@ -15092,12 +15085,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st6, st0": { @@ -15147,12 +15140,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st7, st0": { @@ -15202,12 +15195,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xe8": { @@ -15259,12 +15252,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st1, st0": { @@ -15314,12 +15307,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubp st2, st0": { @@ -15369,12 +15362,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st3, st0": { @@ -15424,12 +15417,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st4, st0": { @@ -15479,12 +15472,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st5, st0": { @@ -15534,12 +15527,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st6, st0": { @@ -15589,12 +15582,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st7, st0": { @@ -15644,12 +15637,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf0": { @@ -15701,12 +15694,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st1, st0": { @@ -15756,12 +15749,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivrp st2, st0": { @@ -15811,12 +15804,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st3, st0": { @@ -15866,12 +15859,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st4, st0": { @@ -15921,12 +15914,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st5, st0": { @@ -15976,12 +15969,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st6, st0": { @@ -16031,12 +16024,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st7, st0": { @@ -16086,12 +16079,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf8": { @@ -16143,12 +16136,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st1, st0": { @@ -16198,12 +16191,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivp st2, st0": { @@ -16253,12 +16246,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st3, st0": { @@ -16308,12 +16301,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st4, st0": { @@ -16363,12 +16356,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st5, st0": { @@ -16418,12 +16411,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st6, st0": { @@ -16473,12 +16466,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st7, st0": { @@ -16528,16 +16521,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 34, + "ExpectedInstructionCount": 35, "Comment": [ "0xdf !11b /0" ], @@ -16549,33 +16542,34 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldrh w21, [x4]", - "mov w22, #0x0", - "sxth x21, w21", - "mrs x23, nzcv", - "cmp x21, #0x0 (0)", - "mov w24, #0x8000", - "csel x24, x24, xzr, lt", - "cneg x21, x21, mi", - "mov w25, #0x3f", + "ldrh w22, [x4]", + "mov w23, #0x0", + "sxth x22, w22", + "mrs x24, nzcv", + "cmp x22, #0x0 (0)", + "mov w25, #0x8000", + "csel x25, x25, xzr, lt", + "cneg x22, x22, mi", + "mov w30, #0x3f", "mov x0, #0x3f", - "clz x30, x21", - "sub x30, x0, x30", - "sub x25, x25, x30", - "lsl x30, x21, x25", - "mov w18, #0x403e", - "sub x25, x18, x25", - "cmp x21, #0x0 (0)", - "csel x21, x22, x25, eq", - "orr x21, x24, x21", - "fmov d2, x30", - "fmov d3, x21", + "clz x18, x22", + "sub x18, x0, x18", + "sub x30, x30, x18", + "lsl x18, x22, x30", + "mov w23, #0x403e", + "sub x23, x23, x30", + "mov w30, #0x0", + "cmp x22, #0x0 (0)", + "csel x22, x30, x23, eq", + "orr x22, x25, x22", + "fmov d2, x18", + "fmov d3, x22", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x24", + "strb w21, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16618,10 +16612,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist word [rax]": { @@ -16702,10 +16696,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fbld tword [rax]": { @@ -16721,7 +16715,6 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", @@ -16753,7 +16746,8 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16800,10 +16794,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "ffreep st0": { @@ -16975,10 +16969,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st1": { @@ -17034,10 +17028,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st2": { @@ -17093,10 +17087,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st3": { @@ -17152,10 +17146,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st4": { @@ -17211,10 +17205,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st5": { @@ -17270,10 +17264,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st6": { @@ -17329,10 +17323,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st7": { @@ -17388,10 +17382,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st0": { @@ -17447,10 +17441,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st1": { @@ -17506,10 +17500,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st2": { @@ -17565,10 +17559,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st3": { @@ -17624,10 +17618,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st4": { @@ -17683,10 +17677,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st5": { @@ -17742,10 +17736,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st6": { @@ -17801,10 +17795,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st7": { @@ -17860,10 +17854,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json index 3a84afc12..9845cb9be 100644 --- a/unittests/InstructionCountCI/FlagM/x87_f64.json +++ b/unittests/InstructionCountCI/FlagM/x87_f64.json @@ -95,10 +95,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub dword [rax]": { @@ -680,10 +680,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st1": { @@ -713,10 +713,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st2": { @@ -746,10 +746,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st3": { @@ -779,10 +779,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st4": { @@ -812,10 +812,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st5": { @@ -845,10 +845,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st6": { @@ -878,10 +878,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st7": { @@ -911,10 +911,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub st0, st0": { @@ -1508,10 +1508,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1542,10 +1542,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fldenv [rax]": { @@ -1608,8 +1608,8 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w21, w20, lsl #7", - "strb w20, [x28, #1298]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w20, [x28, #1298]" ] }, "fldcw [rax]": { @@ -1729,10 +1729,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st1": { @@ -1752,10 +1752,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st2": { @@ -1775,10 +1775,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st3": { @@ -1798,10 +1798,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st4": { @@ -1821,10 +1821,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st5": { @@ -1844,10 +1844,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st6": { @@ -1867,10 +1867,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st7": { @@ -1890,10 +1890,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxch st0, st0": { @@ -2160,12 +2160,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x3ff0000000000000", - "fmov d2, x21", + "mov x22, #0x3ff0000000000000", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2t": { @@ -2181,15 +2181,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0xa372", - "movk x21, #0x979, lsl #16", - "movk x21, #0x934f, lsl #32", - "movk x21, #0x400a, lsl #48", - "fmov d2, x21", + "mov x22, #0xa372", + "movk x22, #0x979, lsl #16", + "movk x22, #0x934f, lsl #32", + "movk x22, #0x400a, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2e": { @@ -2205,15 +2205,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x82fe", - "movk x21, #0x652b, lsl #16", - "movk x21, #0x1547, lsl #32", - "movk x21, #0x3ff7, lsl #48", - "fmov d2, x21", + "mov x22, #0x82fe", + "movk x22, #0x652b, lsl #16", + "movk x22, #0x1547, lsl #32", + "movk x22, #0x3ff7, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldpi": { @@ -2229,15 +2229,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x2d18", - "movk x21, #0x5444, lsl #16", - "movk x21, #0x21fb, lsl #32", - "movk x21, #0x4009, lsl #48", - "fmov d2, x21", + "mov x22, #0x2d18", + "movk x22, #0x5444, lsl #16", + "movk x22, #0x21fb, lsl #32", + "movk x22, #0x4009, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldlg2": { @@ -2253,15 +2253,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x79ff", - "movk x21, #0x509f, lsl #16", - "movk x21, #0x4413, lsl #32", - "movk x21, #0x3fd3, lsl #48", - "fmov d2, x21", + "mov x22, #0x79ff", + "movk x22, #0x509f, lsl #16", + "movk x22, #0x4413, lsl #32", + "movk x22, #0x3fd3, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldln2": { @@ -2277,15 +2277,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x39ef", - "movk x21, #0xfefa, lsl #16", - "movk x21, #0x2e42, lsl #32", - "movk x21, #0x3fe6, lsl #48", - "fmov d2, x21", + "mov x22, #0x39ef", + "movk x22, #0xfefa, lsl #16", + "movk x22, #0x2e42, lsl #32", + "movk x22, #0x3fe6, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldz": { @@ -2301,12 +2301,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov w21, #0x0", - "fmov d2, x21", + "mov w22, #0x0", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "f2xm1": { @@ -2384,13 +2384,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v2.8b", "mov v1.8b, v3.8b", @@ -2444,8 +2443,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fptan": { @@ -2461,7 +2461,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", @@ -2516,14 +2515,15 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x21, #0x3ff0000000000000", - "fmov d3, x21", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov x23, #0x3ff0000000000000", + "fmov d3, x23", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]" + "str d3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fpatan": { @@ -2537,13 +2537,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2597,8 +2596,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxtract": { @@ -2614,22 +2614,22 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x21, v2.d[0]", - "and x23, x21, #0x7ff0000000000000", - "lsr x23, x23, #52", - "sub x23, x23, #0x3ff (1023)", - "scvtf d2, x23", - "and x21, x21, #0x800fffffffffffff", - "orr x21, x21, #0x3ff0000000000000", - "fmov d3, x21", + "mov x23, v2.d[0]", + "and x24, x23, #0x7ff0000000000000", + "lsr x24, x24, #52", + "sub x24, x24, #0x3ff (1023)", + "scvtf d2, x24", + "and x23, x23, #0x800fffffffffffff", + "orr x23, x23, #0x3ff0000000000000", + "fmov d3, x23", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]" + "str d3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fprem1": { @@ -2809,13 +2809,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov x20, #0x3ff0000000000000", "fmov d4, x20", @@ -2872,8 +2871,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsqrt": { @@ -2903,7 +2903,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", @@ -3009,12 +3008,13 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "frndint": { @@ -3312,10 +3312,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub dword [rax]": { @@ -4087,7 +4087,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 30, + "ExpectedInstructionCount": 29, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4113,15 +4113,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fild dword [rax]": { @@ -4137,12 +4136,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", + "ldr w22, [x4]", + "scvtf d2, w22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4160,10 +4159,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist dword [rax]": { @@ -4196,10 +4195,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fld tword [rax]": { @@ -4242,10 +4241,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4291,10 +4290,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcmovnb st0, st0": { @@ -5404,10 +5403,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub qword [rax]": { @@ -6360,10 +6359,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6381,10 +6380,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fst qword [rax]": { @@ -6413,10 +6412,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "frstor [rax]": { @@ -6481,11 +6480,10 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w22, w20, lsl #7", - "strb w20, [x28, #1298]", - "mov x20, #0xffffffffffffffff", - "mov w22, #0xffff", - "fmov d2, x20", - "mov v2.d[1], x22", + "mov x22, #0xffffffffffffffff", + "mov w24, #0xffff", + "fmov d2, x22", + "mov v2.d[1], x24", "ldur q3, [x4, #28]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6516,8 +6514,8 @@ "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w21, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #38]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6546,10 +6544,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldr q3, [x4, #48]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6578,10 +6576,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #58]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6610,10 +6608,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #68]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6642,10 +6640,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #78]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6674,10 +6672,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #88]", "and v2.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6706,10 +6704,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur d2, [x4, #98]", "ldr h3, [x4, #106]", "mov v2.h[4], v3.h[0]", @@ -6739,13 +6737,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w20, [x28, #1298]" ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 327, + "ExpectedInstructionCount": 329, "Comment": [ "0xdd !11b /6" ], @@ -6754,8 +6753,10 @@ "ldrh w21, [x28, #1296]", "str w21, [x4]", "mov w21, #0x0", - "mov x22, x21", - "bfi x22, x20, #11, #3", + "ldrb w22, [x28, #1019]", + "mov x0, x21", + "bfi x0, x22, #11, #3", + "mov x22, x0", "ldrb w23, [x28, #1016]", "ldrb w24, [x28, #1017]", "ldrb w25, [x28, #1018]", @@ -7075,8 +7076,8 @@ "strb w21, [x28, #1017]", "strb w21, [x28, #1018]", "strb w21, [x28, #1022]", - "strb w21, [x28, #1298]", - "msr nzcv, x25" + "msr nzcv, x25", + "strb w21, [x28, #1298]" ] }, "fnstsw [rax]": { @@ -7388,7 +7389,7 @@ ] }, "fstp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd8 /3" ], @@ -7404,17 +7405,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd9 /3" ], @@ -7430,17 +7430,16 @@ "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st2": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xda /3" ], @@ -7456,17 +7455,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st3": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdb /3" ], @@ -7482,17 +7480,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st4": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdc /3" ], @@ -7508,17 +7505,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st5": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdd /3" ], @@ -7534,17 +7530,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st6": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xde /3" ], @@ -7560,17 +7555,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st7": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdf /3" ], @@ -7586,13 +7580,12 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucom st0": { @@ -7822,10 +7815,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st1": { @@ -7855,10 +7848,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st2": { @@ -7888,10 +7881,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st3": { @@ -7921,10 +7914,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st4": { @@ -7954,10 +7947,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st5": { @@ -7987,10 +7980,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st6": { @@ -8020,10 +8013,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st7": { @@ -8053,10 +8046,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fiadd word [rax]": { @@ -8143,10 +8136,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub word [rax]": { @@ -8235,12 +8228,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st1": { @@ -8261,12 +8254,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "faddp st2": { @@ -8287,12 +8280,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st3": { @@ -8313,12 +8306,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st4": { @@ -8339,12 +8332,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st5": { @@ -8365,12 +8358,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st6": { @@ -8391,12 +8384,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st7": { @@ -8417,12 +8410,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st0": { @@ -8443,12 +8436,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st1": { @@ -8469,12 +8462,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fmulp st2": { @@ -8495,12 +8488,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st3": { @@ -8521,12 +8514,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st4": { @@ -8547,12 +8540,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st5": { @@ -8573,12 +8566,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st6": { @@ -8599,12 +8592,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st7": { @@ -8625,16 +8618,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fcompp": { - "ExpectedInstructionCount": 30, + "ExpectedInstructionCount": 29, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8660,15 +8653,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "db 0xde, 0xe0": { @@ -8691,12 +8683,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st1, st0": { @@ -8717,12 +8709,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubrp st2, st0": { @@ -8743,12 +8735,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st3, st0": { @@ -8769,12 +8761,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st4, st0": { @@ -8795,12 +8787,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st5, st0": { @@ -8821,12 +8813,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st6, st0": { @@ -8847,12 +8839,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st7, st0": { @@ -8873,12 +8865,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xe8": { @@ -8901,12 +8893,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st1, st0": { @@ -8927,12 +8919,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubp st2, st0": { @@ -8953,12 +8945,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st3, st0": { @@ -8979,12 +8971,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st4, st0": { @@ -9005,12 +8997,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st5, st0": { @@ -9031,12 +9023,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st6, st0": { @@ -9057,12 +9049,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st7, st0": { @@ -9083,12 +9075,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf0": { @@ -9111,12 +9103,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st1, st0": { @@ -9137,12 +9129,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivrp st2, st0": { @@ -9163,12 +9155,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st3, st0": { @@ -9189,12 +9181,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st4, st0": { @@ -9215,12 +9207,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st5, st0": { @@ -9241,12 +9233,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st6, st0": { @@ -9267,12 +9259,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st7, st0": { @@ -9293,12 +9285,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf8": { @@ -9321,12 +9313,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st1, st0": { @@ -9347,12 +9339,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivp st2, st0": { @@ -9373,12 +9365,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st3, st0": { @@ -9399,12 +9391,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st4, st0": { @@ -9425,12 +9417,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st5, st0": { @@ -9451,12 +9443,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st6, st0": { @@ -9477,12 +9469,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st7, st0": { @@ -9503,12 +9495,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fild word [rax]": { @@ -9524,13 +9516,13 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, x21", + "ldrh w22, [x4]", + "sxth x22, w22", + "scvtf d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9548,10 +9540,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist word [rax]": { @@ -9584,10 +9576,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fbld tword [rax]": { @@ -9603,7 +9595,6 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", @@ -9661,7 +9652,8 @@ "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9735,10 +9727,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "ffreep st0": { @@ -9878,10 +9870,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st1": { @@ -9905,10 +9897,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st2": { @@ -9932,10 +9924,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st3": { @@ -9959,10 +9951,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st4": { @@ -9986,10 +9978,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st5": { @@ -10013,10 +10005,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st6": { @@ -10040,10 +10032,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomip st7": { @@ -10067,10 +10059,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st0": { @@ -10094,10 +10086,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st1": { @@ -10121,10 +10113,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st2": { @@ -10148,10 +10140,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st3": { @@ -10175,10 +10167,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st4": { @@ -10202,10 +10194,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st5": { @@ -10229,10 +10221,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st6": { @@ -10256,10 +10248,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomip st7": { @@ -10283,10 +10275,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json index b3268eb92..40c1824e4 100644 --- a/unittests/InstructionCountCI/Primary.json +++ b/unittests/InstructionCountCI/Primary.json @@ -104,35 +104,39 @@ ] }, "add al, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "0x04", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmn w0, w20, lsl #24", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "add ax, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "0x05", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 1": { "ExpectedInstructionCount": 3, "Comment": "0x05", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -140,8 +144,8 @@ "ExpectedInstructionCount": 3, "Comment": "0x05", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -497,10 +501,9 @@ ] }, "adc al, 1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": "0x14", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -515,15 +518,17 @@ "bic w21, w22, w21", "ubfx x21, x21, #7, #1", "orr w20, w20, w21, lsl #28", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "adc ax, 1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": "0x15", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -538,8 +543,11 @@ "bic w21, w22, w21", "ubfx x21, x21, #15, #1", "orr w20, w20, w21, lsl #28", - "bfxil x4, x26, #0, #16", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #16", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "adc eax, 1": { @@ -547,8 +555,8 @@ "Comment": "0x15", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -557,8 +565,8 @@ "Comment": "0x15", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -687,8 +695,8 @@ "sbcs w26, w7, w5", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x7, x26" ] }, "sbb rbx, rcx": { @@ -702,8 +710,8 @@ "sbcs x26, x7, x5", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x7, x26" ] }, "db 0x1A, 0xcb": { @@ -774,8 +782,8 @@ "sbcs w26, w5, w7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x5, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x5, x26" ] }, "db 0x48, 0x1B, 0xcb": { @@ -792,15 +800,14 @@ "sbcs x26, x5, x7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x5, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x5, x26" ] }, "sbb al, 1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 20, "Comment": "0x1C", "ExpectedArm64ASM": [ - "mov x27, x4", "uxtb w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -816,15 +823,17 @@ "and w20, w20, w22", "ubfx x20, x20, #7, #1", "orr w20, w21, w20, lsl #28", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "sbb ax, 1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 20, "Comment": "0x1D", "ExpectedArm64ASM": [ - "mov x27, x4", "uxth w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -840,8 +849,11 @@ "and w20, w20, w22", "ubfx x20, x20, #15, #1", "orr w20, w21, w20, lsl #28", - "bfxil x4, x26, #0, #16", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #16", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "sbb eax, 1": { @@ -849,15 +861,15 @@ "Comment": "0x1D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sbb rax, 1": { @@ -865,15 +877,15 @@ "Comment": "0x1D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sbb al, -1": { @@ -936,8 +948,8 @@ "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "sbb rax, -1": { @@ -952,8 +964,8 @@ "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "and bl, cl": { @@ -1142,8 +1154,8 @@ "subs w26, w7, w5", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x7, x26" ] }, "sub rbx, rcx": { @@ -1154,8 +1166,8 @@ "subs x26, x7, x5", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x7, x26" ] }, "db 0x2A, 0xcb": { @@ -1203,8 +1215,8 @@ "subs w26, w5, w7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x5, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x5, x26" ] }, "db 0x48, 0x2B, 0xcb": { @@ -1218,62 +1230,66 @@ "subs x26, x5, x7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x5, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x5, x26" ] }, "sub al, 1": { - "ExpectedInstructionCount": 9, + "ExpectedInstructionCount": 11, "Comment": "0x2C", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "sub ax, 1": { - "ExpectedInstructionCount": 9, + "ExpectedInstructionCount": 11, "Comment": "0x2D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmp w0, w20, lsl #16", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "bfxil x4, x26, #0, #16", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #16", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "sub eax, 1": { "ExpectedInstructionCount": 6, "Comment": "0x2D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sub rax, 1": { "ExpectedInstructionCount": 6, "Comment": "0x2D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sub al, -1": { @@ -1315,8 +1331,8 @@ "subs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "sub rax, -1": { @@ -1327,8 +1343,8 @@ "adds x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "xor bl, cl": { @@ -1602,13 +1618,13 @@ "Comment": "0x3C", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp ax, 1": { @@ -1616,35 +1632,35 @@ "Comment": "0x3D", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmp w0, w20, lsl #16", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp eax, 1": { "ExpectedInstructionCount": 5, "Comment": "0x3D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp rax, 1": { "ExpectedInstructionCount": 5, "Comment": "0x3D", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp al, -1": { @@ -1915,14 +1931,13 @@ ] }, "xchg bl, cl": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 4, "Comment": "0x86", "ExpectedArm64ASM": [ "mov x20, x5", "bfxil x20, x7, #0, #8", - "mov x21, x5", - "mov x5, x20", - "bfxil x7, x21, #0, #8" + "bfxil x7, x5, #0, #8", + "mov x5, x20" ] }, "xchg [rax], cl": { @@ -1934,14 +1949,13 @@ ] }, "xchg bx, cx": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 4, "Comment": "0x87", "ExpectedArm64ASM": [ "mov x20, x5", "bfxil x20, x7, #0, #16", - "mov x21, x5", - "mov x5, x20", - "bfxil x7, x21, #0, #16" + "bfxil x7, x5, #0, #16", + "mov x5, x20" ] }, "xchg [rax], cx": { @@ -1953,13 +1967,12 @@ ] }, "xchg ebx, ecx": { - "ExpectedInstructionCount": 4, + "ExpectedInstructionCount": 3, "Comment": "0x87", "ExpectedArm64ASM": [ "mov w20, w7", - "mov x21, x5", - "mov x5, x20", - "mov w7, w21" + "mov w7, w5", + "mov x5, x20" ] }, "xchg [rax], ecx": { @@ -1973,9 +1986,9 @@ "ExpectedInstructionCount": 3, "Comment": "0x87", "ExpectedArm64ASM": [ - "mov x20, x5", - "mov x5, x7", - "mov x7, x20" + "mov x20, x7", + "mov x7, x5", + "mov x5, x20" ] }, "xchg [rax], rcx": { @@ -2438,24 +2451,22 @@ ] }, "xchg ax, bx": { - "ExpectedInstructionCount": 5, + "ExpectedInstructionCount": 4, "Comment": "0x90", "ExpectedArm64ASM": [ "mov x20, x7", "bfxil x20, x4, #0, #16", - "mov x21, x7", - "mov x7, x20", - "bfxil x4, x21, #0, #16" + "bfxil x4, x7, #0, #16", + "mov x7, x20" ] }, "xchg eax, ebx": { - "ExpectedInstructionCount": 4, + "ExpectedInstructionCount": 3, "Comment": "0x90", "ExpectedArm64ASM": [ "mov w20, w4", - "mov x21, x7", - "mov x7, x20", - "mov w4, w21" + "mov w4, w7", + "mov x7, x20" ] }, "xchg rax, rbx": { @@ -2637,26 +2648,26 @@ "strb w21, [x28, #985]", "ubfx w21, w27, #10, #1", "sub x21, x22, x21, lsl #1", - "strb w21, [x28, #986]", - "ubfx x21, x27, #11, #1", - "orr w20, w20, w21, lsl #28", - "ubfx w21, w27, #12, #1", - "strb w21, [x28, #988]", - "ubfx w21, w27, #14, #1", - "strb w21, [x28, #990]", - "ubfx w21, w27, #16, #1", - "strb w21, [x28, #992]", - "ubfx w21, w27, #17, #1", - "strb w21, [x28, #993]", - "ubfx w21, w27, #18, #1", - "strb w21, [x28, #994]", - "ubfx w21, w27, #19, #1", - "strb w21, [x28, #995]", - "ubfx w21, w27, #20, #1", - "strb w21, [x28, #996]", - "ubfx w21, w27, #21, #1", - "strb w21, [x28, #997]", - "msr nzcv, x20" + "ubfx x22, x27, #11, #1", + "orr w20, w20, w22, lsl #28", + "ubfx w22, w27, #12, #1", + "strb w22, [x28, #988]", + "ubfx w22, w27, #14, #1", + "strb w22, [x28, #990]", + "ubfx w22, w27, #16, #1", + "strb w22, [x28, #992]", + "ubfx w22, w27, #17, #1", + "strb w22, [x28, #993]", + "ubfx w22, w27, #18, #1", + "strb w22, [x28, #994]", + "ubfx w22, w27, #19, #1", + "strb w22, [x28, #995]", + "ubfx w22, w27, #20, #1", + "strb w22, [x28, #996]", + "ubfx w22, w27, #21, #1", + "strb w22, [x28, #997]", + "msr nzcv, x20", + "strb w21, [x28, #986]" ] }, "sahf": { @@ -3243,10 +3254,10 @@ ] }, "repz cmpsb": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 28, "Comment": "0xa6", "ExpectedArm64ASM": [ - "cbz x5, #+0x74", + "cbz x5, #+0x70", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3267,21 +3278,20 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #24", + "lsl w0, w27, #24", "cmp w0, w26, lsl #24", - "sub w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "sub w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repz cmpsw": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 28, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x74", + "cbz x5, #+0x70", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3302,21 +3312,20 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #16", + "lsl w0, w27, #16", "cmp w0, w26, lsl #16", - "sub w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "sub w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repz cmpsd": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3337,19 +3346,18 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "subs w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repz cmpsq": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3370,19 +3378,18 @@ "ccmp x27, x26, #nzcv, ne", "b.eq #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs x26, x21, x26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "subs x26, x27, x26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repnz cmpsb": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 28, "Comment": "0xa6", "ExpectedArm64ASM": [ - "cbz x5, #+0x74", + "cbz x5, #+0x70", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3403,21 +3410,20 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #24", + "lsl w0, w27, #24", "cmp w0, w26, lsl #24", - "sub w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "sub w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repnz cmpsw": { - "ExpectedInstructionCount": 29, + "ExpectedInstructionCount": 28, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x74", + "cbz x5, #+0x70", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3438,21 +3444,20 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "lsl w0, w21, #16", + "lsl w0, w27, #16", "cmp w0, w26, lsl #16", - "sub w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "sub w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repnz cmpsd": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3473,19 +3478,18 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs w26, w21, w26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "subs w26, w27, w26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "repnz cmpsq": { - "ExpectedInstructionCount": 27, + "ExpectedInstructionCount": 26, "Comment": "0xa7", "ExpectedArm64ASM": [ - "cbz x5, #+0x6c", + "cbz x5, #+0x68", "ldrsb x20, [x28, #986]", "lsr x20, x20, #63", "cbz x20, #+0x8", @@ -3506,12 +3510,11 @@ "ccmp x27, x26, #nZcv, ne", "b.ne #-0x18", "eor w20, w27, w26", - "mov x21, x27", - "mov x27, x20", - "subs x26, x21, x26", - "mrs x20, nzcv", - "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "subs x26, x27, x26", + "mrs x21, nzcv", + "eor w21, w21, #0x20000000", + "msr nzcv, x21", + "mov x27, x20" ] }, "test al, 1": { diff --git a/unittests/InstructionCountCI/PrimaryGroup.json b/unittests/InstructionCountCI/PrimaryGroup.json index 4b616cf7c..791c28b7d 100644 --- a/unittests/InstructionCountCI/PrimaryGroup.json +++ b/unittests/InstructionCountCI/PrimaryGroup.json @@ -16,15 +16,17 @@ ], "Instructions": { "add al, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x80 /0", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmn w0, w20, lsl #24", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #8" + "mov x20, x4", + "bfxil x20, x26, #0, #8", + "mov x27, x4", + "mov x4, x20" ] }, "or al, 1": { @@ -37,10 +39,9 @@ ] }, "adc al, 1": { - "ExpectedInstructionCount": 17, + "ExpectedInstructionCount": 19, "Comment": "GROUP1 0x80 /2", "ExpectedArm64ASM": [ - "mov x27, x4", "mov w20, #0x1", "adc w20, wzr, w20", "add w21, w4, w20", @@ -55,15 +56,17 @@ "bic w21, w22, w21", "ubfx x21, x21, #7, #1", "orr w20, w20, w21, lsl #28", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "sbb al, 1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 20, "Comment": "GROUP1 0x80 /3", "ExpectedArm64ASM": [ - "mov x27, x4", "uxtb w20, w4", "mov w21, #0x1", "adc w21, wzr, w21", @@ -79,8 +82,11 @@ "and w20, w20, w22", "ubfx x20, x20, #7, #1", "orr w20, w21, w20, lsl #28", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "and al, 1": { @@ -93,18 +99,20 @@ ] }, "sub al, 1": { - "ExpectedInstructionCount": 9, + "ExpectedInstructionCount": 11, "Comment": "GROUP1 0x80 /5", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "bfxil x4, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x4", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x21" ] }, "xor al, 1": { @@ -121,13 +129,13 @@ "Comment": "GROUP1 0x80 /7", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #24", "cmp w0, w20, lsl #24", "sub w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "add al, -1": { @@ -246,23 +254,25 @@ ] }, "add ax, 256": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x100 (256)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 256": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -270,8 +280,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -298,8 +308,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -308,8 +318,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -318,15 +328,15 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sbb rax, 256": { @@ -334,15 +344,15 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0x100", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "and eax, 256": { @@ -365,24 +375,24 @@ "ExpectedInstructionCount": 6, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sub rax, 256": { "ExpectedInstructionCount": 6, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "xor eax, 256": { @@ -407,34 +417,36 @@ "ExpectedInstructionCount": 5, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp rax, 256": { "ExpectedInstructionCount": 5, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "add ax, -256": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0xff00", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, w20", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, -256": { @@ -442,8 +454,8 @@ "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "adds w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -451,8 +463,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x81 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x100 (256)", + "mov x27, x4", "mov x4, x26" ] }, @@ -479,8 +491,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -489,8 +501,8 @@ "Comment": "GROUP1 0x81 /2", "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffff00", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -499,15 +511,15 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sbb rax, -256": { @@ -515,15 +527,15 @@ "Comment": "GROUP1 0x81 /3", "ExpectedArm64ASM": [ "mov x20, #0xffffffffffffff00", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "and eax, -256": { @@ -547,24 +559,24 @@ "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "subs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sub rax, -256": { "ExpectedInstructionCount": 6, "Comment": "GROUP1 0x81 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "xor eax, -256": { @@ -590,42 +602,44 @@ "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ "mov w20, #0xffffff00", - "mov x27, x4", "subs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp rax, -256": { "ExpectedInstructionCount": 5, "Comment": "GROUP1 0x81 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x100 (256)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "add ax, 1": { - "ExpectedInstructionCount": 6, + "ExpectedInstructionCount": 8, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "lsl w0, w4, #16", "cmn w0, w20, lsl #16", "add w26, w4, #0x1 (1)", - "bfxil x4, x26, #0, #16" + "mov x20, x4", + "bfxil x20, x26, #0, #16", + "mov x27, x4", + "mov x4, x20" ] }, "add eax, 1": { "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds w26, w4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -633,8 +647,8 @@ "ExpectedInstructionCount": 3, "Comment": "GROUP1 0x83 /0", "ExpectedArm64ASM": [ - "mov x27, x4", "adds x26, x4, #0x1 (1)", + "mov x27, x4", "mov x4, x26" ] }, @@ -661,8 +675,8 @@ "Comment": "GROUP1 0x83 /2", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs w26, w4, w20", + "mov x27, x4", "mov x4, x26" ] }, @@ -671,8 +685,8 @@ "Comment": "GROUP1 0x83 /2", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "adcs x26, x4, x20", + "mov x27, x4", "mov x4, x26" ] }, @@ -681,15 +695,15 @@ "Comment": "GROUP1 0x83 /3", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sbb rax, 1": { @@ -697,15 +711,15 @@ "Comment": "GROUP1 0x83 /3", "ExpectedArm64ASM": [ "mov w20, #0x1", - "mov x27, x4", "mrs x21, nzcv", "eor w21, w21, #0x20000000", "msr nzcv, x21", "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "and eax, 1": { @@ -728,24 +742,24 @@ "ExpectedInstructionCount": 6, "Comment": "GROUP1 0x83 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "sub rax, 1": { "ExpectedInstructionCount": 6, "Comment": "GROUP1 0x83 /5", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4", + "mov x4, x26" ] }, "xor eax, 1": { @@ -770,22 +784,22 @@ "ExpectedInstructionCount": 5, "Comment": "GROUP1 0x83 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "cmp rax, 1": { "ExpectedInstructionCount": 5, "Comment": "GROUP1 0x83 /7", "ExpectedArm64ASM": [ - "mov x27, x4", "subs x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x4" ] }, "add ax, -1": { @@ -871,8 +885,8 @@ "sbcs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "sbb rax, -1": { @@ -887,8 +901,8 @@ "sbcs x26, x4, x20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "and eax, -1": { @@ -918,8 +932,8 @@ "subs w26, w4, w20", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "sub rax, -1": { @@ -930,8 +944,8 @@ "adds x26, x4, #0x1 (1)", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x4, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x4, x26" ] }, "xor eax, -1": { @@ -1626,8 +1640,8 @@ "eor x21, x20, x4", "lsr x21, x21, #63", "bfi w22, w21, #28, #1", - "mov x4, x20", - "msr nzcv, x22" + "msr nzcv, x22", + "mov x4, x20" ] }, "rcr ax, 1": { @@ -2427,16 +2441,18 @@ ] }, "neg bl": { - "ExpectedInstructionCount": 7, + "ExpectedInstructionCount": 9, "Comment": "GROUP2 0xf6 /3", "ExpectedArm64ASM": [ - "mov x27, x7", "cmp wzr, w7, lsl #24", "neg w26, w7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "bfxil x7, x26, #0, #8", - "msr nzcv, x20" + "mov x21, x7", + "bfxil x21, x26, #0, #8", + "msr nzcv, x20", + "mov x27, x7", + "mov x7, x21" ] }, "mul bl": { @@ -2564,40 +2580,42 @@ ] }, "neg bx": { - "ExpectedInstructionCount": 7, + "ExpectedInstructionCount": 9, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "cmp wzr, w7, lsl #16", "neg w26, w7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "bfxil x7, x26, #0, #16", - "msr nzcv, x20" + "mov x21, x7", + "bfxil x21, x26, #0, #16", + "msr nzcv, x20", + "mov x27, x7", + "mov x7, x21" ] }, "neg ebx": { "ExpectedInstructionCount": 6, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "negs w26, w7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x7", + "mov x7, x26" ] }, "neg rbx": { "ExpectedInstructionCount": 6, "Comment": "GROUP2 0xf7 /2", "ExpectedArm64ASM": [ - "mov x27, x7", "negs x26, x7", "mrs x20, nzcv", "eor w20, w20, #0x20000000", - "mov x7, x26", - "msr nzcv, x20" + "msr nzcv, x20", + "mov x27, x7", + "mov x7, x26" ] }, "mul bx": { @@ -2633,9 +2651,9 @@ "ExpectedArm64ASM": [ "mul x20, x7, x4", "umulh x6, x7, x4", - "mov x4, x20", "cmp x6, #0x0 (0)", - "ccmn xzr, #0, #nzCV, eq" + "ccmn xzr, #0, #nzCV, eq", + "mov x4, x20" ] }, "imul bx": { @@ -2873,12 +2891,12 @@ "Comment": "GROUP4 0xfe /0", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds w26, w4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "inc rax": { @@ -2886,12 +2904,12 @@ "Comment": "GROUP4 0xfe /0", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds x26, x4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "dec ax": { @@ -2915,12 +2933,12 @@ "Comment": "GROUP4 0xfe /1", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "dec rax": { @@ -2928,12 +2946,12 @@ "Comment": "GROUP4 0xfe /1", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs x26, x4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "push ax": { diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json index bc6531b9c..0b9b669a1 100644 --- a/unittests/InstructionCountCI/Primary_32Bit.json +++ b/unittests/InstructionCountCI/Primary_32Bit.json @@ -204,12 +204,12 @@ "Comment": "0x40", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "adds w26, w4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "dec ax": { @@ -247,12 +247,12 @@ "Comment": "0x48", "ExpectedArm64ASM": [ "cset w20, hs", - "mov x27, x4", "subs w26, w4, #0x1 (1)", "mrs x21, nzcv", "bfi w21, w20, #29, #1", - "mov x4, x26", - "msr nzcv, x21" + "msr nzcv, x21", + "mov x27, x4", + "mov x4, x26" ] }, "pusha": { diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json index 8566b46ad..eae4d02bc 100644 --- a/unittests/InstructionCountCI/SecondaryGroup.json +++ b/unittests/InstructionCountCI/SecondaryGroup.json @@ -1464,23 +1464,14 @@ "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", "ldrb w20, [x4, #4]", - "strb w20, [x28, #1298]", "ldr q2, [x4, #32]", - "str q2, [x28, #1040]", - "ldr q2, [x4, #48]", - "str q2, [x28, #1056]", - "ldr q2, [x4, #64]", - "str q2, [x28, #1072]", - "ldr q2, [x4, #80]", - "str q2, [x28, #1088]", - "ldr q2, [x4, #96]", - "str q2, [x28, #1104]", - "ldr q2, [x4, #112]", - "str q2, [x28, #1120]", - "ldr q2, [x4, #128]", - "str q2, [x28, #1136]", - "ldr q2, [x4, #144]", - "str q2, [x28, #1152]", + "ldr q3, [x4, #48]", + "ldr q4, [x4, #64]", + "ldr q5, [x4, #80]", + "ldr q6, [x4, #96]", + "ldr q7, [x4, #112]", + "ldr q8, [x4, #128]", + "ldr q9, [x4, #144]", "ldr q16, [x4, #160]", "ldr q17, [x4, #176]", "ldr q18, [x4, #192]", @@ -1497,15 +1488,24 @@ "ldr q29, [x4, #368]", "ldr q30, [x4, #384]", "ldr q31, [x4, #400]", - "ldr w20, [x4, #24]", - "ubfx w20, w20, #13, #3", - "rbit w1, w20", + "ldr w21, [x4, #24]", + "ubfx w21, w21, #13, #3", + "rbit w1, w21", "lsr w1, w1, #30", "mrs x0, fpcr", "bfi x0, x1, #22, #2", - "lsr x1, x20, #2", + "lsr x1, x21, #2", "bfi x0, x1, #24, #1", - "msr fpcr, x0" + "msr fpcr, x0", + "strb w20, [x28, #1298]", + "str q9, [x28, #1152]", + "str q8, [x28, #1136]", + "str q7, [x28, #1120]", + "str q6, [x28, #1104]", + "str q5, [x28, #1088]", + "str q4, [x28, #1072]", + "str q3, [x28, #1056]", + "str q2, [x28, #1040]" ] }, "rdgsbase eax": { @@ -1697,9 +1697,10 @@ ] }, "xrstor [rax]": { - "ExpectedInstructionCount": 159, + "ExpectedInstructionCount": 165, "Comment": "GROUP15 0x0F 0xAE /5", "ExpectedArm64ASM": [ + "sub sp, sp, #0x40 (64)", "ldr x20, [x4, #512]", "ubfx x20, x20, #0, #1", "cbnz x20, #+0x8", @@ -1718,23 +1719,23 @@ "strb w23, [x28, #1018]", "strb w20, [x28, #1022]", "ldrb w20, [x4, #4]", - "strb w20, [x28, #1298]", "ldr q2, [x4, #32]", + "ldr q3, [x4, #48]", + "ldr q4, [x4, #64]", + "ldr q5, [x4, #80]", + "ldr q6, [x4, #96]", + "ldr q7, [x4, #112]", + "ldr q8, [x4, #128]", + "ldr q9, [x4, #144]", + "strb w20, [x28, #1298]", + "str q9, [x28, #1152]", + "str q8, [x28, #1136]", + "str q7, [x28, #1120]", + "str q6, [x28, #1104]", + "str q5, [x28, #1088]", + "str q4, [x28, #1072]", + "str q3, [x28, #1056]", "str q2, [x28, #1040]", - "ldr q2, [x4, #48]", - "str q2, [x28, #1056]", - "ldr q2, [x4, #64]", - "str q2, [x28, #1072]", - "ldr q2, [x4, #80]", - "str q2, [x28, #1088]", - "ldr q2, [x4, #96]", - "str q2, [x28, #1104]", - "ldr q2, [x4, #112]", - "str q2, [x28, #1120]", - "ldr q2, [x4, #128]", - "str q2, [x28, #1136]", - "ldr q2, [x4, #144]", - "str q2, [x28, #1152]", "b #+0x4c", "mov w20, #0x0", "mov w21, #0x37f", @@ -1744,16 +1745,16 @@ "strb w20, [x28, #1017]", "strb w20, [x28, #1018]", "strb w20, [x28, #1022]", - "strb w20, [x28, #1298]", "movi v2.2d, #0x0", - "str q2, [x28, #1040]", - "str q2, [x28, #1056]", - "str q2, [x28, #1072]", - "str q2, [x28, #1088]", - "str q2, [x28, #1104]", - "str q2, [x28, #1120]", - "str q2, [x28, #1136]", + "strb w20, [x28, #1298]", "str q2, [x28, #1152]", + "str q2, [x28, #1136]", + "str q2, [x28, #1120]", + "str q2, [x28, #1104]", + "str q2, [x28, #1088]", + "str q2, [x28, #1072]", + "str q2, [x28, #1056]", + "str q2, [x28, #1040]", "ldr x20, [x4, #512]", "ubfx x20, x20, #1, #1", "cbnz x20, #+0x8", @@ -1775,76 +1776,80 @@ "ldr q30, [x4, #384]", "ldr q31, [x4, #400]", "b #+0x44", - "movi v16.2d, #0x0", - "mov v17.16b, v16.16b", - "mov v18.16b, v16.16b", - "mov v19.16b, v16.16b", - "mov v20.16b, v16.16b", - "mov v21.16b, v16.16b", - "mov v22.16b, v16.16b", - "mov v23.16b, v16.16b", - "mov v24.16b, v16.16b", - "mov v25.16b, v16.16b", - "mov v26.16b, v16.16b", - "mov v27.16b, v16.16b", - "mov v28.16b, v16.16b", - "mov v29.16b, v16.16b", - "mov v30.16b, v16.16b", - "mov v31.16b, v16.16b", + "movi v31.2d, #0x0", + "mov v30.16b, v31.16b", + "mov v29.16b, v31.16b", + "mov v28.16b, v31.16b", + "mov v27.16b, v31.16b", + "mov v26.16b, v31.16b", + "mov v25.16b, v31.16b", + "mov v24.16b, v31.16b", + "mov v23.16b, v31.16b", + "mov v22.16b, v31.16b", + "mov v21.16b, v31.16b", + "mov v20.16b, v31.16b", + "mov v19.16b, v31.16b", + "mov v18.16b, v31.16b", + "mov v17.16b, v31.16b", + "mov v16.16b, v31.16b", "ldr x20, [x4, #512]", "ubfx x20, x20, #2, #1", "cbnz x20, #+0x8", - "b #+0x88", + "b #+0x98", "ldr q2, [x4, #576]", - "str q2, [x28, #16]", - "ldr q2, [x4, #592]", - "str q2, [x28, #32]", - "ldr q2, [x4, #608]", - "str q2, [x28, #48]", - "ldr q2, [x4, #624]", - "str q2, [x28, #64]", - "ldr q2, [x4, #640]", - "str q2, [x28, #80]", - "ldr q2, [x4, #656]", - "str q2, [x28, #96]", - "ldr q2, [x4, #672]", - "str q2, [x28, #112]", - "ldr q2, [x4, #688]", - "str q2, [x28, #128]", - "ldr q2, [x4, #704]", - "str q2, [x28, #144]", - "ldr q2, [x4, #720]", - "str q2, [x28, #160]", - "ldr q2, [x4, #736]", - "str q2, [x28, #176]", - "ldr q2, [x4, #752]", - "str q2, [x28, #192]", - "ldr q2, [x4, #768]", - "str q2, [x28, #208]", - "ldr q2, [x4, #784]", - "str q2, [x28, #224]", + "ldr q3, [x4, #592]", + "ldr q4, [x4, #608]", + "ldr q5, [x4, #624]", + "ldr q6, [x4, #640]", + "ldr q7, [x4, #656]", + "ldr q8, [x4, #672]", + "ldr q9, [x4, #688]", + "ldr q10, [x4, #704]", + "ldr q11, [x4, #720]", + "ldr q12, [x4, #736]", + "ldr q13, [x4, #752]", + "ldr q14, [x4, #768]", + "ldr q15, [x4, #784]", + "str q2, [sp]", "ldr q2, [x4, #800]", + "str q3, [sp, #32]", + "ldr q3, [x4, #816]", + "str q3, [x28, #256]", "str q2, [x28, #240]", - "ldr q2, [x4, #816]", - "str q2, [x28, #256]", + "str q15, [x28, #224]", + "str q14, [x28, #208]", + "str q13, [x28, #192]", + "str q12, [x28, #176]", + "str q11, [x28, #160]", + "str q10, [x28, #144]", + "str q9, [x28, #128]", + "str q8, [x28, #112]", + "str q7, [x28, #96]", + "str q6, [x28, #80]", + "str q5, [x28, #64]", + "str q4, [x28, #48]", + "ldr q2, [sp, #32]", + "str q2, [x28, #32]", + "ldr q2, [sp]", + "str q2, [x28, #16]", "b #+0x48", "movi v2.2d, #0x0", - "str q2, [x28, #16]", - "str q2, [x28, #32]", - "str q2, [x28, #48]", - "str q2, [x28, #64]", - "str q2, [x28, #80]", - "str q2, [x28, #96]", - "str q2, [x28, #112]", - "str q2, [x28, #128]", - "str q2, [x28, #144]", - "str q2, [x28, #160]", - "str q2, [x28, #176]", - "str q2, [x28, #192]", - "str q2, [x28, #208]", - "str q2, [x28, #224]", - "str q2, [x28, #240]", "str q2, [x28, #256]", + "str q2, [x28, #240]", + "str q2, [x28, #224]", + "str q2, [x28, #208]", + "str q2, [x28, #192]", + "str q2, [x28, #176]", + "str q2, [x28, #160]", + "str q2, [x28, #144]", + "str q2, [x28, #128]", + "str q2, [x28, #112]", + "str q2, [x28, #96]", + "str q2, [x28, #80]", + "str q2, [x28, #64]", + "str q2, [x28, #48]", + "str q2, [x28, #32]", + "str q2, [x28, #16]", "ldr x20, [x4, #512]", "ubfx x20, x20, #1, #2", "cbnz x20, #+0x8", @@ -1858,7 +1863,8 @@ "lsr x1, x20, #2", "bfi x0, x1, #24, #1", "msr fpcr, x0", - "b #+0x4" + "b #+0x4", + "add sp, sp, #0x40 (64)" ] }, "mfence": { diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json index f1daddeba..787d9faae 100644 --- a/unittests/InstructionCountCI/VEX_map2.json +++ b/unittests/InstructionCountCI/VEX_map2.json @@ -4899,9 +4899,9 @@ "Map 2 0b00 0xf2 32-bit" ], "ExpectedArm64ASM": [ - "bic w4, w5, w7", - "mov x26, x4", - "tst w4, w4" + "bic w26, w5, w7", + "tst w26, w26", + "mov x4, x26" ] }, "andn rax, rbx, rcx": { @@ -4910,9 +4910,9 @@ "Map 2 0b00 0xf2 64-bit" ], "ExpectedArm64ASM": [ - "bic x4, x5, x7", - "mov x26, x4", - "tst x4, x4" + "bic x26, x5, x7", + "tst x26, x26", + "mov x4, x26" ] }, "bzhi eax, ebx, ecx": { diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json index 87f7f36ea..47981e80e 100644 --- a/unittests/InstructionCountCI/x87.json +++ b/unittests/InstructionCountCI/x87.json @@ -310,10 +310,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub dword [rax]": { @@ -1831,10 +1831,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st1": { @@ -1892,10 +1892,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st2": { @@ -1953,10 +1953,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st3": { @@ -2014,10 +2014,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st4": { @@ -2075,10 +2075,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st5": { @@ -2136,10 +2136,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st6": { @@ -2197,10 +2197,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st7": { @@ -2258,10 +2258,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub st0, st0": { @@ -3809,10 +3809,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fst dword [rax]": { @@ -3893,10 +3893,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fldenv [rax]": { @@ -3951,8 +3951,8 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w21, w20, lsl #7", - "strb w20, [x28, #1298]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w20, [x28, #1298]" ] }, "fldcw [rax]": { @@ -4064,10 +4064,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st1": { @@ -4087,10 +4087,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st2": { @@ -4110,10 +4110,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st3": { @@ -4133,10 +4133,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st4": { @@ -4156,10 +4156,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st5": { @@ -4179,10 +4179,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st6": { @@ -4202,10 +4202,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st7": { @@ -4225,10 +4225,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxch st0, st0": { @@ -4529,11 +4529,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2672]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2t": { @@ -4549,11 +4549,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2688]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2e": { @@ -4569,11 +4569,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2704]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldpi": { @@ -4589,11 +4589,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2720]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldlg2": { @@ -4609,11 +4609,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2736]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldln2": { @@ -4629,11 +4629,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x28, #2752]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldz": { @@ -4649,11 +4649,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "movi v2.2d, #0x0", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "f2xm1": { @@ -4708,13 +4708,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4746,8 +4745,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fptan": { @@ -4763,7 +4763,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -4796,12 +4795,13 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "ldr q3, [x28, #2672]", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q3, [x0, #1040]" + "str q3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fpatan": { @@ -4815,13 +4815,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "mrs x0, nzcv", "str w0, [x28, #1000]", @@ -4853,8 +4852,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxtract": { @@ -4870,7 +4870,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -4933,7 +4932,8 @@ "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fprem1": { @@ -5069,13 +5069,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr q3, [x0, #1040]", "ldr q4, [x28, #2672]", "mrs x0, nzcv", @@ -5138,8 +5137,9 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsqrt": { @@ -5196,7 +5196,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr q2, [x0, #1040]", @@ -5256,12 +5255,13 @@ "eor v2.16b, v2.16b, v2.16b", "mov v2.d[0], x0", "mov v2.h[4], w1", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str q3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "frndint": { @@ -5736,10 +5736,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub dword [rax]": { @@ -6731,7 +6731,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 58, + "ExpectedInstructionCount": 57, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -6785,19 +6785,18 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fild dword [rax]": { - "ExpectedInstructionCount": 34, + "ExpectedInstructionCount": 35, "Comment": [ "0xdf !11b /5" ], @@ -6809,33 +6808,34 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldr w21, [x4]", - "mov w22, #0x0", - "sxtw x21, w21", - "mrs x23, nzcv", - "cmp x21, #0x0 (0)", - "mov w24, #0x8000", - "csel x24, x24, xzr, lt", - "cneg x21, x21, mi", - "mov w25, #0x3f", + "ldr w22, [x4]", + "mov w23, #0x0", + "sxtw x22, w22", + "mrs x24, nzcv", + "cmp x22, #0x0 (0)", + "mov w25, #0x8000", + "csel x25, x25, xzr, lt", + "cneg x22, x22, mi", + "mov w30, #0x3f", "mov x0, #0x3f", - "clz x30, x21", - "sub x30, x0, x30", - "sub x25, x25, x30", - "lsl x30, x21, x25", - "mov w18, #0x403e", - "sub x25, x18, x25", - "cmp x21, #0x0 (0)", - "csel x21, x22, x25, eq", - "orr x21, x24, x21", - "fmov d2, x30", - "fmov d3, x21", + "clz x18, x22", + "sub x18, x0, x18", + "sub x30, x30, x18", + "lsl x18, x22, x30", + "mov w23, #0x403e", + "sub x23, x23, x30", + "mov w30, #0x0", + "cmp x22, #0x0 (0)", + "csel x22, x30, x23, eq", + "orr x22, x25, x22", + "fmov d2, x18", + "fmov d3, x22", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x24", + "strb w21, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -6878,10 +6878,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist dword [rax]": { @@ -6962,10 +6962,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fld tword [rax]": { @@ -6982,10 +6982,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -7004,10 +7004,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcmovnb st0, st0": { @@ -8860,10 +8860,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub qword [rax]": { @@ -11459,10 +11459,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -11505,10 +11505,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fst qword [rax]": { @@ -11589,10 +11589,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "frstor [rax]": { @@ -11647,63 +11647,63 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w22, w20, lsl #7", - "strb w20, [x28, #1298]", - "mov x20, #0xffffffffffffffff", - "mov w22, #0xffff", - "fmov d2, x20", - "mov v2.d[1], x22", + "mov x22, #0xffffffffffffffff", + "mov w24, #0xffff", + "fmov d2, x22", + "mov v2.d[1], x24", "ldur q3, [x4, #28]", "and v3.16b, v3.16b, v2.16b", "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w21, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #38]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldr q3, [x4, #48]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #58]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #68]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #78]", "and v3.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #88]", "and v2.16b, v3.16b, v2.16b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur d2, [x4, #98]", "ldr h3, [x4, #106]", "mov v2.h[4], v3.h[0]", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w20, [x28, #1298]" ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 111, + "ExpectedInstructionCount": 113, "Comment": [ "0xdd !11b /6" ], @@ -11712,8 +11712,10 @@ "ldrh w21, [x28, #1296]", "str w21, [x4]", "mov w21, #0x0", - "mov x22, x21", - "bfi x22, x20, #11, #3", + "ldrb w22, [x28, #1019]", + "mov x0, x21", + "bfi x0, x22, #11, #3", + "mov x22, x0", "ldrb w23, [x28, #1016]", "ldrb w24, [x28, #1017]", "ldrb w25, [x28, #1018]", @@ -11817,8 +11819,8 @@ "strb w21, [x28, #1017]", "strb w21, [x28, #1018]", "strb w21, [x28, #1022]", - "strb w21, [x28, #1298]", - "msr nzcv, x25" + "msr nzcv, x25", + "strb w21, [x28, #1298]" ] }, "fnstsw [rax]": { @@ -12130,7 +12132,7 @@ ] }, "fstp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd8 /3" ], @@ -12146,17 +12148,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd9 /3" ], @@ -12172,17 +12173,16 @@ "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st2": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xda /3" ], @@ -12198,17 +12198,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st3": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdb /3" ], @@ -12224,17 +12223,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st4": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdc /3" ], @@ -12250,17 +12248,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st5": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdd /3" ], @@ -12276,17 +12273,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st6": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xde /3" ], @@ -12302,17 +12298,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st7": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdf /3" ], @@ -12328,13 +12323,12 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucom st0": { @@ -12816,10 +12810,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st1": { @@ -12877,10 +12871,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st2": { @@ -12938,10 +12932,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st3": { @@ -12999,10 +12993,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st4": { @@ -13060,10 +13054,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st5": { @@ -13121,10 +13115,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st6": { @@ -13182,10 +13176,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st7": { @@ -13243,10 +13237,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fiadd word [rax]": { @@ -13547,10 +13541,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub word [rax]": { @@ -13884,12 +13878,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st1": { @@ -13939,12 +13933,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "faddp st2": { @@ -13994,12 +13988,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st3": { @@ -14049,12 +14043,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st4": { @@ -14104,12 +14098,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st5": { @@ -14159,12 +14153,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st6": { @@ -14214,12 +14208,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st7": { @@ -14269,12 +14263,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st0": { @@ -14324,12 +14318,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st1": { @@ -14379,12 +14373,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fmulp st2": { @@ -14434,12 +14428,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st3": { @@ -14489,12 +14483,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st4": { @@ -14544,12 +14538,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st5": { @@ -14599,12 +14593,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st6": { @@ -14654,12 +14648,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st7": { @@ -14709,16 +14703,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fcompp": { - "ExpectedInstructionCount": 58, + "ExpectedInstructionCount": 57, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -14772,15 +14766,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "db 0xde, 0xe0": { @@ -14832,12 +14825,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st1, st0": { @@ -14887,12 +14880,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubrp st2, st0": { @@ -14942,12 +14935,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st3, st0": { @@ -14997,12 +14990,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st4, st0": { @@ -15052,12 +15045,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st5, st0": { @@ -15107,12 +15100,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st6, st0": { @@ -15162,12 +15155,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st7, st0": { @@ -15217,12 +15210,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xe8": { @@ -15274,12 +15267,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st1, st0": { @@ -15329,12 +15322,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubp st2, st0": { @@ -15384,12 +15377,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st3, st0": { @@ -15439,12 +15432,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st4, st0": { @@ -15494,12 +15487,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st5, st0": { @@ -15549,12 +15542,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st6, st0": { @@ -15604,12 +15597,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st7, st0": { @@ -15659,12 +15652,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf0": { @@ -15716,12 +15709,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st1, st0": { @@ -15771,12 +15764,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivrp st2, st0": { @@ -15826,12 +15819,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st3, st0": { @@ -15881,12 +15874,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st4, st0": { @@ -15936,12 +15929,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st5, st0": { @@ -15991,12 +15984,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st6, st0": { @@ -16046,12 +16039,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st7, st0": { @@ -16101,12 +16094,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf8": { @@ -16158,12 +16151,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st1, st0": { @@ -16213,12 +16206,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivp st2, st0": { @@ -16268,12 +16261,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st3, st0": { @@ -16323,12 +16316,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st4, st0": { @@ -16378,12 +16371,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st5, st0": { @@ -16433,12 +16426,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st6, st0": { @@ -16488,12 +16481,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st7, st0": { @@ -16543,16 +16536,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fild word [rax]": { - "ExpectedInstructionCount": 34, + "ExpectedInstructionCount": 35, "Comment": [ "0xdf !11b /0" ], @@ -16564,33 +16557,34 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldrh w21, [x4]", - "mov w22, #0x0", - "sxth x21, w21", - "mrs x23, nzcv", - "cmp x21, #0x0 (0)", - "mov w24, #0x8000", - "csel x24, x24, xzr, lt", - "cneg x21, x21, mi", - "mov w25, #0x3f", + "ldrh w22, [x4]", + "mov w23, #0x0", + "sxth x22, w22", + "mrs x24, nzcv", + "cmp x22, #0x0 (0)", + "mov w25, #0x8000", + "csel x25, x25, xzr, lt", + "cneg x22, x22, mi", + "mov w30, #0x3f", "mov x0, #0x3f", - "clz x30, x21", - "sub x30, x0, x30", - "sub x25, x25, x30", - "lsl x30, x21, x25", - "mov w18, #0x403e", - "sub x25, x18, x25", - "cmp x21, #0x0 (0)", - "csel x21, x22, x25, eq", - "orr x21, x24, x21", - "fmov d2, x30", - "fmov d3, x21", + "clz x18, x22", + "sub x18, x0, x18", + "sub x30, x30, x18", + "lsl x18, x22, x30", + "mov w23, #0x403e", + "sub x23, x23, x30", + "mov w30, #0x0", + "cmp x22, #0x0 (0)", + "csel x22, x30, x23, eq", + "orr x22, x25, x22", + "fmov d2, x18", + "fmov d3, x22", "mov v2.d[1], v3.d[0]", "add x0, x28, x20, lsl #4", "str q2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x24", + "strb w21, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -16633,10 +16627,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist word [rax]": { @@ -16717,10 +16711,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fbld tword [rax]": { @@ -16736,7 +16730,6 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", @@ -16768,7 +16761,8 @@ "mov v2.d[0], x0", "mov v2.h[4], w1", "add x0, x28, x20, lsl #4", - "str q2, [x0, #1040]" + "str q2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -16815,10 +16809,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "ffreep st0": { @@ -16990,11 +16984,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st1": { @@ -17050,11 +17044,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w21, [x28, #1298]" ] }, "fucomip st2": { @@ -17110,11 +17104,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st3": { @@ -17170,11 +17164,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st4": { @@ -17230,11 +17224,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st5": { @@ -17290,11 +17284,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st6": { @@ -17350,11 +17344,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st7": { @@ -17410,11 +17404,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st0": { @@ -17470,11 +17464,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st1": { @@ -17530,11 +17524,11 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w21, [x28, #1298]" ] }, "fcomip st2": { @@ -17590,11 +17584,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st3": { @@ -17650,11 +17644,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st4": { @@ -17710,11 +17704,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st5": { @@ -17770,11 +17764,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st6": { @@ -17830,11 +17824,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st7": { @@ -17890,11 +17884,11 @@ "ldrb w21, [x28, #1298]", "lsl w23, w23, w20", "bic w21, w21, w23", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] } } diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json index e8de0d876..222e98327 100644 --- a/unittests/InstructionCountCI/x87_f64.json +++ b/unittests/InstructionCountCI/x87_f64.json @@ -96,10 +96,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub dword [rax]": { @@ -690,10 +690,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st1": { @@ -724,10 +724,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st2": { @@ -758,10 +758,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st3": { @@ -792,10 +792,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st4": { @@ -826,10 +826,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st5": { @@ -860,10 +860,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st6": { @@ -894,10 +894,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcomp st0, st7": { @@ -928,10 +928,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub st0, st0": { @@ -1525,10 +1525,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fst dword [rax]": { @@ -1559,10 +1559,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fldenv [rax]": { @@ -1625,8 +1625,8 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w21, w20, lsl #7", - "strb w20, [x28, #1298]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w20, [x28, #1298]" ] }, "fldcw [rax]": { @@ -1746,10 +1746,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st1": { @@ -1769,10 +1769,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st2": { @@ -1792,10 +1792,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st3": { @@ -1815,10 +1815,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st4": { @@ -1838,10 +1838,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st5": { @@ -1861,10 +1861,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st6": { @@ -1884,10 +1884,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fld st7": { @@ -1907,10 +1907,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxch st0, st0": { @@ -2178,12 +2178,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x3ff0000000000000", - "fmov d2, x21", + "mov x22, #0x3ff0000000000000", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2t": { @@ -2199,15 +2199,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0xa372", - "movk x21, #0x979, lsl #16", - "movk x21, #0x934f, lsl #32", - "movk x21, #0x400a, lsl #48", - "fmov d2, x21", + "mov x22, #0xa372", + "movk x22, #0x979, lsl #16", + "movk x22, #0x934f, lsl #32", + "movk x22, #0x400a, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldl2e": { @@ -2223,15 +2223,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x82fe", - "movk x21, #0x652b, lsl #16", - "movk x21, #0x1547, lsl #32", - "movk x21, #0x3ff7, lsl #48", - "fmov d2, x21", + "mov x22, #0x82fe", + "movk x22, #0x652b, lsl #16", + "movk x22, #0x1547, lsl #32", + "movk x22, #0x3ff7, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldpi": { @@ -2247,15 +2247,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x2d18", - "movk x21, #0x5444, lsl #16", - "movk x21, #0x21fb, lsl #32", - "movk x21, #0x4009, lsl #48", - "fmov d2, x21", + "mov x22, #0x2d18", + "movk x22, #0x5444, lsl #16", + "movk x22, #0x21fb, lsl #32", + "movk x22, #0x4009, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldlg2": { @@ -2271,15 +2271,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x79ff", - "movk x21, #0x509f, lsl #16", - "movk x21, #0x4413, lsl #32", - "movk x21, #0x3fd3, lsl #48", - "fmov d2, x21", + "mov x22, #0x79ff", + "movk x22, #0x509f, lsl #16", + "movk x22, #0x4413, lsl #32", + "movk x22, #0x3fd3, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldln2": { @@ -2295,15 +2295,15 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov x21, #0x39ef", - "movk x21, #0xfefa, lsl #16", - "movk x21, #0x2e42, lsl #32", - "movk x21, #0x3fe6, lsl #48", - "fmov d2, x21", + "mov x22, #0x39ef", + "movk x22, #0xfefa, lsl #16", + "movk x22, #0x2e42, lsl #32", + "movk x22, #0x3fe6, lsl #48", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fldz": { @@ -2319,12 +2319,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "mov w21, #0x0", - "fmov d2, x21", + "mov w22, #0x0", + "fmov d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "f2xm1": { @@ -2402,13 +2402,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v2.8b", "mov v1.8b, v3.8b", @@ -2462,8 +2461,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fptan": { @@ -2479,7 +2479,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", @@ -2534,14 +2533,15 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov x21, #0x3ff0000000000000", - "fmov d3, x21", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov x23, #0x3ff0000000000000", + "fmov d3, x23", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]" + "str d3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fpatan": { @@ -2555,13 +2555,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov v0.8b, v3.8b", "mov v1.8b, v2.8b", @@ -2615,8 +2614,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fxtract": { @@ -2632,22 +2632,22 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "mov x21, v2.d[0]", - "and x23, x21, #0x7ff0000000000000", - "lsr x23, x23, #52", - "sub x23, x23, #0x3ff (1023)", - "scvtf d2, x23", - "and x21, x21, #0x800fffffffffffff", - "orr x21, x21, #0x3ff0000000000000", - "fmov d3, x21", + "mov x23, v2.d[0]", + "and x24, x23, #0x7ff0000000000000", + "lsr x24, x24, #52", + "sub x24, x24, #0x3ff (1023)", + "scvtf d2, x24", + "and x23, x23, #0x800fffffffffffff", + "orr x23, x23, #0x3ff0000000000000", + "fmov d3, x23", "add x0, x28, x20, lsl #4", "str d2, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d3, [x0, #1040]" + "str d3, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fprem1": { @@ -2827,13 +2827,12 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", - "add w21, w20, #0x1 (1)", - "and w21, w21, #0x7", - "strb w21, [x28, #1019]", + "add w22, w20, #0x1 (1)", + "and w22, w22, #0x7", + "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", - "add x0, x28, x21, lsl #4", + "add x0, x28, x22, lsl #4", "ldr d3, [x0, #1040]", "mov x20, #0x3ff0000000000000", "fmov d4, x20", @@ -2890,8 +2889,9 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "add x0, x28, x22, lsl #4", + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsqrt": { @@ -2921,7 +2921,6 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w22", "orr w21, w23, w21", - "strb w21, [x28, #1298]", "strb w22, [x28, #1019]", "add x0, x28, x20, lsl #4", "ldr d2, [x0, #1040]", @@ -3027,12 +3026,13 @@ "ldr x26, [x28, #1024]", "ldr x27, [x28, #1032]", "mov v2.8b, v0.8b", - "mov w21, #0x0", - "strb w21, [x28, #1018]", + "mov w23, #0x0", + "strb w23, [x28, #1018]", "add x0, x28, x20, lsl #4", "str d3, [x0, #1040]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "frndint": { @@ -3332,10 +3332,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub dword [rax]": { @@ -4107,7 +4107,7 @@ ] }, "fucompp": { - "ExpectedInstructionCount": 31, + "ExpectedInstructionCount": 30, "Comment": [ "0xda 11b 0xe9 /5" ], @@ -4134,15 +4134,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fild dword [rax]": { @@ -4158,12 +4157,12 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldr w21, [x4]", - "scvtf d2, w21", + "ldr w22, [x4]", + "scvtf d2, w22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp dword [rax]": { @@ -4181,10 +4180,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist dword [rax]": { @@ -4217,10 +4216,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fld tword [rax]": { @@ -4263,10 +4262,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fstp tword [rax]": { @@ -4312,10 +4311,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fcmovnb st0, st0": { @@ -5523,10 +5522,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fsub qword [rax]": { @@ -6479,10 +6478,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp qword [rax]": { @@ -6500,10 +6499,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fst qword [rax]": { @@ -6532,10 +6531,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "frstor [rax]": { @@ -6600,11 +6599,10 @@ "cmp x20, #0x3 (3)", "cset x20, ne", "orr w20, w22, w20, lsl #7", - "strb w20, [x28, #1298]", - "mov x20, #0xffffffffffffffff", - "mov w22, #0xffff", - "fmov d2, x20", - "mov v2.d[1], x22", + "mov x22, #0xffffffffffffffff", + "mov w24, #0xffff", + "fmov d2, x22", + "mov v2.d[1], x24", "ldur q3, [x4, #28]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6635,8 +6633,8 @@ "mov v3.8b, v0.8b", "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w21, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #38]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6665,10 +6663,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldr q3, [x4, #48]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6697,10 +6695,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #58]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6729,10 +6727,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #68]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6761,10 +6759,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #78]", "and v3.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6793,10 +6791,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v3.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d3, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur q3, [x4, #88]", "and v2.16b, v3.16b, v2.16b", "mrs x0, nzcv", @@ -6825,10 +6823,10 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "add w20, w20, #0x1 (1)", - "and w20, w20, #0x7", + "add w21, w21, #0x1 (1)", + "and w21, w21, #0x7", "ldur d2, [x4, #98]", "ldr h3, [x4, #106]", "mov v2.h[4], v3.h[0]", @@ -6858,13 +6856,14 @@ "ld1 {v4.2d, v5.2d, v6.2d, v7.2d}, [sp], #64", "ldr x30, [sp], #16", "mov v2.8b, v0.8b", - "add x0, x28, x20, lsl #4", + "add x0, x28, x21, lsl #4", "str d2, [x0, #1040]", - "msr nzcv, x23" + "msr nzcv, x23", + "strb w20, [x28, #1298]" ] }, "fnsave [rax]": { - "ExpectedInstructionCount": 327, + "ExpectedInstructionCount": 329, "Comment": [ "0xdd !11b /6" ], @@ -6873,8 +6872,10 @@ "ldrh w21, [x28, #1296]", "str w21, [x4]", "mov w21, #0x0", - "mov x22, x21", - "bfi x22, x20, #11, #3", + "ldrb w22, [x28, #1019]", + "mov x0, x21", + "bfi x0, x22, #11, #3", + "mov x22, x0", "ldrb w23, [x28, #1016]", "ldrb w24, [x28, #1017]", "ldrb w25, [x28, #1018]", @@ -7194,8 +7195,8 @@ "strb w21, [x28, #1017]", "strb w21, [x28, #1018]", "strb w21, [x28, #1022]", - "strb w21, [x28, #1298]", - "msr nzcv, x25" + "msr nzcv, x25", + "strb w21, [x28, #1298]" ] }, "fnstsw [rax]": { @@ -7507,7 +7508,7 @@ ] }, "fstp st0": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd8 /3" ], @@ -7523,17 +7524,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st1": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xd9 /3" ], @@ -7549,17 +7549,16 @@ "ldrb w23, [x28, #1298]", "lsl w22, w21, w22", "orr w22, w23, w22", - "strb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st2": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xda /3" ], @@ -7575,17 +7574,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st3": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdb /3" ], @@ -7601,17 +7599,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st4": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdc /3" ], @@ -7627,17 +7624,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st5": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdd /3" ], @@ -7653,17 +7649,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st6": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xde /3" ], @@ -7679,17 +7674,16 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fstp st7": { - "ExpectedInstructionCount": 18, + "ExpectedInstructionCount": 17, "Comment": [ "0xdd 11b 0xdf /3" ], @@ -7705,13 +7699,12 @@ "mov w23, #0x1", "lsl w21, w23, w21", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "lsl w22, w23, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucom st0": { @@ -7950,10 +7943,10 @@ "ldrb w21, [x28, #1298]", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st1": { @@ -7984,10 +7977,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st2": { @@ -8018,10 +8011,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st3": { @@ -8052,10 +8045,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st4": { @@ -8086,10 +8079,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st5": { @@ -8120,10 +8113,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st6": { @@ -8154,10 +8147,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fucomp st7": { @@ -8188,10 +8181,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fiadd word [rax]": { @@ -8280,10 +8273,10 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fisub word [rax]": { @@ -8372,12 +8365,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st1": { @@ -8398,12 +8391,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "faddp st2": { @@ -8424,12 +8417,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st3": { @@ -8450,12 +8443,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st4": { @@ -8476,12 +8469,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st5": { @@ -8502,12 +8495,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st6": { @@ -8528,12 +8521,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "faddp st7": { @@ -8554,12 +8547,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st0": { @@ -8580,12 +8573,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st1": { @@ -8606,12 +8599,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fmulp st2": { @@ -8632,12 +8625,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st3": { @@ -8658,12 +8651,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st4": { @@ -8684,12 +8677,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st5": { @@ -8710,12 +8703,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st6": { @@ -8736,12 +8729,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fmulp st7": { @@ -8762,16 +8755,16 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fcompp": { - "ExpectedInstructionCount": 31, + "ExpectedInstructionCount": 30, "Comment": [ "0xde 11b 0xd9 /3" ], @@ -8798,15 +8791,14 @@ "ldrb w22, [x28, #1298]", "lsl w23, w21, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "lsl w21, w21, w20", "bic w21, w22, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "db 0xde, 0xe0": { @@ -8829,12 +8821,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st1, st0": { @@ -8855,12 +8847,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubrp st2, st0": { @@ -8881,12 +8873,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st3, st0": { @@ -8907,12 +8899,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st4, st0": { @@ -8933,12 +8925,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st5, st0": { @@ -8959,12 +8951,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st6, st0": { @@ -8985,12 +8977,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubrp st7, st0": { @@ -9011,12 +9003,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xe8": { @@ -9039,12 +9031,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st1, st0": { @@ -9065,12 +9057,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fsubp st2, st0": { @@ -9091,12 +9083,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st3, st0": { @@ -9117,12 +9109,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st4, st0": { @@ -9143,12 +9135,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st5, st0": { @@ -9169,12 +9161,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st6, st0": { @@ -9195,12 +9187,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fsubp st7, st0": { @@ -9221,12 +9213,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf0": { @@ -9249,12 +9241,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st1, st0": { @@ -9275,12 +9267,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivrp st2, st0": { @@ -9301,12 +9293,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st3, st0": { @@ -9327,12 +9319,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st4, st0": { @@ -9353,12 +9345,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st5, st0": { @@ -9379,12 +9371,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st6, st0": { @@ -9405,12 +9397,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivrp st7, st0": { @@ -9431,12 +9423,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "db 0xde, 0xf8": { @@ -9459,12 +9451,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st1, st0": { @@ -9485,12 +9477,12 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x22, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fdivp st2, st0": { @@ -9511,12 +9503,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st3, st0": { @@ -9537,12 +9529,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st4, st0": { @@ -9563,12 +9555,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st5, st0": { @@ -9589,12 +9581,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st6, st0": { @@ -9615,12 +9607,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fdivp st7, st0": { @@ -9641,12 +9633,12 @@ "mov w23, #0x1", "lsl w23, w23, w20", "bic w22, w22, w23", - "strb w22, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", "add x0, x28, x21, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w22, [x28, #1298]" ] }, "fild word [rax]": { @@ -9662,13 +9654,13 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", - "ldrh w21, [x4]", - "sxth x21, w21", - "scvtf d2, x21", + "ldrh w22, [x4]", + "sxth x22, w22", + "scvtf d2, x22", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fisttp word [rax]": { @@ -9686,10 +9678,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fist word [rax]": { @@ -9722,10 +9714,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "fbld tword [rax]": { @@ -9741,7 +9733,6 @@ "ldrb w22, [x28, #1298]", "lsl w21, w21, w20", "orr w21, w22, w21", - "strb w21, [x28, #1298]", "strb w20, [x28, #1019]", "ldr q2, [x4]", "mrs x0, nzcv", @@ -9799,7 +9790,8 @@ "ldr x30, [sp], #16", "mov v2.8b, v0.8b", "add x0, x28, x20, lsl #4", - "str d2, [x0, #1040]" + "str d2, [x0, #1040]", + "strb w21, [x28, #1298]" ] }, "fbstp tword [rax]": { @@ -9873,10 +9865,10 @@ "mov w22, #0x1", "lsl w22, w22, w20", "bic w21, w21, w22", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", - "strb w20, [x28, #1019]" + "strb w20, [x28, #1019]", + "strb w21, [x28, #1298]" ] }, "ffreep st0": { @@ -10021,11 +10013,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st1": { @@ -10054,11 +10046,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st2": { @@ -10087,11 +10079,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st3": { @@ -10120,11 +10112,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st4": { @@ -10153,11 +10145,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st5": { @@ -10186,11 +10178,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st6": { @@ -10219,11 +10211,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fucomip st7": { @@ -10252,11 +10244,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st0": { @@ -10285,11 +10277,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st1": { @@ -10318,11 +10310,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st2": { @@ -10351,11 +10343,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st3": { @@ -10384,11 +10376,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st4": { @@ -10417,11 +10409,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st5": { @@ -10450,11 +10442,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st6": { @@ -10483,11 +10475,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] }, "fcomip st7": { @@ -10516,11 +10508,11 @@ "ldrb w23, [x28, #1298]", "lsl w21, w21, w20", "bic w21, w23, w21", - "strb w21, [x28, #1298]", "add w20, w20, #0x1 (1)", "and w20, w20, #0x7", "strb w20, [x28, #1019]", - "msr nzcv, x22" + "msr nzcv, x22", + "strb w21, [x28, #1298]" ] } }