steam-frame/FEX-Emu--FEX
1
0 Fork 0
mirror of https://github.com/FEX-Emu/FEX.git synced 2026-10-14 15:00:53 +02:00
Code Issues Packages Projects Releases 67 Wiki Activity

OpcodeDispatcher: rm pointless constant

Browse Source 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
This commit is contained in:
Alyssa Rosenzweig committed 2023-11-13 21:21:01 -04:00
1 parent 910e0242c1
commit d38917b5f0
1 file changed
+3 -7
Download Patch File Download Diff File Expand all files Collapse all files
FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+3 -7
View File
@@ -2604,8 +2604,6 @@ void OpDispatchBuilder::RCLOp1Bit(OpcodeArgs) {
const auto OpSize = Size == 64 ? OpSize::i64Bit : OpSize::i32Bit;
auto CF = GetRFLAG(FEXCore::X86State::RFLAG_CF_RAW_LOC);
uint32_t Shift = 1;
// Our new CF will be the top bit of the source
auto NewCF = _Bfe(OpSize, 1, Size - 1, Dest);
@@ -2617,11 +2615,9 @@ void OpDispatchBuilder::RCLOp1Bit(OpcodeArgs) {
SetRFLAG<FEXCore::X86State::RFLAG_CF_RAW_LOC>(NewCF);
if (Shift == 1) {
// OF is the top two MSBs XOR'd together
// Top two MSBs is CF and top bit of result
SetRFLAG<FEXCore::X86State::RFLAG_OF_RAW_LOC>(_Xor(OpSize::i32Bit, _Bfe(OpSize, 1, Size - 1, Res), NewCF));
}
// OF is the top two MSBs XOR'd together
// Top two MSBs is CF and top bit of result
SetRFLAG<FEXCore::X86State::RFLAG_OF_RAW_LOC>(_Xor(OpSize::i32Bit, _Bfe(OpSize, 1, Size - 1, Res), NewCF));
}
void OpDispatchBuilder::RCLOp(OpcodeArgs) {