From 542ed8b6ad2808168674518247b7639c6663fa83 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 19 Jun 2024 02:02:46 -0700 Subject: [PATCH 1/3] Implement support for querying AES256 support This is a different feature flag than regular AES as the default AES+AVX only operates on 128-bit wide vectors. With the newer `VAES` extension this is expanded to 256-bit. --- FEXCore/Source/Interface/Core/HostFeatures.cpp | 5 +++++ FEXCore/include/FEXCore/Core/HostFeatures.h | 1 + Scripts/InstructionCountParser.py | 2 ++ Scripts/json_config_parse.py | 2 ++ Source/Tools/CommonTools/HarnessHelpers.h | 7 +++++++ Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp | 11 ++++++----- 6 files changed, 23 insertions(+), 5 deletions(-) diff --git a/FEXCore/Source/Interface/Core/HostFeatures.cpp b/FEXCore/Source/Interface/Core/HostFeatures.cpp index 9b45aae6d..0ee33ee0d 100644 --- a/FEXCore/Source/Interface/Core/HostFeatures.cpp +++ b/FEXCore/Source/Interface/Core/HostFeatures.cpp @@ -101,11 +101,13 @@ static void OverrideFeatures(HostFeatures* Features) { Features->SupportsCRC = true; Features->SupportsSHA = true; Features->SupportsPMULL_128Bit = true; + Features->SupportsAES256 = true; } else if (DisableCrypto) { Features->SupportsAES = false; Features->SupportsCRC = false; Features->SupportsSHA = false; Features->SupportsPMULL_128Bit = false; + Features->SupportsAES256 = false; } ///< Only force enable SVE256 if SVE is already enabled and ForceSVEWidth is set to >= 256. @@ -158,6 +160,8 @@ HostFeatures::HostFeatures() { #endif SupportsAVX = SupportsSVE256; + SupportsAES256 = SupportsAVX && SupportsAES; + // TODO: AVX2 is currently unsupported. Disable until the remaining features are implemented. SupportsAVX2 = false; SupportsBMI1 = true; @@ -234,6 +238,7 @@ HostFeatures::HostFeatures() { SupportsBMI2 = X86Features.has(Xbyak::util::Cpu::tBMI2); SupportsCLWB = X86Features.has(Xbyak::util::Cpu::tCLWB); SupportsPMULL_128Bit = X86Features.has(Xbyak::util::Cpu::tPCLMULQDQ); + SupportsAES256 = SupportsAES && X86Features.has(Xbyak::util::Cpu::tVAES); // xbyak doesn't know how to check for CLZero // First ensure we support a new enough extended CPUID function range diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h index aba1fbc09..3e6af65ca 100644 --- a/FEXCore/include/FEXCore/Core/HostFeatures.h +++ b/FEXCore/include/FEXCore/Core/HostFeatures.h @@ -39,6 +39,7 @@ public: bool SupportsFlagM2 {}; bool SupportsRPRES {}; bool SupportsPreserveAllABI {}; + bool SupportsAES256 {}; // Float exception behaviour bool SupportsAFP {}; diff --git a/Scripts/InstructionCountParser.py b/Scripts/InstructionCountParser.py index 850d98485..4838afa8c 100755 --- a/Scripts/InstructionCountParser.py +++ b/Scripts/InstructionCountParser.py @@ -53,6 +53,7 @@ class HostFeatures(Flag) : FEATURE_FLAGM = (1 << 8) FEATURE_FLAGM2 = (1 << 9) FEATURE_CRYPTO = (1 << 10) + FEATURE_AES256 = (1 << 11) HostFeaturesLookup = { "SVE128" : HostFeatures.FEATURE_SVE128, @@ -66,6 +67,7 @@ HostFeaturesLookup = { "FLAGM" : HostFeatures.FEATURE_FLAGM, "FLAGM2" : HostFeatures.FEATURE_FLAGM2, "CRYPTO" : HostFeatures.FEATURE_CRYPTO, + "AES256" : HostFeatures.FEATURE_AES256, } def GetHostFeatures(data): diff --git a/Scripts/json_config_parse.py b/Scripts/json_config_parse.py index 59b6a4385..ff6757504 100644 --- a/Scripts/json_config_parse.py +++ b/Scripts/json_config_parse.py @@ -74,6 +74,7 @@ class HostFeatures(Flag) : FEATURE_CLWB = (1 << 8) FEATURE_LINUX = (1 << 9) FEATURE_AVX2 = (1 << 10) + FEATURE_AES256 = (1 << 11) RegStringLookup = { "NONE": Regs.REG_NONE, @@ -147,6 +148,7 @@ HostFeaturesLookup = { "CLWB" : HostFeatures.FEATURE_CLWB, "LINUX" : HostFeatures.FEATURE_LINUX, "AVX2" : HostFeatures.FEATURE_AVX2, + "AES256" : HostFeatures.FEATURE_AES256, } def parse_hexstring(s): diff --git a/Source/Tools/CommonTools/HarnessHelpers.h b/Source/Tools/CommonTools/HarnessHelpers.h index f342aa2ed..f41c88136 100644 --- a/Source/Tools/CommonTools/HarnessHelpers.h +++ b/Source/Tools/CommonTools/HarnessHelpers.h @@ -308,6 +308,7 @@ public: FEATURE_CLWB = (1 << 8), FEATURE_LINUX = (1 << 9), FEATURE_AVX2 = (1 << 10), + FEATURE_AES256 = (1 << 11), }; bool Requires3DNow() const { @@ -343,6 +344,9 @@ public: bool RequiresLinux() const { return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_LINUX; } + bool RequiresAES256() const { + return BaseConfig.OptionHostFeatures & HostFeatures::FEATURE_AES256; + } private: FEX_CONFIG_OPT(ConfigDumpGPRs, DUMPGPRS); @@ -512,6 +516,9 @@ public: bool RequiresLinux() const { return Config.RequiresLinux(); } + bool RequiresAES256() const { + return Config.RequiresAES256(); + } private: constexpr static uint64_t STACK_OFFSET = 0xc000'0000; diff --git a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp index 71c72709d..72eebb9dc 100644 --- a/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp +++ b/Source/Tools/TestHarnessRunner/TestHarnessRunner.cpp @@ -264,11 +264,12 @@ int main(int argc, char** argv, char** const envp) { SupportsAVX = HostFeatures.SupportsAVX; SupportsAVX2 = HostFeatures.SupportsAVX2; - bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) || (!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) || - (!SupportsAVX && Loader.RequiresAVX()) || (!SupportsAVX2 && Loader.RequiresAVX2()) || - (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) || (!HostFeatures.SupportsSHA && Loader.RequiresSHA()) || - (!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) || (!HostFeatures.SupportsBMI1 && Loader.RequiresBMI1()) || - (!HostFeatures.SupportsBMI2 && Loader.RequiresBMI2()) || (!HostFeatures.SupportsCLWB && Loader.RequiresCLWB()); + bool TestUnsupported = (!HostFeatures.Supports3DNow && Loader.Requires3DNow()) || + (!HostFeatures.SupportsSSE4A && Loader.RequiresSSE4A()) || (!SupportsAVX && Loader.RequiresAVX()) || + (!SupportsAVX2 && Loader.RequiresAVX2()) || (!HostFeatures.SupportsRAND && Loader.RequiresRAND()) || + (!HostFeatures.SupportsSHA && Loader.RequiresSHA()) || (!HostFeatures.SupportsCLZERO && Loader.RequiresCLZERO()) || + (!HostFeatures.SupportsBMI1 && Loader.RequiresBMI1()) || (!HostFeatures.SupportsBMI2 && Loader.RequiresBMI2()) || + (!HostFeatures.SupportsCLWB && Loader.RequiresCLWB()) || (!HostFeatures.SupportsAES256 && Loader.RequiresAES256()); #ifdef _WIN32 TestUnsupported |= Loader.RequiresLinux(); From 8fb801069fc9a20b0ff5e9bb60e0515aaeb771cf Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 19 Jun 2024 02:06:02 -0700 Subject: [PATCH 2/3] unittests: Adds new VAES tests --- unittests/ASM/Disabled_Tests_Simulator | 4 +++ unittests/ASM/VEX/vaesdec256.asm | 49 ++++++++++++++++++++++++++ unittests/ASM/VEX/vaesdeclast256.asm | 49 ++++++++++++++++++++++++++ unittests/ASM/VEX/vaesenc256.asm | 49 ++++++++++++++++++++++++++ unittests/ASM/VEX/vaesenclast256.asm | 49 ++++++++++++++++++++++++++ 5 files changed, 200 insertions(+) create mode 100644 unittests/ASM/VEX/vaesdec256.asm create mode 100644 unittests/ASM/VEX/vaesdeclast256.asm create mode 100644 unittests/ASM/VEX/vaesenc256.asm create mode 100644 unittests/ASM/VEX/vaesenclast256.asm diff --git a/unittests/ASM/Disabled_Tests_Simulator b/unittests/ASM/Disabled_Tests_Simulator index 710d0df50..d1880958d 100644 --- a/unittests/ASM/Disabled_Tests_Simulator +++ b/unittests/ASM/Disabled_Tests_Simulator @@ -10,6 +10,10 @@ Test_VEX/vaesdeclast.asm Test_VEX/vaesenc.asm Test_VEX/vaesenclast.asm Test_VEX/vaesimc.asm +Test_VEX/vaesdec256.asm +Test_VEX/vaesdeclast256.asm +Test_VEX/vaesenc256.asm +Test_VEX/vaesenclast256.asm Test_VEX/vaeskeygenassist.asm # PCMUL considered to be part of crypto operations. Simulator doesn't support this. diff --git a/unittests/ASM/VEX/vaesdec256.asm b/unittests/ASM/VEX/vaesdec256.asm new file mode 100644 index 000000000..7d7af77f4 --- /dev/null +++ b/unittests/ASM/VEX/vaesdec256.asm @@ -0,0 +1,49 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AES256"], + "RegData": { + "XMM1": ["0x7A1FC5A0A07A1FC5", "0xC5A07A1F1FC5A07A", "0x7a1fc5a0a07a1fc5", "0xc5a07a1f1fc5a07a"], + "XMM2": ["0x85E03A5F5F85E03A", "0x3A5F85E0E03A5F85", "0x85e03a5f5f85e03a", "0x3a5f85e0e03a5f85"], + "XMM3": ["0x7A1FC5A1A07A1FC4", "0xC5A07A1E1FC5A07B", "0x7a1fc5a1a07a1fc4", "0xc5a07a1e1fc5a07b"], + "XMM4": ["0x85E03A5FA07A1FC5", "0xC5A07A1EE03A5F85", "0x85e03a5fa07a1fc5", "0xc5a07a1ee03a5f85"] + } +} +%endif + +lea rdx, [rel .data] + +vmovaps ymm0, [rdx + 32 * 4] + +vaesdec ymm1, ymm0, [rdx + 32 * 0] +vaesdec ymm2, ymm0, [rdx + 32 * 1] +vaesdec ymm3, ymm0, [rdx + 32 * 2] +vaesdec ymm4, ymm0, [rdx + 32 * 3] + +hlt + +align 32 +.data: +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 + +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF + +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 + +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF + +dq 0x0202020202020202 +dq 0x0303030303030303 +dq 0x0202020202020202 +dq 0x0303030303030303 diff --git a/unittests/ASM/VEX/vaesdeclast256.asm b/unittests/ASM/VEX/vaesdeclast256.asm new file mode 100644 index 000000000..d2af3f846 --- /dev/null +++ b/unittests/ASM/VEX/vaesdeclast256.asm @@ -0,0 +1,49 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AES256"], + "RegData": { + "XMM1": ["0xD5D56A6A6AD5D56A", "0x6A6AD5D5D56A6AD5", "0xd5d56a6a6ad5d56a", "0x6a6ad5d5d56a6ad5"], + "XMM2": ["0x2A2A9595952A2A95", "0x95952A2A2A95952A", "0x2a2a9595952a2a95", "0x95952a2a2a95952a"], + "XMM3": ["0xD5D56A6B6AD5D56B", "0x6A6AD5D4D56A6AD4", "0xd5d56a6b6ad5d56b", "0x6a6ad5d4d56a6ad4"], + "XMM4": ["0x2A2A95956AD5D56A", "0x6A6AD5D42A95952A", "0x2a2a95956ad5d56a", "0x6a6ad5d42a95952a"] + } +} +%endif + +lea rdx, [rel .data] + +vmovaps ymm0, [rdx + 32 * 4] + +vaesdeclast ymm1, ymm0, [rdx + 32 * 0] +vaesdeclast ymm2, ymm0, [rdx + 32 * 1] +vaesdeclast ymm3, ymm0, [rdx + 32 * 2] +vaesdeclast ymm4, ymm0, [rdx + 32 * 3] + +hlt + +align 32 +.data: +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 + +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF + +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 + +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF + +dq 0x0202020202020202 +dq 0x0303030303030303 +dq 0x0202020202020202 +dq 0x0303030303030303 diff --git a/unittests/ASM/VEX/vaesenc256.asm b/unittests/ASM/VEX/vaesenc256.asm new file mode 100644 index 000000000..3bed62860 --- /dev/null +++ b/unittests/ASM/VEX/vaesenc256.asm @@ -0,0 +1,49 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AES256"], + "RegData": { + "XMM1": ["0x77637B6F637B6F77", "0x7B6F77636F77637B", "0x77637b6f637b6f77", "0x7b6f77636f77637b"], + "XMM2": ["0x889C84909C849088", "0x8490889C90889C84", "0x889c84909c849088", "0x8490889c90889c84"], + "XMM3": ["0x77637B6E637B6F76", "0x7B6F77626F77637A", "0x77637b6e637b6f76", "0x7b6f77626f77637a"], + "XMM4": ["0x889C8490637B6F77", "0x7B6F776290889C84", "0x889c8490637b6f77", "0x7b6f776290889c84"] + } +} +%endif + +lea rdx, [rel .data] + +vmovaps ymm0, [rdx + 32 * 4] + +vaesenc ymm1, ymm0, [rdx + 32 * 0] +vaesenc ymm2, ymm0, [rdx + 32 * 1] +vaesenc ymm3, ymm0, [rdx + 32 * 2] +vaesenc ymm4, ymm0, [rdx + 32 * 3] + +hlt + +align 32 +.data: +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 + +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF + +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 + +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF + +dq 0x0202020202020202 +dq 0x0303030303030303 +dq 0x0202020202020202 +dq 0x0303030303030303 diff --git a/unittests/ASM/VEX/vaesenclast256.asm b/unittests/ASM/VEX/vaesenclast256.asm new file mode 100644 index 000000000..77fefddb9 --- /dev/null +++ b/unittests/ASM/VEX/vaesenclast256.asm @@ -0,0 +1,49 @@ +%ifdef CONFIG +{ + "HostFeatures": ["AES256"], + "RegData": { + "XMM1": ["0x777B7B777B7B7777", "0x7B77777B77777B7B", "0x777b7b777b7b7777", "0x7b77777b77777b7b"], + "XMM2": ["0x8884848884848888", "0x8488888488888484", "0x8884848884848888", "0x8488888488888484"], + "XMM3": ["0x777B7B767B7B7776", "0x7B77777A77777B7A", "0x777b7b767b7b7776", "0x7b77777a77777b7a"], + "XMM4": ["0x888484887B7B7777", "0x7B77777A88888484", "0x888484887b7b7777", "0x7b77777a88888484"] + } +} +%endif + +lea rdx, [rel .data] + +vmovaps ymm0, [rdx + 32 * 4] + +vaesenclast ymm1, ymm0, [rdx + 32 * 0] +vaesenclast ymm2, ymm0, [rdx + 32 * 1] +vaesenclast ymm3, ymm0, [rdx + 32 * 2] +vaesenclast ymm4, ymm0, [rdx + 32 * 3] + +hlt + +align 32 +.data: +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 +dq 0x0000000000000000 + +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF +dq 0xFFFFFFFFFFFFFFFF + +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 +dq 0x0000000100000001 + +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF +dq 0xFFFFFFFF00000000 +dq 0x00000001FFFFFFFF + +dq 0x0202020202020202 +dq 0x0303030303030303 +dq 0x0202020202020202 +dq 0x0303030303030303 From 643bc10d52e7efd5de0756b749997835f2fa9d36 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Wed, 19 Jun 2024 02:07:15 -0700 Subject: [PATCH 3/3] CPUID: Expose VAES if supported --- FEXCore/Source/Interface/Core/CPUID.cpp | 64 ++++++++++++------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/FEXCore/Source/Interface/Core/CPUID.cpp b/FEXCore/Source/Interface/Core/CPUID.cpp index 09128b8e6..0e55fa221 100644 --- a/FEXCore/Source/Interface/Core/CPUID.cpp +++ b/FEXCore/Source/Interface/Core/CPUID.cpp @@ -637,38 +637,38 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_07h(uint32_t Leaf) const { (0 << 30) | // Reserved (0 << 31); // Reserved - Res.ecx = (1 << 0) | // PREFETCHWT1 - (0 << 1) | // AVX512VBMI - (0 << 2) | // Usermode instruction prevention - (0 << 3) | // Protection keys for user mode pages - (0 << 4) | // OS protection keys - (0 << 5) | // waitpkg - (0 << 6) | // AVX512_VBMI2 - (0 << 7) | // CET shadow stack - (0 << 8) | // GFNI - (0 << 9) | // VAES - (0 << 10) | // VPCLMULQDQ - (0 << 11) | // AVX512_VNNI - (0 << 12) | // AVX512_BITALG - (0 << 13) | // Intel Total Memory Encryption - (0 << 14) | // AVX512_VPOPCNTDQ - (0 << 15) | // Reserved - (0 << 16) | // 5 Level page tables - (0 << 17) | // MPX MAWAU - (0 << 18) | // MPX MAWAU - (0 << 19) | // MPX MAWAU - (0 << 20) | // MPX MAWAU - (0 << 21) | // MPX MAWAU - (1 << 22) | // RDPID Read Processor ID - (0 << 23) | // Reserved - (0 << 24) | // Reserved - (0 << 25) | // CLDEMOTE - (0 << 26) | // Reserved - (0 << 27) | // MOVDIRI - (0 << 28) | // MOVDIR64B - (0 << 29) | // Reserved - (0 << 30) | // SGX Launch configuration - (0 << 31); // Reserved + Res.ecx = (1 << 0) | // PREFETCHWT1 + (0 << 1) | // AVX512VBMI + (0 << 2) | // Usermode instruction prevention + (0 << 3) | // Protection keys for user mode pages + (0 << 4) | // OS protection keys + (0 << 5) | // waitpkg + (0 << 6) | // AVX512_VBMI2 + (0 << 7) | // CET shadow stack + (0 << 8) | // GFNI + (CTX->HostFeatures.SupportsAES256 << 9) | // VAES + (0 << 10) | // VPCLMULQDQ + (0 << 11) | // AVX512_VNNI + (0 << 12) | // AVX512_BITALG + (0 << 13) | // Intel Total Memory Encryption + (0 << 14) | // AVX512_VPOPCNTDQ + (0 << 15) | // Reserved + (0 << 16) | // 5 Level page tables + (0 << 17) | // MPX MAWAU + (0 << 18) | // MPX MAWAU + (0 << 19) | // MPX MAWAU + (0 << 20) | // MPX MAWAU + (0 << 21) | // MPX MAWAU + (1 << 22) | // RDPID Read Processor ID + (0 << 23) | // Reserved + (0 << 24) | // Reserved + (0 << 25) | // CLDEMOTE + (0 << 26) | // Reserved + (0 << 27) | // MOVDIRI + (0 << 28) | // MOVDIR64B + (0 << 29) | // Reserved + (0 << 30) | // SGX Launch configuration + (0 << 31); // Reserved Res.edx = (0 << 0) | // Reserved (0 << 1) | // Reserved