diff --git a/unittests/32Bit_ASM/Disabled_Tests_Simulator b/unittests/32Bit_ASM/Disabled_Tests_Simulator
new file mode 100644
index 000000000..aa7a9edef
--- /dev/null
+++ b/unittests/32Bit_ASM/Disabled_Tests_Simulator
@@ -0,0 +1,3 @@
+# Simulator can't handle all rounding modes
+Test_X87/RoundingPos.asm
+Test_X87/RoundingNeg.asm
\ No newline at end of file
diff --git a/unittests/32Bit_ASM/X87/RoundingNeg.asm b/unittests/32Bit_ASM/X87/RoundingNeg.asm
new file mode 100644
index 000000000..fa459692d
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/RoundingNeg.asm
@@ -0,0 +1,176 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "0xfffefffe",
+    "RBX": "0xffffffff",
+    "RCX": "0xfffffffe",
+    "RDX": "0xffffffff",
+    "RSI": "0xfffefffe",
+    "RDI": "0xffffffff"
+  },
+  "MemoryRegions": {
+    "0xf0000000": "4096"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+
+section .data
+align 4
+nmidpoint:
+  dd -1.5
+nsamidpoint:
+  dd -1.49999
+nsbmidpoint:
+  dd -1.50001
+
+section .bss
+align 4
+tmp resd 1
+
+section .text
+
+; Rounding tests to ensure rounding modes are actually working
+;;; Negative tests
+;; Mid-point
+finit
+fld dword [rel nmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist word [rel tmp]
+mov di, word [rel tmp]
+mov eax, edi
+shl eax, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0400
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+or eax, edi
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0800
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+mov ebx, edi
+shl ebx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0c00
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov di, word [rel tmp]
+or ebx, edi
+
+;; Slightly above midpoint
+finit
+fld dword [rel nsamidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov di, word [rel tmp]
+mov ecx, edi
+shl ecx, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0400
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+or ecx, edi
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0800
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+or edx, edi
+shl edx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0c00
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov di, word [rel tmp]
+or edx, edi
+
+;; Slightly below midpoint
+finit
+fld dword [rel nsbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov si, word [rel tmp]
+shl esi, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx edi, word [rel tmp]
+and edi, 0xf3ff
+or edi, 0x0400
+mov word [rel tmp], di
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+or esi, edi
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx ebp, word [rel tmp]
+and ebp, 0xf3ff
+or ebp, 0x0800
+mov word [rel tmp], bp
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov di, word [rel tmp]
+or edi, ebp
+shl edi, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx ebp, word [rel tmp]
+and ebp, 0xf3ff
+or ebp, 0x0c00
+mov word [rel tmp], bp
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov bp, word [rel tmp]
+or edi, ebp
+
+hlt
diff --git a/unittests/32Bit_ASM/X87/RoundingPos.asm b/unittests/32Bit_ASM/X87/RoundingPos.asm
new file mode 100644
index 000000000..db7ace1d7
--- /dev/null
+++ b/unittests/32Bit_ASM/X87/RoundingPos.asm
@@ -0,0 +1,163 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RBX": "0x21212121",
+    "RCX": "0x1121"
+  },
+  "MemoryRegions": {
+    "0xf0000000": "4096"
+  },
+  "Mode": "32BIT"
+}
+%endif
+
+
+section .data
+align 4
+midpoint:
+  dd 1.5
+samidpoint:
+  dd 1.50001
+sbmidpoint:
+  dd 1.49999
+
+section .bss
+align 4
+tmp resd 1
+
+section .text
+; Rounding tests to ensure rounding modes are actually working
+;; Mid-point
+finit
+fld dword [rel midpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+;; Slightly above midpoint
+finit
+fld dword [rel samidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ebx, dword [rel tmp]
+shl ebx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or ebx, dword [rel tmp]
+
+;; Slightly below midpoint
+finit
+fld dword [rel sbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov ecx, dword [rel tmp]
+shl ecx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ecx, dword [rel tmp]
+shl ecx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or ecx, dword [rel tmp]
+shl ecx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx eax, word [rel tmp]
+and eax, 0xf3ff
+or eax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or ecx, dword [rel tmp]
+
+hlt
diff --git a/unittests/ASM/Disabled_Tests_Simulator b/unittests/ASM/Disabled_Tests_Simulator
index 1447e32e3..e9589d09c 100644
--- a/unittests/ASM/Disabled_Tests_Simulator
+++ b/unittests/ASM/Disabled_Tests_Simulator
@@ -96,6 +96,8 @@ Test_VEX/vcvtps2ph_rtne_mxcsr.asm
 Test_VEX/vcvtps2ph_rd_mxcsr.asm
 Test_VEX/vcvtps2ph_ru_mxcsr.asm
 Test_VEX/vcvtps2ph_trunc_mxcsr.asm
+Test_X87/Rounding.asm
+Test_X87_F64/Rounding_F64.asm
 
 # Simulator doesn't support cycle counter reading
 Test_TwoByte/0F_31.asm
diff --git a/unittests/ASM/X87/Rounding.asm b/unittests/ASM/X87/Rounding.asm
new file mode 100644
index 000000000..cff618c94
--- /dev/null
+++ b/unittests/ASM/X87/Rounding.asm
@@ -0,0 +1,314 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RBX": "0x212121211121",
+    "RCX": "0xfffefffeffffffff",
+    "RDX": "0xfffffffeffffffff",
+    "RSI": "0xfffefffeffffffff"
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+; Rounding tests to ensure rounding modes are actually working
+
+;; Mid-point
+finit
+fld qword [rel midpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+;; Slightly above midpoint
+finit
+fld qword [rel samidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+;; Slightly below midpoint
+finit
+fld qword [rel sbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+
+
+;;; Negative tests
+;; Mid-point
+finit
+fld qword [rel nmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist word [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax 
+shl rcx, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+shl rcx, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+shl rcx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+
+;; Slightly above midpoint
+finit
+fld qword [rel nsamidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov dx, word [rel tmp]
+shl rdx, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+shl rdx, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+shl rdx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+
+;; Slightly below midpoint
+finit
+fld qword [rel nsbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov si, word [rel tmp]
+shl rsi, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+shl rsi, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+shl rsi, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+
+hlt
+
+section .data
+align 8
+midpoint:
+  dq 1.5
+samidpoint:
+  dq 1.50001
+sbmidpoint:
+  dq 1.49999
+nmidpoint:
+  dq -1.5
+nsamidpoint:
+  dq -1.49999
+nsbmidpoint:
+  dq -1.50001
+
+section .bss
+align 8
+tmp resq 1
\ No newline at end of file
diff --git a/unittests/ASM/X87_F64/Rounding_F64.asm b/unittests/ASM/X87_F64/Rounding_F64.asm
new file mode 100644
index 000000000..f0c1daea2
--- /dev/null
+++ b/unittests/ASM/X87_F64/Rounding_F64.asm
@@ -0,0 +1,316 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RBX": "0x212121211121",
+    "RCX": "0xfffefffeffffffff",
+    "RDX": "0xfffffffeffffffff",
+    "RSI": "0xfffefffeffffffff"
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  },
+  "Env": { "FEX_X87REDUCEDPRECISION" : "1" }
+}
+%endif
+
+section .data
+align 8
+midpoint:
+  dq 1.5
+samidpoint:
+  dq 1.50001
+sbmidpoint:
+  dq 1.49999
+nmidpoint:
+  dq -1.5
+nsamidpoint:
+  dq -1.49999
+nsbmidpoint:
+  dq -1.50001
+
+section .bss
+align 8
+tmp resq 1
+
+section .text
+; Rounding tests to ensure rounding modes are actually working
+
+;; Mid-point
+finit
+fld qword [rel midpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+;; Slightly above midpoint
+finit
+fld qword [rel samidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+;; Slightly below midpoint
+finit
+fld qword [rel sbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+or rbx, qword [rel tmp]
+shl rbx, 4
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+or rbx, qword [rel tmp]
+
+
+;;; Negative tests
+;; Mid-point
+finit
+fld qword [rel nmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist word [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax 
+shl rcx, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+shl rcx, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+shl rcx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rcx, rax
+
+;; Slightly above midpoint
+finit
+fld qword [rel nsamidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov dx, word [rel tmp]
+shl rdx, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+shl rdx, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+shl rdx, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rdx, rax
+
+;; Slightly below midpoint
+finit
+fld qword [rel nsbmidpoint]
+
+; Default rounding is 00 - round to nearest
+fist dword [rel tmp]
+mov si, word [rel tmp]
+shl rsi, 16
+
+; Round down - 01
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0400
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+shl rsi, 16
+
+; Round up - 10
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0800
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fist dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+shl rsi, 16
+
+; Round toward zero - 11
+fstcw word [rel tmp]
+movzx rax, word [rel tmp]
+and rax, 0xf3ff
+or rax, 0x0c00
+mov word [rel tmp], ax
+fldcw word [rel tmp]
+
+fistp dword [rel tmp]
+mov ax, word [rel tmp]
+or rsi, rax
+
+hlt