diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
index c7e9d2bed..7b6dae994 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
@@ -2104,7 +2104,7 @@ void OpDispatchBuilder::ASHROp(OpcodeArgs) {
     Dest = _Sbfe(OpSize::i64Bit, Size, 0, Dest);
   }
 
-  OrderedNode *Result = _Ashr(std::max<uint8_t>(4, GetSrcSize(Op)), Dest, Src);
+  OrderedNode *Result = _Ashr(IR::SizeToOpSize(std::max<uint8_t>(4, GetSrcSize(Op))), Dest, Src);
   StoreResult(GPRClass, Op, Result, -1);
 
   if constexpr (SHR1Bit) {
@@ -2134,7 +2134,7 @@ void OpDispatchBuilder::ASHRImmediateOp(OpcodeArgs) {
   }
 
   OrderedNode *Src = _Constant(Size, Shift);
-  OrderedNode *Result = _Ashr(Dest, Src);
+  OrderedNode *Result = _Ashr(IR::SizeToOpSize(std::max<uint8_t>(4, GetOpSize(Dest))), Dest, Src);
 
   StoreResult(GPRClass, Op, Result, -1);
 
@@ -2393,7 +2393,7 @@ void OpDispatchBuilder::BMI2Shift(OpcodeArgs) {
   auto* Result = [&]() -> OrderedNode* {
     // SARX
     if (Op->OP == 0x6F7) {
-      return _Ashr(Size, Src, Shift);
+      return _Ashr(IR::SizeToOpSize(Size), Src, Shift);
     }
     // SHLX
     if (Op->OP == 0x5F7) {
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
index acd6ce548..c51ef1262 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
@@ -1133,7 +1133,7 @@ private:
 
     // Shift the sign bit into the N bit
     if (SignBit > NBit)
-      Shifted = _Ashr(Res, _Constant(SignBit - NBit));
+      Shifted = _Ashr(OpSize::i64Bit, Res, _Constant(SignBit - NBit));
     else if (SignBit < NBit)
       Shifted = _Lshl(Res, _Constant(NBit - SignBit));
     else
diff --git a/FEXCore/include/FEXCore/IR/IREmitter.h b/FEXCore/include/FEXCore/IR/IREmitter.h
index d667a9300..f3e1f15b4 100644
--- a/FEXCore/include/FEXCore/IR/IREmitter.h
+++ b/FEXCore/include/FEXCore/IR/IREmitter.h
@@ -96,9 +96,6 @@ friend class FEXCore::IR::PassManager;
   IRPair<IROp_Lshr> _Lshr(OrderedNode *Src1, OrderedNode *Src2) {
     return _Lshr(std::max<uint8_t>(4, GetOpSize(Src1)), Src1, Src2);
   }
-  IRPair<IROp_Ashr> _Ashr(OrderedNode *Src1, OrderedNode *Src2) {
-    return _Ashr(std::max<uint8_t>(4, GetOpSize(Src1)), Src1, Src2);
-  }
   OrderedNode *Invalid() {
     return InvalidNode;
   }
@@ -197,9 +194,6 @@ friend class FEXCore::IR::PassManager;
   IRPair<IROp_Lshr> _Lshr(uint8_t Size, OrderedNode *_Src1, OrderedNode *_Src2) {
     return _Lshr(static_cast<OpSize>(Size), _Src1, _Src2);
   }
-  IRPair<IROp_Ashr> _Ashr(uint8_t Size, OrderedNode *_Src1, OrderedNode *_Src2) {
-    return _Ashr(static_cast<OpSize>(Size), _Src1, _Src2);
-  }
   IRPair<IROp_Mul> _Mul(OrderedNode *_Src1, OrderedNode *_Src2) {
     return _Mul(static_cast<OpSize>(std::max<uint8_t>(4, std::max(GetOpSize(_Src1), GetOpSize(_Src2)))), _Src1, _Src2);
   }