diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index cab35c7d2..5750b1a86 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -282,8 +282,7 @@ void OpDispatchBuilder::SecondaryALUOp(OpcodeArgs) { ALUOp(Op, IROp, AtomicIROp, 1); } -template -void OpDispatchBuilder::ADCOp(OpcodeArgs) { +void OpDispatchBuilder::ADCOp(OpcodeArgs, uint32_t SrcIndex) { // Calculate flags early. CalculateDeferredFlags(); @@ -319,11 +318,7 @@ void OpDispatchBuilder::ADCOp(OpcodeArgs) { } } -template void OpDispatchBuilder::ADCOp<0>(OpcodeArgs); -template void OpDispatchBuilder::ADCOp<1>(OpcodeArgs); - -template -void OpDispatchBuilder::SBBOp(OpcodeArgs) { +void OpDispatchBuilder::SBBOp(OpcodeArgs, uint32_t SrcIndex) { // Calculate flags early. CalculateDeferredFlags(); @@ -350,9 +345,6 @@ void OpDispatchBuilder::SBBOp(OpcodeArgs) { } } -template void OpDispatchBuilder::SBBOp<0>(OpcodeArgs); -template void OpDispatchBuilder::SBBOp<1>(OpcodeArgs); - void OpDispatchBuilder::SALCOp(OpcodeArgs) { CalculateDeferredFlags(); @@ -428,8 +420,7 @@ void OpDispatchBuilder::PUSHAOp(OpcodeArgs) { FlushRegisterCache(); } -template -void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs) { +void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs, uint32_t SegmentReg) { const uint8_t SrcSize = GetSrcSize(Op); const uint8_t DstSize = GetDstSize(Op); @@ -486,13 +477,6 @@ void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs) { Push(DstSize, Src); } -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::PUSHSegmentOp(OpcodeArgs); - void OpDispatchBuilder::POPOp(OpcodeArgs) { Ref Value = Pop(GetSrcSize(Op)); StoreResult(GPRClass, Op, Value, -1); @@ -520,8 +504,7 @@ void OpDispatchBuilder::POPAOp(OpcodeArgs) { StoreGPRRegister(X86State::REG_RSP, SP); } -template -void OpDispatchBuilder::POPSegmentOp(OpcodeArgs) { +void OpDispatchBuilder::POPSegmentOp(OpcodeArgs, uint32_t SegmentReg) { const uint8_t SrcSize = GetSrcSize(Op); const uint8_t DstSize = GetDstSize(Op); @@ -552,12 +535,6 @@ void OpDispatchBuilder::POPSegmentOp(OpcodeArgs) { UpdatePrefixFromSegment(NewSegment, SegmentReg); } -template void OpDispatchBuilder::POPSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::POPSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::POPSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::POPSegmentOp(OpcodeArgs); -template void OpDispatchBuilder::POPSegmentOp(OpcodeArgs); - void OpDispatchBuilder::LEAVEOp(OpcodeArgs) { // First we move RBP in to RSP and then behave effectively like a pop auto SP = _RMWHandle(LoadGPRRegister(X86State::REG_RBP)); @@ -1021,8 +998,7 @@ void OpDispatchBuilder::JUMPAbsoluteOp(OpcodeArgs) { ExitFunction(RIPOffset); } -template -void OpDispatchBuilder::TESTOp(OpcodeArgs) { +void OpDispatchBuilder::TESTOp(OpcodeArgs, uint32_t SrcIndex) { // TEST is an instruction that does an AND between the sources // Result isn't stored in result, only writes to flags Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.AllowUpperGarbage = true}); @@ -1058,9 +1034,6 @@ void OpDispatchBuilder::TESTOp(OpcodeArgs) { InvalidateAF(); } -template void OpDispatchBuilder::TESTOp<0>(OpcodeArgs); -template void OpDispatchBuilder::TESTOp<1>(OpcodeArgs); - void OpDispatchBuilder::MOVSXDOp(OpcodeArgs) { // This instruction is a bit special // if SrcSize == 2 @@ -1106,8 +1079,7 @@ void OpDispatchBuilder::MOVZXOp(OpcodeArgs) { StoreResult(GPRClass, Op, Src, -1); } -template -void OpDispatchBuilder::CMPOp(OpcodeArgs) { +void OpDispatchBuilder::CMPOp(OpcodeArgs, uint32_t SrcIndex) { // CMP is an instruction that does a SUB between the sources // Result isn't stored in result, only writes to flags Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.AllowUpperGarbage = true}); @@ -1115,9 +1087,6 @@ void OpDispatchBuilder::CMPOp(OpcodeArgs) { CalculateFlags_SUB(GetSrcSize(Op), Dest, Src); } -template void OpDispatchBuilder::CMPOp<0>(OpcodeArgs); -template void OpDispatchBuilder::CMPOp<1>(OpcodeArgs); - void OpDispatchBuilder::CQOOp(OpcodeArgs) { Ref Src = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); auto Size = GetSrcSize(Op); @@ -1222,8 +1191,7 @@ void OpDispatchBuilder::FLAGControlOp(OpcodeArgs) { } -template -void OpDispatchBuilder::MOVSegOp(OpcodeArgs) { +void OpDispatchBuilder::MOVSegOp(OpcodeArgs, bool ToSeg) { // In x86-64 mode the accesses to the segment registers end up being constant zero moves // Aside from FS/GS // In x86-64 mode the accesses to segment registers can actually still touch the segments @@ -1239,7 +1207,7 @@ void OpDispatchBuilder::MOVSegOp(OpcodeArgs) { // We don't currently support FS/GS selector modifying, so this needs to be asserted out // The loads here also load the selector, NOT the base - if constexpr (ToSeg) { + if (ToSeg) { Ref Src = LoadSource_WithOpSize(GPRClass, Op, Op->Src[0], 2, Op->Flags); switch (Op->Dest.Data.GPR.GPR) { @@ -1344,9 +1312,6 @@ void OpDispatchBuilder::MOVSegOp(OpcodeArgs) { } } -template void OpDispatchBuilder::MOVSegOp(OpcodeArgs); -template void OpDispatchBuilder::MOVSegOp(OpcodeArgs); - void OpDispatchBuilder::MOVOffsetOp(OpcodeArgs) { Ref Src; @@ -1421,8 +1386,7 @@ void OpDispatchBuilder::SHLOp(OpcodeArgs) { HandleShift(Op, Result, Dest, ShiftType::LSL, Src); } -template -void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs) { +void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs, bool SHL1Bit) { Ref Dest = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = true}); uint64_t Shift = LoadConstantShift(Op, SHL1Bit); @@ -1436,9 +1400,6 @@ void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs) { StoreResult(GPRClass, Op, Result, -1); } -template void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs); -template void OpDispatchBuilder::SHLImmediateOp(OpcodeArgs); - void OpDispatchBuilder::SHROp(OpcodeArgs) { auto Size = GetSrcSize(Op); auto Dest = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = Size >= 4}); @@ -1448,8 +1409,7 @@ void OpDispatchBuilder::SHROp(OpcodeArgs) { HandleShift(Op, ALUOp, Dest, ShiftType::LSR, Src); } -template -void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs) { +void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs, bool SHR1Bit) { const auto Size = GetSrcBitSize(Op); auto Dest = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = Size >= 32}); @@ -1463,9 +1423,6 @@ void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs) { StoreResult(GPRClass, Op, ALUOp, -1); } -template void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs); -template void OpDispatchBuilder::SHRImmediateOp(OpcodeArgs); - void OpDispatchBuilder::SHLDOp(OpcodeArgs) { // Calculate flags early. CalculateDeferredFlags(); @@ -1603,8 +1560,7 @@ void OpDispatchBuilder::SHRDImmediateOp(OpcodeArgs) { } } -template -void OpDispatchBuilder::ASHROp(OpcodeArgs) { +void OpDispatchBuilder::ASHROp(OpcodeArgs, bool Immediate, bool SHR1Bit) { const auto Size = GetSrcSize(Op); const auto OpSize = std::max(4, GetDstSize(Op)); @@ -1633,10 +1589,6 @@ void OpDispatchBuilder::ASHROp(OpcodeArgs) { } } -template void OpDispatchBuilder::ASHROp(OpcodeArgs); -template void OpDispatchBuilder::ASHROp(OpcodeArgs); -template void OpDispatchBuilder::ASHROp(OpcodeArgs); - void OpDispatchBuilder::RotateOp(OpcodeArgs, bool Left, bool IsImmediate, bool Is1Bit) { CalculateDeferredFlags(); @@ -1698,18 +1650,6 @@ void OpDispatchBuilder::RotateOp(OpcodeArgs, bool Left, bool IsImmediate, bool I } } -template -void OpDispatchBuilder::RotateOp(OpcodeArgs) { - RotateOp(Op, Left, IsImmediate, Is1Bit); -} - -template void OpDispatchBuilder::RotateOp(OpcodeArgs); -template void OpDispatchBuilder::RotateOp(OpcodeArgs); -template void OpDispatchBuilder::RotateOp(OpcodeArgs); -template void OpDispatchBuilder::RotateOp(OpcodeArgs); -template void OpDispatchBuilder::RotateOp(OpcodeArgs); -template void OpDispatchBuilder::RotateOp(OpcodeArgs); - void OpDispatchBuilder::ANDNBMIOp(OpcodeArgs) { auto* Src1 = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.AllowUpperGarbage = true}); auto* Src2 = LoadSource(GPRClass, Op, Op->Src[1], Op->Flags, {.AllowUpperGarbage = true}); @@ -2594,21 +2534,6 @@ void OpDispatchBuilder::BTOp(OpcodeArgs, uint32_t SrcIndex, BTAction Action) { } } -template -void OpDispatchBuilder::BTOp(OpcodeArgs) { - BTOp(Op, SrcIndex, Action); -} - -template void OpDispatchBuilder::BTOp<0, BTAction::BTNone>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<0, BTAction::BTClear>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<0, BTAction::BTSet>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<0, BTAction::BTComplement>(OpcodeArgs); - -template void OpDispatchBuilder::BTOp<1, BTAction::BTNone>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<1, BTAction::BTClear>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<1, BTAction::BTSet>(OpcodeArgs); -template void OpDispatchBuilder::BTOp<1, BTAction::BTComplement>(OpcodeArgs); - void OpDispatchBuilder::IMUL1SrcOp(OpcodeArgs) { /* We're just going to sign-extend the non-garbage anyway.. */ Ref Src1 = LoadSource(GPRClass, Op, Op->Dest, Op->Flags, {.AllowUpperGarbage = true}); @@ -3007,13 +2932,12 @@ void OpDispatchBuilder::XLATOp(OpcodeArgs) { StoreGPRRegister(X86State::REG_RAX, Res, 1); } -template -void OpDispatchBuilder::ReadSegmentReg(OpcodeArgs) { +void OpDispatchBuilder::ReadSegmentReg(OpcodeArgs, OpDispatchBuilder::Segment Seg) { // 64-bit only // Doesn't hit the segment register optimization auto Size = GetSrcSize(Op); Ref Src {}; - if constexpr (Seg == Segment::FS) { + if (Seg == Segment::FS) { Src = _LoadContext(Size, GPRClass, offsetof(FEXCore::Core::CPUState, fs_cached)); } else { Src = _LoadContext(Size, GPRClass, offsetof(FEXCore::Core::CPUState, gs_cached)); @@ -3022,25 +2946,18 @@ void OpDispatchBuilder::ReadSegmentReg(OpcodeArgs) { StoreResult(GPRClass, Op, Src, -1); } -template void OpDispatchBuilder::ReadSegmentReg(OpcodeArgs); -template void OpDispatchBuilder::ReadSegmentReg(OpcodeArgs); - -template -void OpDispatchBuilder::WriteSegmentReg(OpcodeArgs) { +void OpDispatchBuilder::WriteSegmentReg(OpcodeArgs, OpDispatchBuilder::Segment Seg) { // Documentation claims that the 32-bit version of this instruction inserts in to the lower 32-bits of the segment // This is incorrect and it instead zero extends the 32-bit value to 64-bit auto Size = GetDstSize(Op); Ref Src = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags); - if constexpr (Seg == Segment::FS) { + if (Seg == Segment::FS) { _StoreContext(Size, GPRClass, Src, offsetof(FEXCore::Core::CPUState, fs_cached)); } else { _StoreContext(Size, GPRClass, Src, offsetof(FEXCore::Core::CPUState, gs_cached)); } } -template void OpDispatchBuilder::WriteSegmentReg(OpcodeArgs); -template void OpDispatchBuilder::WriteSegmentReg(OpcodeArgs); - void OpDispatchBuilder::EnterOp(OpcodeArgs) { const uint8_t GPRSize = CTX->GetGPRSize(); const uint64_t Value = Op->Src[0].Literal(); @@ -4602,17 +4519,13 @@ void OpDispatchBuilder::UnhandledOp(OpcodeArgs) { DecodeFailure = true; } -template -void OpDispatchBuilder::MOVGPROp(OpcodeArgs) { +void OpDispatchBuilder::MOVGPROp(OpcodeArgs, uint32_t SrcIndex) { // StoreResult will store with the same size as the input, so we allow upper // garbage on the input. The zero extension would be pointless. Ref Src = LoadSource(GPRClass, Op, Op->Src[SrcIndex], Op->Flags, {.Align = 1, .AllowUpperGarbage = true}); StoreResult(GPRClass, Op, Src, 1); } -template void OpDispatchBuilder::MOVGPROp<0>(OpcodeArgs); -template void OpDispatchBuilder::MOVGPROp<1>(OpcodeArgs); - void OpDispatchBuilder::MOVGPRNTOp(OpcodeArgs) { Ref Src = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.Align = 1}); StoreResult(GPRClass, Op, Src, 1, MemoryAccessType::STREAM); @@ -4914,18 +4827,11 @@ void OpDispatchBuilder::CLZeroOp(OpcodeArgs) { _CacheLineZero(DestMem); } -template -void OpDispatchBuilder::Prefetch(OpcodeArgs) { +void OpDispatchBuilder::Prefetch(OpcodeArgs, bool ForStore, bool Stream, uint8_t Level) { Ref DestMem = LoadSource(GPRClass, Op, Op->Src[0], Op->Flags, {.LoadData = false}); - Prefetch(ForStore, Stream, Level, DestMem); + _Prefetch(ForStore, Stream, Level, DestMem, Invalid(), MEM_OFFSET_SXTX, 1); } -template void OpDispatchBuilder::Prefetch(OpcodeArgs); -template void OpDispatchBuilder::Prefetch(OpcodeArgs); -template void OpDispatchBuilder::Prefetch(OpcodeArgs); -template void OpDispatchBuilder::Prefetch(OpcodeArgs); -template void OpDispatchBuilder::Prefetch(OpcodeArgs); - void OpDispatchBuilder::RDTSCPOp(OpcodeArgs) { // RDTSCP is slightly different than RDTSC // IA32_TSC_AUX is returned in RCX diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h index 188035d74..b321f4f3d 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.h @@ -297,8 +297,7 @@ public: }; void UnhandledOp(OpcodeArgs); - template - void MOVGPROp(OpcodeArgs); + void MOVGPROp(OpcodeArgs, uint32_t SrcIndex); void MOVGPRNTOp(OpcodeArgs); void MOVVectorAlignedOp(OpcodeArgs); void MOVVectorUnalignedOp(OpcodeArgs); @@ -313,20 +312,16 @@ public: void IRETOp(OpcodeArgs); void CallbackReturnOp(OpcodeArgs); void SecondaryALUOp(OpcodeArgs); - template - void ADCOp(OpcodeArgs); - template - void SBBOp(OpcodeArgs); + void ADCOp(OpcodeArgs, uint32_t SrcIndex); + void SBBOp(OpcodeArgs, uint32_t SrcIndex); void SALCOp(OpcodeArgs); void PUSHOp(OpcodeArgs); void PUSHREGOp(OpcodeArgs); void PUSHAOp(OpcodeArgs); - template - void PUSHSegmentOp(OpcodeArgs); + void PUSHSegmentOp(OpcodeArgs, uint32_t SegmentReg); void POPOp(OpcodeArgs); void POPAOp(OpcodeArgs); - template - void POPSegmentOp(OpcodeArgs); + void POPSegmentOp(OpcodeArgs, uint32_t SegmentReg); void LEAVEOp(OpcodeArgs); void CALLOp(OpcodeArgs); void CALLAbsoluteOp(OpcodeArgs); @@ -335,21 +330,18 @@ public: void LoopOp(OpcodeArgs); void JUMPOp(OpcodeArgs); void JUMPAbsoluteOp(OpcodeArgs); - template - void TESTOp(OpcodeArgs); + void TESTOp(OpcodeArgs, uint32_t SrcIndex); void MOVSXDOp(OpcodeArgs); void MOVSXOp(OpcodeArgs); void MOVZXOp(OpcodeArgs); - template - void CMPOp(OpcodeArgs); + void CMPOp(OpcodeArgs, uint32_t SrcIndex); void SETccOp(OpcodeArgs); void CQOOp(OpcodeArgs); void CDQOp(OpcodeArgs); void XCHGOp(OpcodeArgs); void SAHFOp(OpcodeArgs); void LAHFOp(OpcodeArgs); - template - void MOVSegOp(OpcodeArgs); + void MOVSegOp(OpcodeArgs, bool ToSeg); void FLAGControlOp(OpcodeArgs); void MOVOffsetOp(OpcodeArgs); void CMOVOp(OpcodeArgs); @@ -357,19 +349,14 @@ public: void XGetBVOp(OpcodeArgs); uint32_t LoadConstantShift(X86Tables::DecodedOp Op, bool Is1Bit); void SHLOp(OpcodeArgs); - template - void SHLImmediateOp(OpcodeArgs); + void SHLImmediateOp(OpcodeArgs, bool SHL1Bit); void SHROp(OpcodeArgs); - template - void SHRImmediateOp(OpcodeArgs); + void SHRImmediateOp(OpcodeArgs, bool SHR1Bit); void SHLDOp(OpcodeArgs); void SHLDImmediateOp(OpcodeArgs); void SHRDOp(OpcodeArgs); void SHRDImmediateOp(OpcodeArgs); - template - void ASHROp(OpcodeArgs); - template - void RotateOp(OpcodeArgs); + void ASHROp(OpcodeArgs, bool IsImmediate, bool Is1Bit); void RotateOp(OpcodeArgs, bool Left, bool IsImmediate, bool Is1Bit); void RCROp1Bit(OpcodeArgs); void RCROp8x1Bit(OpcodeArgs); @@ -379,8 +366,6 @@ public: void RCLOp(OpcodeArgs); void RCLSmallerOp(OpcodeArgs); - template - void BTOp(OpcodeArgs); void BTOp(OpcodeArgs, uint32_t SrcIndex, enum BTAction Action); void IMUL1SrcOp(OpcodeArgs); @@ -428,10 +413,8 @@ public: FS, GS, }; - template - void ReadSegmentReg(OpcodeArgs); - template - void WriteSegmentReg(OpcodeArgs); + void ReadSegmentReg(OpcodeArgs, Segment Seg); + void WriteSegmentReg(OpcodeArgs, Segment Seg); void EnterOp(OpcodeArgs); void SGDTOp(OpcodeArgs); @@ -865,8 +848,7 @@ public: void RDTSCPOp(OpcodeArgs); void RDPIDOp(OpcodeArgs); - template - void Prefetch(OpcodeArgs); + void Prefetch(OpcodeArgs, bool ForStore, bool Stream, uint8_t Level); void PSADBW(OpcodeArgs); @@ -2473,10 +2455,6 @@ private: } } - Ref Prefetch(bool ForStore, bool Stream, uint8_t CacheLevel, Ref ssa0) { - return _Prefetch(ForStore, Stream, CacheLevel, ssa0, Invalid(), MEM_OFFSET_SXTX, 1); - } - Ref Pop(uint8_t Size, Ref SP_RMW) { Ref Value = _AllocateGPR(false); _Pop(Size, SP_RMW, Value); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/BaseTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/BaseTables.h index c9a1edcda..bfcc772ae 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/BaseTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/BaseTables.h @@ -9,9 +9,9 @@ constexpr inline std::tuple OpDispat {0x08, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ALUOp, FEXCore::IR::IROps::OP_OR, FEXCore::IR::IROps::OP_ATOMICFETCHOR, 0>}, - {0x10, 6, &OpDispatchBuilder::ADCOp<0>}, + {0x10, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ADCOp, 0>}, - {0x18, 6, &OpDispatchBuilder::SBBOp<0>}, + {0x18, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SBBOp, 0>}, {0x20, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ALUOp, FEXCore::IR::IROps::OP_ANDWITHFLAGS, FEXCore::IR::IROps::OP_ATOMICFETCHAND, 0>}, @@ -19,7 +19,7 @@ constexpr inline std::tuple OpDispat {0x30, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ALUOp, FEXCore::IR::IROps::OP_XOR, FEXCore::IR::IROps::OP_ATOMICFETCHXOR, 0>}, - {0x38, 6, &OpDispatchBuilder::CMPOp<0>}, + {0x38, 6, &OpDispatchBuilder::Bind<&OpDispatchBuilder::CMPOp, 0>}, {0x50, 8, &OpDispatchBuilder::PUSHREGOp}, {0x58, 8, &OpDispatchBuilder::POPOp}, {0x68, 1, &OpDispatchBuilder::PUSHOp}, @@ -29,13 +29,13 @@ constexpr inline std::tuple OpDispat {0x6C, 4, &OpDispatchBuilder::PermissionRestrictedOp}, {0x70, 16, &OpDispatchBuilder::CondJUMPOp}, - {0x84, 2, &OpDispatchBuilder::TESTOp<0>}, + {0x84, 2, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 0>}, {0x86, 2, &OpDispatchBuilder::XCHGOp}, - {0x88, 4, &OpDispatchBuilder::MOVGPROp<0>}, + {0x88, 4, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPROp, 0>}, - {0x8C, 1, &OpDispatchBuilder::MOVSegOp}, + {0x8C, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVSegOp, false>}, {0x8D, 1, &OpDispatchBuilder::LEAOp}, - {0x8E, 1, &OpDispatchBuilder::MOVSegOp}, + {0x8E, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVSegOp, true>}, {0x8F, 1, &OpDispatchBuilder::POPOp}, {0x90, 8, &OpDispatchBuilder::XCHGOp}, @@ -49,11 +49,11 @@ constexpr inline std::tuple OpDispat {0xA4, 2, &OpDispatchBuilder::MOVSOp}, {0xA6, 2, &OpDispatchBuilder::CMPSOp}, - {0xA8, 2, &OpDispatchBuilder::TESTOp<0>}, + {0xA8, 2, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 0>}, {0xAA, 2, &OpDispatchBuilder::STOSOp}, {0xAC, 2, &OpDispatchBuilder::LODSOp}, {0xAE, 2, &OpDispatchBuilder::SCASOp}, - {0xB0, 16, &OpDispatchBuilder::MOVGPROp<0>}, + {0xB0, 16, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPROp, 0>}, {0xC2, 2, &OpDispatchBuilder::RETOp}, {0xC8, 1, &OpDispatchBuilder::EnterOp}, {0xC9, 1, &OpDispatchBuilder::LEAVEOp}, @@ -82,13 +82,13 @@ constexpr inline std::tuple OpDispat }; constexpr inline std::tuple OpDispatch_BaseOpTable_32[] = { - {0x06, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0x07, 1, &OpDispatchBuilder::POPSegmentOp}, - {0x0E, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0x16, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0x17, 1, &OpDispatchBuilder::POPSegmentOp}, - {0x1E, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0x1F, 1, &OpDispatchBuilder::POPSegmentOp}, + {0x06, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_ES_PREFIX>}, + {0x07, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_ES_PREFIX>}, + {0x0E, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_CS_PREFIX>}, + {0x16, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_SS_PREFIX>}, + {0x17, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_SS_PREFIX>}, + {0x1E, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_DS_PREFIX>}, + {0x1F, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_DS_PREFIX>}, {0x27, 1, &OpDispatchBuilder::DAAOp}, {0x2F, 1, &OpDispatchBuilder::DASOp}, {0x37, 1, &OpDispatchBuilder::AAAOp}, diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/PrimaryGroupTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/PrimaryGroupTables.h index 1d513ead3..83cd63315 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/PrimaryGroupTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/PrimaryGroupTables.h @@ -10,89 +10,89 @@ consteval inline void PrimaryGroupTables_Install(auto& FinalTable) { // GROUP 1 {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 0), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 1), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 2), 1, &OpDispatchBuilder::ADCOp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 3), 1, &OpDispatchBuilder::SBBOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ADCOp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SBBOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 4), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 5), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 6), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 7), 1, &OpDispatchBuilder::CMPOp<1>}, // CMP + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x80), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::CMPOp, 1>}, // CMP {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 0), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 1), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 2), 1, &OpDispatchBuilder::ADCOp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 3), 1, &OpDispatchBuilder::SBBOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ADCOp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SBBOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 4), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 5), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 6), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 7), 1, &OpDispatchBuilder::CMPOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x81), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::CMPOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 0), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 1), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 2), 1, &OpDispatchBuilder::ADCOp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 3), 1, &OpDispatchBuilder::SBBOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ADCOp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SBBOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 4), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 5), 1, &OpDispatchBuilder::SecondaryALUOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 6), 1, &OpDispatchBuilder::SecondaryALUOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 7), 1, &OpDispatchBuilder::CMPOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_1, OpToIndex(0x83), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::CMPOp, 1>}, // GROUP 2 - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, true, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, true, false>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 2), 1, &OpDispatchBuilder::RCLOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 3), 1, &OpDispatchBuilder::RCROp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 4), 1, &OpDispatchBuilder::SHLImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 5), 1, &OpDispatchBuilder::SHRImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 6), 1, &OpDispatchBuilder::SHLImmediateOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHRImmediateOp, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, false>}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC0), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, true, false>}, // SAR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, true, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, true, false>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 2), 1, &OpDispatchBuilder::RCLOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 3), 1, &OpDispatchBuilder::RCROp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 4), 1, &OpDispatchBuilder::SHLImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 5), 1, &OpDispatchBuilder::SHRImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 6), 1, &OpDispatchBuilder::SHLImmediateOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHRImmediateOp, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, false>}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xC1), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, true, false>}, // SAR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, true, true>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, true, true>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 2), 1, &OpDispatchBuilder::RCLOp1Bit}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 3), 1, &OpDispatchBuilder::RCROp8x1Bit}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 4), 1, &OpDispatchBuilder::SHLImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 5), 1, &OpDispatchBuilder::SHRImmediateOp}, // 1Bit SHR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 6), 1, &OpDispatchBuilder::SHLImmediateOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, true>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHRImmediateOp, true>}, // 1Bit SHR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, true>}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD0), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, true, true>}, // SAR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, true, true>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, true, true>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 2), 1, &OpDispatchBuilder::RCLOp1Bit}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 3), 1, &OpDispatchBuilder::RCROp1Bit}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 4), 1, &OpDispatchBuilder::SHLImmediateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 5), 1, &OpDispatchBuilder::SHRImmediateOp}, // 1Bit SHR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 6), 1, &OpDispatchBuilder::SHLImmediateOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, true>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHRImmediateOp, true>}, // 1Bit SHR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SHLImmediateOp, true>}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD1), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, true, true>}, // SAR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, false, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, false, false>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 2), 1, &OpDispatchBuilder::RCLSmallerOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 3), 1, &OpDispatchBuilder::RCRSmallerOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 4), 1, &OpDispatchBuilder::SHLOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 5), 1, &OpDispatchBuilder::SHROp}, // SHR by CL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 6), 1, &OpDispatchBuilder::SHLOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 5), 1, &OpDispatchBuilder::SHROp}, // SHR by CL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 6), 1, &OpDispatchBuilder::SHLOp}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD2), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, false, false>}, // SAR - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 0), 1, &OpDispatchBuilder::RotateOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 1), 1, &OpDispatchBuilder::RotateOp}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, true, false, false>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::RotateOp, false, false, false>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 2), 1, &OpDispatchBuilder::RCLOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 3), 1, &OpDispatchBuilder::RCROp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 4), 1, &OpDispatchBuilder::SHLOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 5), 1, &OpDispatchBuilder::SHROp}, // SHR by CL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 6), 1, &OpDispatchBuilder::SHLOp}, // SAL - {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 7), 1, &OpDispatchBuilder::ASHROp}, // SAR + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 5), 1, &OpDispatchBuilder::SHROp}, // SHR by CL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 6), 1, &OpDispatchBuilder::SHLOp}, // SAL + {OPD(FEXCore::X86Tables::TYPE_GROUP_2, OpToIndex(0xD3), 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::ASHROp, false, false>}, // SAR // GROUP 3 - {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 0), 1, &OpDispatchBuilder::TESTOp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 1), 1, &OpDispatchBuilder::TESTOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 2), 1, &OpDispatchBuilder::NOTOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 3), 1, &OpDispatchBuilder::NEGOp}, // NEG {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 4), 1, &OpDispatchBuilder::MULOp}, @@ -100,8 +100,8 @@ consteval inline void PrimaryGroupTables_Install(auto& FinalTable) { {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 6), 1, &OpDispatchBuilder::DIVOp}, // DIV {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF6), 7), 1, &OpDispatchBuilder::IDIVOp}, // IDIV - {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 0), 1, &OpDispatchBuilder::TESTOp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 1), 1, &OpDispatchBuilder::TESTOp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::TESTOp, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 2), 1, &OpDispatchBuilder::NOTOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_3, OpToIndex(0xF7), 3), 1, &OpDispatchBuilder::NEGOp}, // NEG @@ -122,8 +122,8 @@ consteval inline void PrimaryGroupTables_Install(auto& FinalTable) { {OPD(FEXCore::X86Tables::TYPE_GROUP_5, OpToIndex(0xFF), 6), 1, &OpDispatchBuilder::PUSHOp}, // GROUP 11 - {OPD(FEXCore::X86Tables::TYPE_GROUP_11, OpToIndex(0xC6), 0), 1, &OpDispatchBuilder::MOVGPROp<1>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_11, OpToIndex(0xC7), 0), 1, &OpDispatchBuilder::MOVGPROp<1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_11, OpToIndex(0xC6), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPROp, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_11, OpToIndex(0xC7), 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::MOVGPROp, 1>}, }; #undef OPD diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h index 3c9b37410..06b6e82a4 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryGroupTables.h @@ -38,25 +38,25 @@ consteval inline void SecondaryGroupTables_Install(auto& FinalTable) { {OPD(FEXCore::X86Tables::TYPE_GROUP_7, PF_F2, 6), 1, &OpDispatchBuilder::PermissionRestrictedOp}, // GROUP 8 - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 4), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTNone>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 4), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTNone>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 4), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTNone>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 4), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTNone>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTNone>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTNone>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTNone>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 4), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTNone>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 5), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTSet>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 5), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTSet>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 5), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTSet>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 5), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTSet>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTSet>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTSet>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTSet>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 5), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTSet>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 6), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTClear>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 6), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTClear>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 6), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTClear>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 6), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTClear>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTClear>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTClear>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTClear>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 6), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTClear>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 7), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTComplement>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 7), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTComplement>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 7), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTComplement>}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 7), 1, &OpDispatchBuilder::BTOp<1, BTAction::BTComplement>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_NONE, 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTComplement>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F3, 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTComplement>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_66, 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTComplement>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_8, PF_F2, 7), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 1, BTAction::BTComplement>}, // GROUP 9 {OPD(FEXCore::X86Tables::TYPE_GROUP_9, PF_NONE, 1), 1, &OpDispatchBuilder::CMPXCHGPairOp}, @@ -110,34 +110,34 @@ consteval inline void SecondaryGroupTables_Install(auto& FinalTable) { {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_66, 7), 1, &OpDispatchBuilder::CLFLUSHOPT}, // GROUP 16 - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 0), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 1), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 2), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 3), 1, &OpDispatchBuilder::Prefetch}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, true, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 2>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 3>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_NONE, 4), 4, &OpDispatchBuilder::NOPOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 0), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 1), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 2), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 3), 1, &OpDispatchBuilder::Prefetch}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, true, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 2>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 3>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F3, 4), 4, &OpDispatchBuilder::NOPOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 0), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 1), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 2), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 3), 1, &OpDispatchBuilder::Prefetch}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, true, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 2>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 3>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_66, 4), 4, &OpDispatchBuilder::NOPOp}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 0), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 1), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 2), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 3), 1, &OpDispatchBuilder::Prefetch}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, true, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 2>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 3), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 3>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_16, PF_F2, 4), 4, &OpDispatchBuilder::NOPOp}, // GROUP P - {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 0), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 1), 1, &OpDispatchBuilder::Prefetch}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 2), 1, &OpDispatchBuilder::Prefetch}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 0), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, false, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 1), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, true, false, 1>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 2), 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::Prefetch, true, false, 1>}, {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_NONE, 3), 5, &OpDispatchBuilder::NOPOp}, {OPD(FEXCore::X86Tables::TYPE_GROUP_P, PF_F3, 0), 8, &OpDispatchBuilder::NOPOp}, @@ -153,10 +153,14 @@ inline void SecondaryGroupTables_Install64(auto& FinalTable) { constexpr std::tuple Table[] = { // GROUP 15 - {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 0), 1, &OpDispatchBuilder::ReadSegmentReg}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 1), 1, &OpDispatchBuilder::ReadSegmentReg}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 2), 1, &OpDispatchBuilder::WriteSegmentReg}, - {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 3), 1, &OpDispatchBuilder::WriteSegmentReg}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 0), 1, + &OpDispatchBuilder::Bind<&OpDispatchBuilder::ReadSegmentReg, OpDispatchBuilder::Segment::FS>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 1), 1, + &OpDispatchBuilder::Bind<&OpDispatchBuilder::ReadSegmentReg, OpDispatchBuilder::Segment::GS>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 2), 1, + &OpDispatchBuilder::Bind<&OpDispatchBuilder::WriteSegmentReg, OpDispatchBuilder::Segment::FS>}, + {OPD(FEXCore::X86Tables::TYPE_GROUP_15, PF_F3, 3), 1, + &OpDispatchBuilder::Bind<&OpDispatchBuilder::WriteSegmentReg, OpDispatchBuilder::Segment::GS>}, }; InstallToTable(FinalTable, Table); diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryTables.h b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryTables.h index b9a7af31f..fc4ea12bb 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryTables.h +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/SecondaryTables.h @@ -29,19 +29,19 @@ consteval inline void SecondaryTables_Install(auto& FinalTable) { {0x80, 16, &OpDispatchBuilder::CondJUMPOp}, {0x90, 16, &OpDispatchBuilder::SETccOp}, {0xA2, 1, &OpDispatchBuilder::CPUIDOp}, - {0xA3, 1, &OpDispatchBuilder::BTOp<0, BTAction::BTNone>}, // BT + {0xA3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 0, BTAction::BTNone>}, // BT {0xA4, 1, &OpDispatchBuilder::SHLDImmediateOp}, {0xA5, 1, &OpDispatchBuilder::SHLDOp}, - {0xAB, 1, &OpDispatchBuilder::BTOp<0, BTAction::BTSet>}, // BTS + {0xAB, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 0, BTAction::BTSet>}, // BTS {0xAC, 1, &OpDispatchBuilder::SHRDImmediateOp}, {0xAD, 1, &OpDispatchBuilder::SHRDOp}, {0xAF, 1, &OpDispatchBuilder::IMUL1SrcOp}, - {0xB0, 2, &OpDispatchBuilder::CMPXCHGOp}, // CMPXCHG - {0xB3, 1, &OpDispatchBuilder::BTOp<0, BTAction::BTClear>}, // BTR + {0xB0, 2, &OpDispatchBuilder::CMPXCHGOp}, // CMPXCHG + {0xB3, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 0, BTAction::BTClear>}, // BTR {0xB6, 2, &OpDispatchBuilder::MOVZXOp}, - {0xBB, 1, &OpDispatchBuilder::BTOp<0, BTAction::BTComplement>}, // BTC - {0xBC, 1, &OpDispatchBuilder::BSFOp}, // BSF - {0xBD, 1, &OpDispatchBuilder::BSROp}, // BSF + {0xBB, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::BTOp, 0, BTAction::BTComplement>}, // BTC + {0xBC, 1, &OpDispatchBuilder::BSFOp}, // BSF + {0xBD, 1, &OpDispatchBuilder::BSROp}, // BSF {0xBE, 2, &OpDispatchBuilder::MOVSXOp}, {0xC0, 2, &OpDispatchBuilder::XADDOp}, {0xC3, 1, &OpDispatchBuilder::MOVGPRNTOp}, @@ -330,10 +330,10 @@ consteval inline void SecondaryOpSizeModTables_Install(auto& FinalTable) { inline void SecondaryTables_Install64(auto& FinalTable) { constexpr std::tuple TwoByteOpTable[] = { {0x05, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::SyscallOp, true>}, - {0xA0, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0xA1, 1, &OpDispatchBuilder::POPSegmentOp}, - {0xA8, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0xA9, 1, &OpDispatchBuilder::POPSegmentOp}, + {0xA0, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_FS_PREFIX>}, + {0xA1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_FS_PREFIX>}, + {0xA8, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_GS_PREFIX>}, + {0xA9, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_GS_PREFIX>}, }; InstallToTable(FinalTable, TwoByteOpTable); @@ -342,10 +342,10 @@ inline void SecondaryTables_Install64(auto& FinalTable) { inline void SecondaryTables_Install32(auto& FinalTable) { constexpr std::tuple TwoByteOpTable[] = { {0x05, 1, &OpDispatchBuilder::NOPOp}, - {0xA0, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0xA1, 1, &OpDispatchBuilder::POPSegmentOp}, - {0xA8, 1, &OpDispatchBuilder::PUSHSegmentOp}, - {0xA9, 1, &OpDispatchBuilder::POPSegmentOp}, + {0xA0, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_FS_PREFIX>}, + {0xA1, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_FS_PREFIX>}, + {0xA8, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::PUSHSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_GS_PREFIX>}, + {0xA9, 1, &OpDispatchBuilder::Bind<&OpDispatchBuilder::POPSegmentOp, FEXCore::X86Tables::DecodeFlags::FLAG_GS_PREFIX>}, }; InstallToTable(FinalTable, TwoByteOpTable);