From b7b9d4089ff00efd2175ae7b20b1e264dd0987b1 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Sat, 3 Jul 2021 21:48:18 -0700 Subject: [PATCH] unittests: Adds more imul unit tests for flags --- unittests/32Bit_ASM/PrimaryGroup/3_F6_05.asm | 70 ++++++++++++++++++++ unittests/ASM/PrimaryGroup/3_F6_05_2.asm | 69 +++++++++++++++++++ unittests/ASM/PrimaryGroup/3_F6_05_3.asm | 69 +++++++++++++++++++ unittests/ASM/PrimaryGroup/3_F6_05_4.asm | 69 +++++++++++++++++++ unittests/ASM/PrimaryGroup/3_F6_05_5.asm | 69 +++++++++++++++++++ unittests/ASM/TwoByte/0F_AF_2.asm | 13 +++- 6 files changed, 358 insertions(+), 1 deletion(-) create mode 100644 unittests/32Bit_ASM/PrimaryGroup/3_F6_05.asm create mode 100644 unittests/ASM/PrimaryGroup/3_F6_05_2.asm create mode 100644 unittests/ASM/PrimaryGroup/3_F6_05_3.asm create mode 100644 unittests/ASM/PrimaryGroup/3_F6_05_4.asm create mode 100644 unittests/ASM/PrimaryGroup/3_F6_05_5.asm diff --git a/unittests/32Bit_ASM/PrimaryGroup/3_F6_05.asm b/unittests/32Bit_ASM/PrimaryGroup/3_F6_05.asm new file mode 100644 index 000000000..884d96c8e --- /dev/null +++ b/unittests/32Bit_ASM/PrimaryGroup/3_F6_05.asm @@ -0,0 +1,70 @@ +%ifdef CONFIG +{ + "RegData": { + "RDI": "0x00000000000003fc" + }, + "Mode": "32BIT" +} +%endif + +%macro ofcfmerge 0 + ; Get CF + setc al + ; Get OF + seto bl + and eax, 1 + and ebx, 1 + + ; Merge in to results + shl edi, 1 + or edi, eax + + ; Merge in to results + shl edi, 1 + or edi, ebx +%endmacro + +mov edi, 0 + +; Max Negative +mov al, 0x80 +mov bl, 0x80 + +imul bl + +ofcfmerge + +; Max Positive +mov al, 0x79 +mov bl, 0x79 + +imul bl + +ofcfmerge + +; Max Positive and Max Negative +mov al, 0x79 +mov bl, 0x80 + +imul bl + +ofcfmerge + +; Max Positive and Max Negative +mov al, 0x80 +mov bl, 0x79 + +imul bl + +ofcfmerge + +; No Overflow + +mov al, 0x1 +mov bl, 0x1 + +imul bl + +ofcfmerge + +hlt diff --git a/unittests/ASM/PrimaryGroup/3_F6_05_2.asm b/unittests/ASM/PrimaryGroup/3_F6_05_2.asm new file mode 100644 index 000000000..0dcd45382 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/3_F6_05_2.asm @@ -0,0 +1,69 @@ +%ifdef CONFIG +{ + "RegData": { + "RDI": "0x00000000000003fc" + } +} +%endif + +%macro ofcfmerge 0 + ; Get CF + setc al + ; Get OF + seto bl + and eax, 1 + and ebx, 1 + + ; Merge in to results + shl edi, 1 + or edi, eax + + ; Merge in to results + shl edi, 1 + or edi, ebx +%endmacro + +mov edi, 0 + +; Max Negative +mov al, 0x80 +mov bl, 0x80 + +imul bl + +ofcfmerge + +; Max Positive +mov al, 0x7F +mov bl, 0x7F + +imul bl + +ofcfmerge + +; Max Positive and Max Negative +mov al, 0x7F +mov bl, 0x80 + +imul bl + +ofcfmerge + +; Max Positive and Max Negative +mov al, 0x80 +mov bl, 0x7F + +imul bl + +ofcfmerge + +; No Overflow + +mov al, 0x1 +mov bl, 0x1 + +imul bl + +ofcfmerge + +hlt diff --git a/unittests/ASM/PrimaryGroup/3_F6_05_3.asm b/unittests/ASM/PrimaryGroup/3_F6_05_3.asm new file mode 100644 index 000000000..d26803e15 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/3_F6_05_3.asm @@ -0,0 +1,69 @@ +%ifdef CONFIG +{ + "RegData": { + "RDI": "0x00000000000003fc" + } +} +%endif + +%macro ofcfmerge 0 + ; Get CF + setc al + ; Get OF + seto bl + and eax, 1 + and ebx, 1 + + ; Merge in to results + shl edi, 1 + or edi, eax + + ; Merge in to results + shl edi, 1 + or edi, ebx +%endmacro + +mov edi, 0 + +; Max Negative +mov ax, 0x8000 +mov bx, 0x8000 + +imul bx + +ofcfmerge + +; Max Positive +mov ax, 0x7FFF +mov bx, 0x7FFF + +imul bx + +ofcfmerge + +; Max Positive and Max Negative +mov ax, 0x7FFF +mov bx, 0x8000 + +imul bx + +ofcfmerge + +; Max Positive and Max Negative +mov ax, 0x8000 +mov bx, 0x7FFF + +imul bx + +ofcfmerge + +; No Overflow + +mov ax, 0x1 +mov bx, 0x1 + +imul bx + +ofcfmerge + +hlt diff --git a/unittests/ASM/PrimaryGroup/3_F6_05_4.asm b/unittests/ASM/PrimaryGroup/3_F6_05_4.asm new file mode 100644 index 000000000..182c0f8a6 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/3_F6_05_4.asm @@ -0,0 +1,69 @@ +%ifdef CONFIG +{ + "RegData": { + "RDI": "0x00000000000003fc" + } +} +%endif + +%macro ofcfmerge 0 + ; Get CF + setc al + ; Get OF + seto bl + and eax, 1 + and ebx, 1 + + ; Merge in to results + shl edi, 1 + or edi, eax + + ; Merge in to results + shl edi, 1 + or edi, ebx +%endmacro + +mov edi, 0 + +; Max Negative +mov eax, 0x80000000 +mov ebx, 0x80000000 + +imul ebx + +ofcfmerge + +; Max Positive +mov eax, 0x7FFFFFFF +mov ebx, 0x7FFFFFFF + +imul ebx + +ofcfmerge + +; Max Positive and Max Negative +mov eax, 0x7FFFFFFF +mov ebx, 0x80000000 + +imul ebx + +ofcfmerge + +; Max Positive and Max Negative +mov eax, 0x80000000 +mov ebx, 0x7FFFFFFF + +imul ebx + +ofcfmerge + +; No Overflow + +mov eax, 0x1 +mov ebx, 0x1 + +imul ebx + +ofcfmerge + +hlt diff --git a/unittests/ASM/PrimaryGroup/3_F6_05_5.asm b/unittests/ASM/PrimaryGroup/3_F6_05_5.asm new file mode 100644 index 000000000..19afc7ef6 --- /dev/null +++ b/unittests/ASM/PrimaryGroup/3_F6_05_5.asm @@ -0,0 +1,69 @@ +%ifdef CONFIG +{ + "RegData": { + "RDI": "0x00000000000003fc" + } +} +%endif + +%macro ofcfmerge 0 + ; Get CF + setc al + ; Get OF + seto bl + and eax, 1 + and ebx, 1 + + ; Merge in to results + shl edi, 1 + or edi, eax + + ; Merge in to results + shl edi, 1 + or edi, ebx +%endmacro + +mov edi, 0 + +; Max Negative +mov rax, 0x8000000000000000 +mov rbx, 0x8000000000000000 + +imul rbx + +ofcfmerge + +; Max Positive +mov rax, 0x7FFFFFFFFFFFFFFF +mov rbx, 0x7FFFFFFFFFFFFFFF + +imul rbx + +ofcfmerge + +; Max Positive and Max Negative +mov rax, 0x7FFFFFFFFFFFFFFF +mov rbx, 0x8000000000000000 + +imul rbx + +ofcfmerge + +; Max Positive and Max Negative +mov rax, 0x8000000000000000 +mov rbx, 0x7FFFFFFFFFFFFFFF + +imul rbx + +ofcfmerge + +; No Overflow + +mov rax, 0x1 +mov rbx, 0x1 + +imul rbx + +ofcfmerge + +hlt diff --git a/unittests/ASM/TwoByte/0F_AF_2.asm b/unittests/ASM/TwoByte/0F_AF_2.asm index 7a042c731..7383ef469 100644 --- a/unittests/ASM/TwoByte/0F_AF_2.asm +++ b/unittests/ASM/TwoByte/0F_AF_2.asm @@ -1,7 +1,7 @@ %ifdef CONFIG { "RegData": { - "R15": "0x0000000000c00030" + "R15": "0x000f000000c00030" } } %endif @@ -28,6 +28,17 @@ mov r8, 0xe0000000 mov r15, 0 +; Negative * Negative +mov eax, 0x00008000 +mov ebx, 0x00008000 +imul ax, bx +ofcfmerge + +mov eax, 0x80000000 +mov ebx, 0x80000000 +imul eax, ebx +ofcfmerge + ; Positive * Positive mov rax, 128 mov rbx, 32