diff --git a/External/FEXCore/Source/Interface/Core/Core.cpp b/External/FEXCore/Source/Interface/Core/Core.cpp
index 00b531bbc..607876753 100644
--- a/External/FEXCore/Source/Interface/Core/Core.cpp
+++ b/External/FEXCore/Source/Interface/Core/Core.cpp
@@ -1017,6 +1017,9 @@ namespace FEXCore::Context {
       ));
     }
 
+    // Clear any relocations that might have been generated
+    Thread->CPUBackend->ClearRelocations();
+
     if (IRCaptureCache.PostCompileCode(
         Thread,
         CodePtr,
diff --git a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp
index e510e437d..f60788ab7 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp
+++ b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JIT.cpp
@@ -832,7 +832,6 @@ void *Arm64JITCore::CompileCode(uint64_t Entry, [[maybe_unused]] FEXCore::IR::IR
     DebugData->HostCodeSize = reinterpret_cast<uintptr_t>(CodeEnd) - reinterpret_cast<uintptr_t>(GuestEntry);
     DebugData->Relocations = &Relocations;
   }
-  Relocations.clear();
 
   this->IR = nullptr;
 
diff --git a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h
index 405786df9..2c7709a48 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h
+++ b/External/FEXCore/Source/Interface/Core/JIT/Arm64/JITClass.h
@@ -68,6 +68,8 @@ public:
 
   static void InitializeSignalHandlers(FEXCore::Context::Context *CTX);
 
+  void ClearRelocations() override { Relocations.clear(); }
+
 private:
   FEX_CONFIG_OPT(ParanoidTSO, PARANOIDTSO);
 
diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
index d9b0433ca..8fdf22e83 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
+++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JIT.cpp
@@ -804,7 +804,6 @@ void *X86JITCore::CompileCode(uint64_t Entry, [[maybe_unused]] FEXCore::IR::IRLi
     DebugData->HostCodeSize = reinterpret_cast<uintptr_t>(GuestExit) - reinterpret_cast<uintptr_t>(GuestEntry);
     DebugData->Relocations = &Relocations;
   }
-  Relocations.clear();
 
   return GuestEntry;
 }
diff --git a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h
index 4cab4e3b8..80b830537 100644
--- a/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h
+++ b/External/FEXCore/Source/Interface/Core/JIT/x86_64/JITClass.h
@@ -84,6 +84,8 @@ public:
 
   static void InitializeSignalHandlers(FEXCore::Context::Context *CTX);
 
+  void ClearRelocations() override { Relocations.clear(); }
+
 private:
 
   /**
diff --git a/External/FEXCore/include/FEXCore/Core/CPUBackend.h b/External/FEXCore/include/FEXCore/Core/CPUBackend.h
index 43e0d54f6..f7001053f 100644
--- a/External/FEXCore/include/FEXCore/Core/CPUBackend.h
+++ b/External/FEXCore/include/FEXCore/Core/CPUBackend.h
@@ -112,6 +112,11 @@ class LLVMCore;
      */
     virtual bool NeedsRetainedIRCopy() const { return false; }
 
+    /**
+     * @brief Clear any relocations after JIT compiling
+     */
+    virtual void ClearRelocations() {}
+
     using AsmDispatch = FEX_NAKED void(*)(FEXCore::Core::CpuStateFrame *Frame);
     using JITCallback = FEX_NAKED void(*)(FEXCore::Core::CpuStateFrame *Frame, uint64_t RIP);