From a1c6378317a29314fb5976554dda75a61ebb48e2 Mon Sep 17 00:00:00 2001 From: Billy Laws Date: Wed, 9 Apr 2025 21:59:11 +0100 Subject: [PATCH] Frontend: Only accept POP opcodes with a 0 ModRM.reg field --- FEXCore/Source/Interface/Core/Frontend.cpp | 3 +++ .../Interface/Core/X86Tables/BaseTables.cpp | 2 +- .../Source/Interface/Core/X86Tables/X86Tables.h | 16 +++++++++------- 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/FEXCore/Source/Interface/Core/Frontend.cpp b/FEXCore/Source/Interface/Core/Frontend.cpp index 0e901dc89..958044da6 100644 --- a/FEXCore/Source/Interface/Core/Frontend.cpp +++ b/FEXCore/Source/Interface/Core/Frontend.cpp @@ -439,6 +439,9 @@ bool Decoder::NormalOp(const FEXCore::X86Tables::X86InstInfo* Info, uint16_t Op, FEXCore::X86Tables::ModRMDecoded ModRM; ModRM.Hex = DecodeInst->ModRM; + if (ModRM.reg != 0b000 && (Info->Flags & FEXCore::X86Tables::InstFlags::FLAGS_SF_MOD_ZERO_REG)) { + return false; + } if (ModRM.mod == 0b11 && (Info->Flags & FEXCore::X86Tables::InstFlags::FLAGS_SF_MOD_MEM_ONLY)) { return false; diff --git a/FEXCore/Source/Interface/Core/X86Tables/BaseTables.cpp b/FEXCore/Source/Interface/Core/X86Tables/BaseTables.cpp index 441c70247..16c472a63 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/BaseTables.cpp +++ b/FEXCore/Source/Interface/Core/X86Tables/BaseTables.cpp @@ -137,7 +137,7 @@ std::array BaseOps = []() consteval { {0x8C, 1, X86InstInfo{"MOV", TYPE_INST, GenFlagsSrcSize(SIZE_16BIT) | FLAGS_MODRM | FLAGS_SF_MOD_DST, 0, nullptr}}, {0x8D, 1, X86InstInfo{"LEA", TYPE_INST, GenFlagsSameSize(SIZE_64BITDEF) | FLAGS_MODRM, 0, nullptr}}, {0x8E, 1, X86InstInfo{"MOV", TYPE_INST, GenFlagsSameSize(SIZE_16BIT) | FLAGS_MODRM, 0, nullptr}}, - {0x8F, 1, X86InstInfo{"POP", TYPE_INST, GenFlagsSameSize(SIZE_64BITDEF) | FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_DEBUG_MEM_ACCESS, 0, nullptr}}, + {0x8F, 1, X86InstInfo{"POP", TYPE_INST, GenFlagsSameSize(SIZE_64BITDEF) | FLAGS_MODRM | FLAGS_SF_MOD_DST | FLAGS_SF_MOD_ZERO_REG | FLAGS_DEBUG_MEM_ACCESS, 0, nullptr}}, {0x90, 8, X86InstInfo{"XCHG", TYPE_INST, FLAGS_SF_REX_IN_BYTE | FLAGS_SF_SRC_RAX, 0, nullptr}}, {0x98, 1, X86InstInfo{"CDQE", TYPE_INST, FLAGS_SF_DST_RAX | FLAGS_SF_SRC_RAX, 0, nullptr}}, {0x99, 1, X86InstInfo{"CQO", TYPE_INST, FLAGS_SF_DST_RDX | FLAGS_SF_SRC_RAX, 0, nullptr}}, diff --git a/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h b/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h index 4f0ad8c32..d028cdbb6 100644 --- a/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h +++ b/FEXCore/Source/Interface/Core/X86Tables/X86Tables.h @@ -340,17 +340,19 @@ constexpr InstFlagType FLAGS_MODRM = (1ULL << 16); constexpr InstFlagType FLAGS_SF_MOD_MEM_ONLY = (1ULL << 18); constexpr InstFlagType FLAGS_SF_MOD_REG_ONLY = (1ULL << 19); + constexpr InstFlagType FLAGS_SF_MOD_ZERO_REG = (1ULL << 20); + // x87 -constexpr InstFlagType FLAGS_POP = (1ULL << 20); +constexpr InstFlagType FLAGS_POP = (1ULL << 21); // Whether or not the instruction has a VEX prefix for the dest, first, or second source. -constexpr InstFlagType FLAGS_VEX_SRC_MASK = (0b11ULL << 21); -constexpr InstFlagType FLAGS_VEX_NO_OPERAND = (0b00ULL << 21); -constexpr InstFlagType FLAGS_VEX_DST = (0b01ULL << 21); -constexpr InstFlagType FLAGS_VEX_1ST_SRC = (0b10ULL << 21); -constexpr InstFlagType FLAGS_VEX_2ND_SRC = (0b11ULL << 21); +constexpr InstFlagType FLAGS_VEX_SRC_MASK = (0b11ULL << 22); +constexpr InstFlagType FLAGS_VEX_NO_OPERAND = (0b00ULL << 22); +constexpr InstFlagType FLAGS_VEX_DST = (0b01ULL << 22); +constexpr InstFlagType FLAGS_VEX_1ST_SRC = (0b10ULL << 22); +constexpr InstFlagType FLAGS_VEX_2ND_SRC = (0b11ULL << 22); // Whether or not the instruction has a VSIB byte -constexpr InstFlagType FLAGS_VEX_VSIB = (1ULL << 23); +constexpr InstFlagType FLAGS_VEX_VSIB = (1ULL << 24); constexpr InstFlagType FLAGS_SIZE_DST_OFF = 58; constexpr InstFlagType FLAGS_SIZE_SRC_OFF = FLAGS_SIZE_DST_OFF + 3;