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https://github.com/FEX-Emu/FEX.git
synced 2026-10-06 17:00:19 +02:00
IRDumper: Remove unnecessary use of maybe_unused
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1 parent
7f3f619518
commit
9b503f3702
1 file changed
+13
-18
@@ -29,23 +29,18 @@ namespace FEXCore::IR {
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#include <FEXCore/IR/IRDefines.inc>
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, const SHA256Sum& Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, const SHA256Sum& Arg) {
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*out << "sha256:";
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for (auto byte : Arg.data) {
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*out << std::hex << std::setfill('0') << std::setw(2) << (unsigned int)byte;
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, uint64_t Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, uint64_t Arg) {
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*out << "#0x" << std::hex << Arg << std::dec;
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}
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[[maybe_unused]]
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, const char* Arg) {
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*out << Arg;
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, CondClassType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, CondClassType Arg) {
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if (Arg == COND_AL) {
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*out << "ALWAYS";
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return;
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@@ -58,7 +53,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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*out << CondNames[Arg];
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, MemOffsetType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, MemOffsetType Arg) {
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static constexpr std::array<std::string_view, 3> Names = {
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"SXTX",
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"UXTW",
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@@ -68,7 +63,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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*out << Names[Arg];
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, RegisterClassType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, RegisterClassType Arg) {
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if (Arg == GPRClass.Val) {
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*out << "GPR";
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} else if (Arg == GPRFixedClass.Val) {
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@@ -131,7 +126,7 @@ static void PrintArg(fextl::stringstream* out, const IRListView* IR, OrderedNode
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::FenceType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::FenceType Arg) {
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if (Arg == IR::Fence_Load) {
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*out << "Loads";
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} else if (Arg == IR::Fence_Store) {
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@@ -143,7 +138,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::RoundType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::RoundType Arg) {
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switch (Arg) {
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case FEXCore::IR::Round_Nearest: *out << "Nearest"; break;
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case FEXCore::IR::Round_Negative_Infinity: *out << "-Inf"; break;
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@@ -154,7 +149,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::SyscallFlags Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::SyscallFlags Arg) {
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switch (Arg) {
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case FEXCore::IR::SyscallFlags::DEFAULT: *out << "Default"; break;
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case FEXCore::IR::SyscallFlags::OPTIMIZETHROUGH: *out << "Optimize Through"; break;
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@@ -165,7 +160,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::NamedVectorConstant Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::NamedVectorConstant Arg) {
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*out << [Arg] {
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// clang-format off
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switch (Arg) {
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@@ -230,7 +225,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}();
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::OpSize Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::OpSize Arg) {
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switch (Arg) {
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case OpSize::i8Bit: *out << "i8"; break;
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case OpSize::i16Bit: *out << "i16"; break;
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@@ -243,7 +238,7 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::FloatCompareOp Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::FloatCompareOp Arg) {
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switch (Arg) {
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case FloatCompareOp::EQ: *out << "FEQ"; break;
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case FloatCompareOp::LT: *out << "FLT"; break;
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@@ -255,14 +250,14 @@ static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView
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}
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::BreakDefinition Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::BreakDefinition Arg) {
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*out << "{" << Arg.ErrorRegister << ".";
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*out << static_cast<uint32_t>(Arg.Signal) << ".";
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*out << static_cast<uint32_t>(Arg.TrapNumber) << ".";
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*out << static_cast<uint32_t>(Arg.si_code) << "}";
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}
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static void PrintArg(fextl::stringstream* out, [[maybe_unused]] const IRListView* IR, FEXCore::IR::ShiftType Arg) {
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static void PrintArg(fextl::stringstream* out, const IRListView*, FEXCore::IR::ShiftType Arg) {
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switch (Arg) {
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case ShiftType::LSL: *out << "LSL"; break;
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case ShiftType::LSR: *out << "LSR"; break;
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