From 9933ef07ea770e48c5985bc85611bcac683642bb Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Sat, 30 Sep 2023 08:31:12 -0700 Subject: [PATCH] Tools: Enable indirect vixl runtime calls if simulator is used So tests can still run. --- Source/Tools/FEXLoader/CMakeLists.txt | 11 +++++++++++ Source/Tools/FEXLoader/FEXLoader.cpp | 4 ++++ Source/Tools/FEXLoader/IRLoader.cpp | 4 ++++ Source/Tools/FEXLoader/TestHarnessRunner.cpp | 4 ++++ 4 files changed, 23 insertions(+) diff --git a/Source/Tools/FEXLoader/CMakeLists.txt b/Source/Tools/FEXLoader/CMakeLists.txt index 6ad1763a7..9fc8c8d26 100644 --- a/Source/Tools/FEXLoader/CMakeLists.txt +++ b/Source/Tools/FEXLoader/CMakeLists.txt @@ -1,5 +1,10 @@ list(APPEND LIBS FEXCore Common) +set (DEFINES) +if (ENABLE_VIXL_SIMULATOR) + list(APPEND DEFINES -DVIXL_SIMULATOR=1) +endif() + if (NOT MINGW_BUILD) add_subdirectory(LinuxSyscalls) @@ -14,6 +19,8 @@ if (NOT MINGW_BUILD) VDSO_Emulation.cpp AOT/AOTGenerator.cpp) + target_compile_definitions(${NAME} PRIVATE ${DEFINES}) + # Enable FEX APIs to be used by targets that use target_link_libraries on FEXLoader set_target_properties(${NAME} PROPERTIES ENABLE_EXPORTS 1) @@ -161,6 +168,8 @@ if (BUILD_TESTS) endif() add_executable(TestHarnessRunner ${SRCS}) + target_compile_definitions(TestHarnessRunner PRIVATE ${DEFINES}) + target_include_directories(TestHarnessRunner PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/Source/ @@ -176,6 +185,8 @@ if (BUILD_TESTS) add_executable(IRLoader IRLoader.cpp ) + target_compile_definitions(IRLoader PRIVATE ${DEFINES}) + target_include_directories(IRLoader PRIVATE ${CMAKE_CURRENT_SOURCE_DIR}/Source/ diff --git a/Source/Tools/FEXLoader/FEXLoader.cpp b/Source/Tools/FEXLoader/FEXLoader.cpp index 685bdaa95..66ea6a811 100644 --- a/Source/Tools/FEXLoader/FEXLoader.cpp +++ b/Source/Tools/FEXLoader/FEXLoader.cpp @@ -279,6 +279,10 @@ int main(int argc, char **argv, char **const envp) { FEXCore::Config::ReloadMetaLayer(); FEXCore::Config::Set(FEXCore::Config::CONFIG_IS_INTERPRETER, IsInterpreter ? "1" : "0"); FEXCore::Config::Set(FEXCore::Config::CONFIG_INTERPRETER_INSTALLED, IsInterpreterInstalled() ? "1" : "0"); +#ifdef VIXL_SIMULATOR + // If running under the vixl simulator, ensure that indirect runtime calls are enabled. + FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_DISABLE_VIXL_INDIRECT_RUNTIME_CALLS, "0"); +#endif // Early check for process stall // Doesn't use CONFIG_ROOTFS and we don't want it to spin up a squashfs instance diff --git a/Source/Tools/FEXLoader/IRLoader.cpp b/Source/Tools/FEXLoader/IRLoader.cpp index f4e7b99ea..81cd9a026 100644 --- a/Source/Tools/FEXLoader/IRLoader.cpp +++ b/Source/Tools/FEXLoader/IRLoader.cpp @@ -148,6 +148,10 @@ int main(int argc, char **argv, char **const envp) // This is to ensure that static register allocation in the JIT // is configured correctly for accesses to the top 8 GPRs and 8 XMM registers. FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_IS64BIT_MODE, "1"); +#ifdef VIXL_SIMULATOR + // If running under the vixl simulator, ensure that indirect runtime calls are enabled. + FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_DISABLE_VIXL_INDIRECT_RUNTIME_CALLS, "0"); +#endif auto Args = FEX::ArgLoader::Get(); auto ParsedArgs = FEX::ArgLoader::GetParsedArgs(); diff --git a/Source/Tools/FEXLoader/TestHarnessRunner.cpp b/Source/Tools/FEXLoader/TestHarnessRunner.cpp index 7efdc6a68..86aa628ac 100644 --- a/Source/Tools/FEXLoader/TestHarnessRunner.cpp +++ b/Source/Tools/FEXLoader/TestHarnessRunner.cpp @@ -211,6 +211,10 @@ int main(int argc, char **argv, char **const envp) { FEXCore::Config::ReloadMetaLayer(); FEXCore::Config::Set(FEXCore::Config::CONFIG_IS64BIT_MODE, Loader.Is64BitMode() ? "1" : "0"); +#ifdef VIXL_SIMULATOR + // If running under the vixl simulator, ensure that indirect runtime calls are enabled. + FEXCore::Config::EraseSet(FEXCore::Config::CONFIG_DISABLE_VIXL_INDIRECT_RUNTIME_CALLS, "0"); +#endif FEX_CONFIG_OPT(Core, CORE);