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InstCountCI: Support encoding expected Arm64 ASM in JSON
This will allow investigating the Arm64 directly next to the test, plus publicly linking directly to badly behaving tests. Perfect for nerdsniping implementations.
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@@ -270,7 +270,6 @@ static bool TestInstructions(FEXCore::Context::Context *CTX, FEXCore::Core::Inte
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}
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bool TestsPassed {true};
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bool InstructionCountChanged {};
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// Get all the data for the instructions compiled.
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CurrentTest = &TestHeaderData->Tests[0];
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@@ -294,7 +293,6 @@ static bool TestInstructions(FEXCore::Context::Context *CTX, FEXCore::Core::Inte
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if (INSTStats->first.HostCodeInstructions != CurrentTest->ExpectedInstructionCount) {
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LogMan::Msg::EFmt("Fail: '{}': {} host instructions", CurrentTest->TestInst, INSTStats->first.HostCodeInstructions);
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LogMan::Msg::EFmt("Fail: Test took {} instructions but we expected {} instructions!", INSTStats->first.HostCodeInstructions, CurrentTest->ExpectedInstructionCount);
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InstructionCountChanged = true;
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if (CurrentTest->Optimal) {
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// Don't count the test as a failure if it's known non-optimal.
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@@ -310,11 +308,6 @@ static bool TestInstructions(FEXCore::Context::Context *CTX, FEXCore::Core::Inte
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// Unlink the file.
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unlink(UpdatedInstructionCountsPath);
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if (!InstructionCountChanged) {
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// If no instruction count changed then just return the results.
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return TestsPassed;
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}
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FEXCore::File::File FD(UpdatedInstructionCountsPath, FEXCore::File::FileModes::WRITE | FEXCore::File::FileModes::CREATE | FEXCore::File::FileModes::TRUNCATE);
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if (!FD.IsValid()) {
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@@ -331,10 +324,22 @@ static bool TestInstructions(FEXCore::Context::Context *CTX, FEXCore::Core::Inte
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// Get the instruction stats.
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auto INSTStats = CodeSize::Validation.GetDataForRIP(CodeRIP);
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FD.Write(fextl::fmt::format("\t\"{}\": {{\n", CurrentTest->TestInst));
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if (INSTStats->first.HostCodeInstructions != CurrentTest->ExpectedInstructionCount) {
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FD.Write(fextl::fmt::format("\t\"{}\": {},\n", CurrentTest->TestInst, INSTStats->first.HostCodeInstructions));
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FD.Write(fextl::fmt::format("\t\t\"ExpectedInstructionCount\": {},\n", INSTStats->first.HostCodeInstructions));
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}
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FD.Write(fextl::fmt::format("\t\t\"ExpectedArm64ASM\": [\n", INSTStats->first.HostCodeInstructions));
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for (auto it = INSTStats->second.begin(); it != INSTStats->second.end(); ++it) {
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const auto &Line = *it;
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const auto NextIt = it + 1;
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FD.Write(fextl::fmt::format("\t\t\t\"{}\"{}\n", Line, NextIt != INSTStats->second.end() ? "," : ""));
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}
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FD.Write(fextl::fmt::format("\t\t]\n", INSTStats->first.HostCodeInstructions));
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FD.Write(fextl::fmt::format("\t}},\n", CurrentTest->TestInst));
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// Go to the next test.
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CurrentTest = reinterpret_cast<TestInfo const*>(&CurrentTest->Code[CurrentTest->CodeSize]);
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}
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