From 83ef2da95fd2197ac0cd210a6c68892a4ff9295a Mon Sep 17 00:00:00 2001 From: Alyssa Rosenzweig Date: Tue, 20 May 2025 16:07:19 -0400 Subject: [PATCH] OpcodeDispatcher: avoid zero shift in SHLD Signed-off-by: Alyssa Rosenzweig --- FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp index 7f51ec6ce..75d5b9231 100644 --- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp +++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp @@ -1443,10 +1443,10 @@ void OpDispatchBuilder::SHLDImmediateOp(OpcodeArgs) { Ref Res {}; if (Size < 32) { Ref ShiftLeft = _Constant(Shift); - auto ShiftRight = _Constant(Size - Shift); + auto ShiftRight = Size - Shift; auto Tmp1 = _Lshl(OpSize::i64Bit, Dest, ShiftLeft); - auto Tmp2 = _Lshr(OpSize::i32Bit, Src, ShiftRight); + Ref Tmp2 = ShiftRight ? _Lshr(OpSize::i32Bit, Src, _Constant(ShiftRight)) : Src; Res = _Or(OpSize::i64Bit, Tmp1, Tmp2); } else {