From 86c20d05195af982b60e2407868be21306dcfcc9 Mon Sep 17 00:00:00 2001
From: Paris Oplopoios <21157395+OFFTKP@users.noreply.github.com>
Date: Fri, 24 Jul 2026 17:04:10 +0300
Subject: [PATCH] Extend FIST tests to check for indefinite value

---
 unittests/ASM/X87/invalid_fist_nan_16bit.asm  | 24 +++++++++++++++++++
 unittests/ASM/X87/invalid_fist_nan_32bit.asm  | 24 +++++++++++++++++++
 unittests/ASM/X87/invalid_fist_nan_64bit.asm  | 24 +++++++++++++++++++
 .../ASM/X87/invalid_fist_overflow_16bit.asm   |  5 +++-
 .../ASM/X87/invalid_fist_overflow_32bit.asm   |  5 +++-
 .../ASM/X87/invalid_fist_overflow_64bit.asm   |  5 +++-
 6 files changed, 84 insertions(+), 3 deletions(-)
 create mode 100644 unittests/ASM/X87/invalid_fist_nan_16bit.asm
 create mode 100644 unittests/ASM/X87/invalid_fist_nan_32bit.asm
 create mode 100644 unittests/ASM/X87/invalid_fist_nan_64bit.asm

diff --git a/unittests/ASM/X87/invalid_fist_nan_16bit.asm b/unittests/ASM/X87/invalid_fist_nan_16bit.asm
new file mode 100644
index 000000000..7cff4fc0a
--- /dev/null
+++ b/unittests/ASM/X87/invalid_fist_nan_16bit.asm
@@ -0,0 +1,24 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "1",
+    "RBX": "0x8000"
+  }
+}
+%endif
+
+fldz
+fldz
+fdiv
+
+fistp word [rel .dummy]
+
+fstsw ax
+and rax, 1
+
+movzx ebx, word [rel .dummy]
+
+hlt
+
+align 4096
+.dummy: dw 0
diff --git a/unittests/ASM/X87/invalid_fist_nan_32bit.asm b/unittests/ASM/X87/invalid_fist_nan_32bit.asm
new file mode 100644
index 000000000..e6e5f8f2b
--- /dev/null
+++ b/unittests/ASM/X87/invalid_fist_nan_32bit.asm
@@ -0,0 +1,24 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "1",
+    "RBX": "0x80000000"
+  }
+}
+%endif
+
+fldz
+fldz
+fdiv
+
+fistp dword [rel .dummy]
+
+fstsw ax
+and rax, 1
+
+mov ebx, dword [rel .dummy]
+
+hlt
+
+align 4096
+.dummy: dd 0
diff --git a/unittests/ASM/X87/invalid_fist_nan_64bit.asm b/unittests/ASM/X87/invalid_fist_nan_64bit.asm
new file mode 100644
index 000000000..d0bd90b52
--- /dev/null
+++ b/unittests/ASM/X87/invalid_fist_nan_64bit.asm
@@ -0,0 +1,24 @@
+%ifdef CONFIG
+{
+  "RegData": {
+    "RAX": "1",
+    "RBX": "0x8000000000000000"
+  }
+}
+%endif
+
+fldz
+fldz
+fdiv
+
+fistp qword [rel .dummy]
+
+fstsw ax
+and rax, 1
+
+mov rbx, qword [rel .dummy]
+
+hlt
+
+align 4096
+.dummy: dq 0
diff --git a/unittests/ASM/X87/invalid_fist_overflow_16bit.asm b/unittests/ASM/X87/invalid_fist_overflow_16bit.asm
index b36ed68e3..38cb21c4d 100644
--- a/unittests/ASM/X87/invalid_fist_overflow_16bit.asm
+++ b/unittests/ASM/X87/invalid_fist_overflow_16bit.asm
@@ -1,7 +1,8 @@
 %ifdef CONFIG
 {
   "RegData": {
-    "RAX": "1"
+    "RAX": "1",
+    "RBX": "0x8000"
   }
 }
 %endif
@@ -21,6 +22,8 @@ fistp word [rel .dummy]
 fstsw ax
 and rax, 1
 
+movzx ebx, word [rel .dummy]
+
 hlt
 
 align 4096
diff --git a/unittests/ASM/X87/invalid_fist_overflow_32bit.asm b/unittests/ASM/X87/invalid_fist_overflow_32bit.asm
index 5aa534304..467c96116 100644
--- a/unittests/ASM/X87/invalid_fist_overflow_32bit.asm
+++ b/unittests/ASM/X87/invalid_fist_overflow_32bit.asm
@@ -1,7 +1,8 @@
 %ifdef CONFIG
 {
   "RegData": {
-    "RAX": "1"
+    "RAX": "1",
+    "RBX": "0x80000000"
   }
 }
 %endif
@@ -21,6 +22,8 @@ fistp dword [rel .dummy]
 fstsw ax
 and rax, 1
 
+mov ebx, dword [rel .dummy]
+
 hlt
 
 align 4096
diff --git a/unittests/ASM/X87/invalid_fist_overflow_64bit.asm b/unittests/ASM/X87/invalid_fist_overflow_64bit.asm
index e0980e0da..17d904b6d 100644
--- a/unittests/ASM/X87/invalid_fist_overflow_64bit.asm
+++ b/unittests/ASM/X87/invalid_fist_overflow_64bit.asm
@@ -1,7 +1,8 @@
 %ifdef CONFIG
 {
   "RegData": {
-    "RAX": "1"
+    "RAX": "1",
+    "RBX": "0x8000000000000000"
   }
 }
 %endif
@@ -21,6 +22,8 @@ fistp qword [rel .dummy]
 fstsw ax
 and rax, 1
 
+mov rbx, qword [rel .dummy]
+
 hlt
 
 align 4096