diff --git a/FEXCore/Source/Interface/Core/DiskCache.h b/FEXCore/Source/Interface/Core/DiskCache.h
index 59ee62f18..fd017c3e0 100644
--- a/FEXCore/Source/Interface/Core/DiskCache.h
+++ b/FEXCore/Source/Interface/Core/DiskCache.h
@@ -249,7 +249,7 @@ namespace DiskCache {
   // The current version of the diskcache.
   // This must be changed any time codegen changes occur!
   // Be aware of the impact of changing this frequently!
-  static constexpr uint16_t FormatVersion = 28;
+  static constexpr uint16_t FormatVersion = 29;
 
   static constexpr uint32_t LOOKUP_KEY_MAX_BUCKET_DEPTH = 500;
 
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp
index d8820abd5..1c3d69003 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/X87.cpp
@@ -860,22 +860,103 @@ void OpDispatchBuilder::X87FCMOV(OpcodeArgs) {
 
 void OpDispatchBuilder::X87FXAM(OpcodeArgs) {
   auto a = _ReadStackValue(0);
-  Ref Result =
-    ReducedPrecisionMode ? _VExtractToGPR(OpSize::i64Bit, OpSize::i64Bit, a, 0) : _VExtractToGPR(OpSize::i128Bit, OpSize::i64Bit, a, 1);
+  Ref Value = ReducedPrecisionMode ? _VExtractToGPR(OpSize::i64Bit, OpSize::i64Bit, a, 0) : _VExtractToGPR(OpSize::i128Bit, OpSize::i64Bit, a, 1);
 
-  // Extract the sign bit
-  Result = ReducedPrecisionMode ? _Bfe(OpSize::i64Bit, 1, 63, Result) : _Bfe(OpSize::i64Bit, 1, 15, Result);
+  // Extract the sign bit, which goes in C1
+  Ref Result = ReducedPrecisionMode ? _Bfe(OpSize::i64Bit, 1, 63, Value) : _Bfe(OpSize::i64Bit, 1, 15, Value);
   SetRFLAG<FEXCore::X86State::X87FLAG_C1_LOC>(Result);
 
-  // Claim this is a normal number
-  // We don't support anything else
-  auto TopValid = _StackValidTag(0);
+  auto NotEmpty = _StackValidTag(0);
+  Ref IsEmpty = _Xor(OpSize::i64Bit, NotEmpty, Constant(1));
+  Ref IsNaN {};
+  Ref IsDenormal {};
+  Ref IsInf {};
+  Ref IsZero {};
+  Ref IsUnsupported {};
+  Ref NoSignBit {};
 
-  // In the case of top being invalid then C3:C2:C0 is 0b101
-  auto C3 = Select01(OpSize::i32Bit, CondClass::NEQ, TopValid, Constant(1));
+  // TODO: The codegen for this is not optimal, and can probably be improved
+  // if FXAM ends up on the hot path for some workload.
+
+  if (ReducedPrecisionMode) {
+    constexpr uint64_t ExponentMask = 0x7FF0'0000'0000'0000ULL;
+    NoSignBit = _Bfe(OpSize::i64Bit, 63, 0, Value);
+    IsInf = Select01(OpSize::i64Bit, CondClass::EQ, NoSignBit, Constant(ExponentMask));
+    IsNaN = Select01(OpSize::i64Bit, CondClass::UGT, NoSignBit, Constant(ExponentMask));
+
+    IsZero = Select01(OpSize::i64Bit, CondClass::EQ, NoSignBit, Constant(0));
+    // 64 bit floats can't represent an x87 denormal, nor any of the
+    // unsupported encodings.
+    IsDenormal = Constant(0);
+    IsUnsupported = Constant(0);
+  } else {
+    Ref Mantissa = _VExtractToGPR(OpSize::i128Bit, OpSize::i64Bit, a, 0);
+
+    // "J" is the name given to the msb of the mantissa in the SDM.
+    Ref JBit = _Bfe(OpSize::i64Bit, 1, 63, Mantissa);
+    Ref Exponent = _Bfe(OpSize::i64Bit, 15, 0, Value);
+    Ref IsExponentZero = Select01(OpSize::i64Bit, CondClass::EQ, Exponent, Constant(0));
+    Ref IsExponentMax = Select01(OpSize::i64Bit, CondClass::EQ, Exponent, Constant(0x7FFF));
+
+    // Inf is when mantissa only has the J bit set, exponent is all 1's.
+    Ref IsOnlyJBit = Select01(OpSize::i64Bit, CondClass::EQ, Mantissa, Constant(1ULL << 63));
+    IsInf = _And(OpSize::i64Bit, IsExponentMax, IsOnlyJBit);
+
+    // NaN is when the low 63 bits of the mantissa are non-zero
+    // and exponent is max, and the J bit is set.
+    Ref Fraction = _Bfe(OpSize::i64Bit, 63, 0, Mantissa);
+    Ref FractionNonZero = Select01(OpSize::i64Bit, CondClass::NEQ, Fraction, Constant(0));
+    Ref IsExponentMaxWithJBit = _And(OpSize::i64Bit, IsExponentMax, JBit);
+    IsNaN = _And(OpSize::i64Bit, IsExponentMaxWithJBit, FractionNonZero);
+
+    // Zero and Denormal are basically the same as the 64-bit case.
+    Ref MantissaNonZero = Select01(OpSize::i64Bit, CondClass::NEQ, Mantissa, Constant(0));
+    Ref MantissaZero = _Xor(OpSize::i64Bit, MantissaNonZero, Constant(1));
+    IsZero = _And(OpSize::i64Bit, IsExponentZero, MantissaZero);
+    IsDenormal = _And(OpSize::i64Bit, IsExponentZero, MantissaNonZero);
+
+    // This is where things are weird. If the J bit is not set
+    // and the exponent is non-zero, then this is an "unsupported"
+    // encoding, which I believe is left in for legacy reasons.
+    Ref IsSupported = _Or(OpSize::i64Bit, IsExponentZero, JBit);
+    IsUnsupported = _Xor(OpSize::i64Bit, IsSupported, Constant(1));
+  }
+
+  // NormalFiniteNumber = !Zero && !Denormal && !Inf && !NaN && !Empty && !Unsupported
+  Ref temp1 = _Or(OpSize::i64Bit, IsZero, IsDenormal);
+  Ref temp2 = _Or(OpSize::i64Bit, IsInf, IsNaN);
+  Ref temp3 = _Or(OpSize::i64Bit, IsUnsupported, IsEmpty);
+  temp1 = _Or(OpSize::i64Bit, temp1, temp2);
+  temp2 = _Or(OpSize::i64Bit, temp1, temp3);
+  Ref NormalFiniteNumber = _Xor(OpSize::i64Bit, temp2, Constant(1));
+
+  // Set C3, C2, C0 based on the class of the FP value
+  // Table is from "FXAM" page in the SDM.
+  // +----------------------+----+----+----+
+  // | Class                | C3 | C2 | C0 |
+  // +----------------------+----+----+----+
+  // | Unsupported          | 0  | 0  | 0  |
+  // | NaN                  | 0  | 0  | 1  |
+  // | Normal finite number | 0  | 1  | 0  |
+  // | Infinity             | 0  | 1  | 1  |
+  // | Zero                 | 1  | 0  | 0  |
+  // | Empty                | 1  | 0  | 1  |
+  // | Denormal number      | 1  | 1  | 0  |
+  // +----------------------+----+----+----+
+
+  // C0 = IsNaN || IsInf || IsEmpty
+  Ref C0 = _Or(OpSize::i64Bit, IsNaN, IsInf);
+  C0 = _Or(OpSize::i64Bit, C0, IsEmpty);
+
+  // C2 = (IsInf || Denormal || NormalFiniteNumber) && !IsEmpty
+  Ref C2 = _Or(OpSize::i64Bit, IsInf, IsDenormal);
+  C2 = _Or(OpSize::i64Bit, C2, NormalFiniteNumber);
+  C2 = _And(OpSize::i64Bit, C2, NotEmpty);
+
+  // C3 = Zero || IsEmpty || Denormal
+  Ref C3 = _Or(OpSize::i64Bit, IsZero, IsEmpty);
+  C3 = _Or(OpSize::i64Bit, C3, IsDenormal);
 
-  auto C2 = TopValid;
-  auto C0 = C3; // Mirror C3 until something other than zero is supported
   SetRFLAG<FEXCore::X86State::X87FLAG_C0_LOC>(C0);
   SetRFLAG<FEXCore::X86State::X87FLAG_C2_LOC>(C2);
   SetRFLAG<FEXCore::X86State::X87FLAG_C3_LOC>(C3);
diff --git a/unittests/ASM/Known_Failures_host b/unittests/ASM/Known_Failures_host
index 2158fda4e..2e985db75 100644
--- a/unittests/ASM/Known_Failures_host
+++ b/unittests/ASM/Known_Failures_host
@@ -1,3 +1,2 @@
-Test_X87/FXAM_Simple.asm
 ## Tag bits not completely modelled
 Test_X87/X87MMXInteraction.asm
\ No newline at end of file
diff --git a/unittests/ASM/X87/FXAM_Simple.asm b/unittests/ASM/X87/FXAM_Simple.asm
index 7e76fbaaa..c0c7635de 100644
--- a/unittests/ASM/X87/FXAM_Simple.asm
+++ b/unittests/ASM/X87/FXAM_Simple.asm
@@ -1,13 +1,15 @@
 ;; Simpler versions of FXAM_Push* tests.
-;; In hostrunner tests this will fail because we mentioned below there's no support
-;; for the zero flag. In hostrunner RCX should contain 0x4000 instead of 0x400.
 %ifdef CONFIG
 {
   "RegData": {
     "RAX": "0x6",
     "RBX": "0x0400",
-    "RCX": "0x0400",
-    "RDX": "0x4100"
+    "RCX": "0x4000",
+    "RDX": "0x4100",
+    "R8":  "0x4200440044000700",
+    "R9":  "0x0100030000000000",
+    "R10": "0x0000000004000400",
+    "R11": "0x0000050006004400"
   }
 }
 %endif
@@ -21,15 +23,51 @@ fxam
 fwait
 
 fnstsw ax 
-and ax, 0x4500 ; should be 0x4100 for zero
+and ax, 0x4500 ; should be 0x4100 for empty
 mov edx, eax
 
+;; Get the C0 - C3 flags and
+;; pack up to 4 results into a GPR
+%macro examine_packed 2
+  fld tword [rel %2]
+  fxam
+  fwait
+  fnstsw ax
+  and eax, 0x4700
+  shl %1, 16
+  or %1, rax
+  fstp st0
+%endmacro
+
+xor r8d, r8d
+examine_packed r8, .data_neg_zero
+examine_packed r8, .data_denormal
+examine_packed r8, .data_pseudo_denormal
+examine_packed r8, .data_neg_infinity
+
+xor r9d, r9d
+examine_packed r9, .data_qnan
+examine_packed r9, .data_neg_snan
+examine_packed r9, .data_unnormal
+examine_packed r9, .data_pseudo_infinity
+
+xor r10d, r10d
+examine_packed r10, .data_pseudo_nan
+examine_packed r10, .data_pseudo_zero
+examine_packed r10, .data_min_exponent
+examine_packed r10, .data_max_exponent
+
+xor r11d, r11d
+examine_packed r11, .data_infinity
+examine_packed r11, .data_neg_one
+examine_packed r11, .data_pseudo_denormal_fraction
+
 fldz
 fxam 
 fwait 
 
 fnstsw ax
-and ax, 0x4500 ; should be 0x4000 for zero, but there's no support for it at the moment, so it'll return 0x0400 as it does for a normal number.
+and ax, 0x4500 ; should be 0x4000 for zero
 mov ecx, eax
 
 fld1
@@ -47,3 +85,64 @@ and eax, 0x7
 
 
 hlt
+
+align 16
+.data_neg_zero:
+dq 0
+dw 0x8000
+
+.data_denormal:
+dq 1
+dw 0x0000
+
+.data_pseudo_denormal:
+dq (1 << 63)
+dw 0x0000
+
+.data_neg_infinity:
+dq (1 << 63)
+dw 0xFFFF
+
+.data_qnan:
+dq (11b << 62)
+dw 0x7FFF
+
+.data_neg_snan:
+dq (10b << 62) | 1
+dw 0xFFFF
+
+.data_unnormal:
+dq (1 << 62)
+dw 0x3FFF
+
+.data_pseudo_infinity:
+dq 0
+dw 0x7FFF
+
+.data_pseudo_nan:
+dq (1 << 62)
+dw 0x7FFF
+
+.data_pseudo_zero:
+dq 0
+dw 0x3FFF
+
+.data_min_exponent:
+dq (1 << 63)
+dw 0x0001
+
+.data_max_exponent:
+dq (1 << 63)
+dw 0x7FFE
+
+.data_infinity:
+dq (1 << 63)
+dw 0x7FFF
+
+.data_neg_one:
+dq (1 << 63)
+dw 0xBFFF
+
+.data_pseudo_denormal_fraction:
+dq (1 << 63) | 1
+dw 0x0000
diff --git a/unittests/InstructionCountCI/AFP/H0F3A.json b/unittests/InstructionCountCI/AFP/H0F3A.json
index 2d98dfad4..e3f5c86cd 100644
--- a/unittests/InstructionCountCI/AFP/H0F3A.json
+++ b/unittests/InstructionCountCI/AFP/H0F3A.json
@@ -8,7 +8,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "roundss xmm0, xmm1, 00000000b": {
diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json
index aa127d7bc..8bd3d2da0 100644
--- a/unittests/InstructionCountCI/AFP/SVE256/Secondary.json
+++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary.json
@@ -7,7 +7,7 @@
       "AFP"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtpi2ps xmm0, [rax]": {
diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json
index 8c1f3588d..1ebfdb7de 100644
--- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json
+++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REP.json
@@ -9,7 +9,7 @@
     "DisabledHostFeatures": [
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtsi2ss xmm0, eax": {
diff --git a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json
index cf45cca06..a5f15a72f 100644
--- a/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json
+++ b/unittests/InstructionCountCI/AFP/SVE256/Secondary_REPNE.json
@@ -7,7 +7,7 @@
       "AFP"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtsi2sd xmm0, eax": {
diff --git a/unittests/InstructionCountCI/AFP/Secondary.json b/unittests/InstructionCountCI/AFP/Secondary.json
index 0cb97ecf5..286ab6880 100644
--- a/unittests/InstructionCountCI/AFP/Secondary.json
+++ b/unittests/InstructionCountCI/AFP/Secondary.json
@@ -8,7 +8,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtpi2ps xmm0, [rax]": {
diff --git a/unittests/InstructionCountCI/AFP/Secondary_REP.json b/unittests/InstructionCountCI/AFP/Secondary_REP.json
index 1e65b092b..7813cf1de 100644
--- a/unittests/InstructionCountCI/AFP/Secondary_REP.json
+++ b/unittests/InstructionCountCI/AFP/Secondary_REP.json
@@ -9,7 +9,7 @@
       "SVE256",
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtsi2ss xmm0, eax": {
diff --git a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json
index eda5da07a..78a29f0a0 100644
--- a/unittests/InstructionCountCI/AFP/Secondary_REPNE.json
+++ b/unittests/InstructionCountCI/AFP/Secondary_REPNE.json
@@ -8,7 +8,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtsi2sd xmm0, eax": {
diff --git a/unittests/InstructionCountCI/AFP/VEX_map1.json b/unittests/InstructionCountCI/AFP/VEX_map1.json
index 11e098176..f63e618ea 100644
--- a/unittests/InstructionCountCI/AFP/VEX_map1.json
+++ b/unittests/InstructionCountCI/AFP/VEX_map1.json
@@ -9,7 +9,7 @@
     "DisabledHostFeatures": [
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vsqrtss xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AFP/VEX_map3.json b/unittests/InstructionCountCI/AFP/VEX_map3.json
index 63b2004ad..0f1fee4b6 100644
--- a/unittests/InstructionCountCI/AFP/VEX_map3.json
+++ b/unittests/InstructionCountCI/AFP/VEX_map3.json
@@ -7,7 +7,7 @@
       "AFP"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vroundss xmm0, xmm1, 00000000b": {
diff --git a/unittests/InstructionCountCI/AVX128/FMA4.json b/unittests/InstructionCountCI/AVX128/FMA4.json
index 5e0201f30..dabe0090f 100644
--- a/unittests/InstructionCountCI/AVX128/FMA4.json
+++ b/unittests/InstructionCountCI/AVX128/FMA4.json
@@ -7,7 +7,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vfmaddsubps xmm0, xmm1, xmm2, xmm3": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1.json b/unittests/InstructionCountCI/AVX128/VEX_map1.json
index 2df7b06df..ba6cc7806 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map1.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map1.json
@@ -13,7 +13,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vmovups xmm0, xmm0": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json
index ea04f603e..fccb4b4c6 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map1_FCMA.json
@@ -9,7 +9,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vaddsubpd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json
index c026c6c7e..4e7c7120d 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map1_SVE128.json
@@ -10,7 +10,7 @@
       "FLAGM2",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vmovntps [rax], xmm0": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json
index ece7fc421..6aee8ccb8 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map1_flagm.json
@@ -10,7 +10,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vucomiss xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2.json b/unittests/InstructionCountCI/AVX128/VEX_map2.json
index 13680e6fb..ac5a72120 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2.json
@@ -11,7 +11,7 @@
       "I8MM",
       "DOTPROD"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpshufb xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json
index cfb244d9b..885399929 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2_AFP.json
@@ -8,7 +8,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vfmadd132ss xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json
index 69c6cc126..025454ec3 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2_DOTPROD.json
@@ -12,7 +12,7 @@
       "SVE256",
       "I8MM"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpdpbusd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json
index a81c6b841..6a341e68d 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2_I8MM.json
@@ -11,7 +11,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpdpbusd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
index d752cc0d8..7c7f9a56c 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2_SVE128.json
@@ -10,7 +10,7 @@
       "FLAGM2",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vmovntdqa xmm0, [rax]": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json
index 1936d1636..4f12dc3c1 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map2_flagm.json
@@ -11,7 +11,7 @@
       "SVE256",
       "SVEBITPERM"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vtestps xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3.json b/unittests/InstructionCountCI/AVX128/VEX_map3.json
index bfa03b24b..321dfaf63 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map3.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map3.json
@@ -7,7 +7,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpermq ymm0, ymm1, 1": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json
index 2e8813eee..e56a25fc0 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map3_SVE128.json
@@ -8,7 +8,7 @@
       "AFP",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vblendvps xmm0, xmm1, xmm2, xmm3": {
diff --git a/unittests/InstructionCountCI/AVX128/VEX_map_group.json b/unittests/InstructionCountCI/AVX128/VEX_map_group.json
index 3e8fbe8e4..b5f7de271 100644
--- a/unittests/InstructionCountCI/AVX128/VEX_map_group.json
+++ b/unittests/InstructionCountCI/AVX128/VEX_map_group.json
@@ -9,7 +9,7 @@
       "SVE256",
       "SVE128"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpsrlw xmm0, xmm1, 0": {
diff --git a/unittests/InstructionCountCI/Atomics.json b/unittests/InstructionCountCI/Atomics.json
index 83e36bee4..42de4dfe3 100644
--- a/unittests/InstructionCountCI/Atomics.json
+++ b/unittests/InstructionCountCI/Atomics.json
@@ -9,7 +9,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "lock add byte [rax], cl": {
diff --git a/unittests/InstructionCountCI/Crypto/H0F38.json b/unittests/InstructionCountCI/Crypto/H0F38.json
index d30a57a2c..5d64faa7d 100644
--- a/unittests/InstructionCountCI/Crypto/H0F38.json
+++ b/unittests/InstructionCountCI/Crypto/H0F38.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "sha1nexte xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json
index e67fd2699..c9f78beba 100644
--- a/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json
+++ b/unittests/InstructionCountCI/Crypto/H0F38_SVE128.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "sha1nexte xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Crypto/H0F3A.json b/unittests/InstructionCountCI/Crypto/H0F3A.json
index 3888f2112..59b9a1cd7 100644
--- a/unittests/InstructionCountCI/Crypto/H0F3A.json
+++ b/unittests/InstructionCountCI/Crypto/H0F3A.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pclmulqdq xmm0, xmm1, 00000b": {
diff --git a/unittests/InstructionCountCI/DDD.json b/unittests/InstructionCountCI/DDD.json
index b0eae85e7..daaa237c6 100644
--- a/unittests/InstructionCountCI/DDD.json
+++ b/unittests/InstructionCountCI/DDD.json
@@ -10,7 +10,7 @@
       "AFP",
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These 3DNow! instructions are optimal assuming that FEX doesn't SRA MMX registers",
diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json
index 221af10ac..b5a6eb313 100644
--- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json
+++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations.json
@@ -8,7 +8,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "Instructions that explicitly push against the limits of ARM's loadstore instructions"
diff --git a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json
index 0dbc9d85f..949505a92 100644
--- a/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json
+++ b/unittests/InstructionCountCI/FEXOpt/AddressingLimitations_32Bit.json
@@ -8,7 +8,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "Instructions that explicitly push against the limits of ARM's loadstore instructions"
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
index b036dc577..440f553d7 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
@@ -13,7 +13,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These are instruction combinations that could be more optimal if FEX optimized for them"
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
index f2abbf4bc..beb34f35a 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_32bit.json
@@ -11,7 +11,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These are instruction combinations that could be more optimal if FEX optimized for them"
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json
index d81eac4b9..8d1957d3b 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_AFP.json
@@ -9,7 +9,7 @@
       "SVE256",
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These are instruction combinations that could be more optimal if FEX optimized for them"
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json
index a7593917e..0ec4f9376 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO.json
@@ -14,7 +14,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These are instruction combinations that could be more optimal if FEX optimized for them"
diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
index fe2aa5065..e91168a81 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst_TSO_32bit.json
@@ -14,7 +14,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "These are instruction combinations that could be more optimal if FEX optimized for them"
diff --git a/unittests/InstructionCountCI/FEXOpt/libnss.json b/unittests/InstructionCountCI/FEXOpt/libnss.json
index 9326ddad9..181ccae9f 100644
--- a/unittests/InstructionCountCI/FEXOpt/libnss.json
+++ b/unittests/InstructionCountCI/FEXOpt/libnss.json
@@ -12,7 +12,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [],
   "Instructions": {
diff --git a/unittests/InstructionCountCI/FlagM/Atomics.json b/unittests/InstructionCountCI/FlagM/Atomics.json
index de24102fa..d8ae3dbee 100644
--- a/unittests/InstructionCountCI/FlagM/Atomics.json
+++ b/unittests/InstructionCountCI/FlagM/Atomics.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "lock add byte [rax], cl": {
diff --git a/unittests/InstructionCountCI/FlagM/FlagOpts.json b/unittests/InstructionCountCI/FlagM/FlagOpts.json
index 54fda4bf5..fc6e981c2 100644
--- a/unittests/InstructionCountCI/FlagM/FlagOpts.json
+++ b/unittests/InstructionCountCI/FlagM/FlagOpts.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Chained add": {
diff --git a/unittests/InstructionCountCI/FlagM/H0F38.json b/unittests/InstructionCountCI/FlagM/H0F38.json
index 55a55b857..c500eb466 100644
--- a/unittests/InstructionCountCI/FlagM/H0F38.json
+++ b/unittests/InstructionCountCI/FlagM/H0F38.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "ptest xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks.json b/unittests/InstructionCountCI/FlagM/HotBlocks.json
index 5716fcbcf..d35521c68 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "The Witcher 3": {
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
index fa7163da4..4f71c0db6 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks_32Bit.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Sonic Mania movie player": {
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json
index 59db30174..e8df7c2b5 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks_AFP.json
@@ -10,7 +10,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "FMOD scalar loop": {
diff --git a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json
index 036c22b6f..d3742d21c 100644
--- a/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/HotBlocks_TSO_32Bit.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "The Sims 1 hot block": {
diff --git a/unittests/InstructionCountCI/FlagM/Primary.json b/unittests/InstructionCountCI/FlagM/Primary.json
index 92d8b3f48..9ebce0470 100644
--- a/unittests/InstructionCountCI/FlagM/Primary.json
+++ b/unittests/InstructionCountCI/FlagM/Primary.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "add bl, cl": {
diff --git a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
index c138d0842..2798899b2 100644
--- a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
+++ b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "add al, 1": {
diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
index 5f9a3ebda..171633568 100644
--- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "push es": {
diff --git a/unittests/InstructionCountCI/FlagM/Secondary.json b/unittests/InstructionCountCI/FlagM/Secondary.json
index bf43f9411..e52f176c4 100644
--- a/unittests/InstructionCountCI/FlagM/Secondary.json
+++ b/unittests/InstructionCountCI/FlagM/Secondary.json
@@ -11,7 +11,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "ucomiss xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
index 1dd751be6..e3f9be565 100644
--- a/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
+++ b/unittests/InstructionCountCI/FlagM/SecondaryGroup.json
@@ -11,7 +11,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "sgdt [rax]": {
diff --git a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
index eb71c8f5f..ddec4d432 100644
--- a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
@@ -11,7 +11,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "xgetbv": {
diff --git a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
index e2b44707b..9c34a60f2 100644
--- a/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
+++ b/unittests/InstructionCountCI/FlagM/Secondary_OpSize.json
@@ -11,7 +11,7 @@
       "AFP",
       "FCMA"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "ucomisd xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP.json b/unittests/InstructionCountCI/FlagM/Secondary_REP.json
index 5477de73a..8196a5bc9 100644
--- a/unittests/InstructionCountCI/FlagM/Secondary_REP.json
+++ b/unittests/InstructionCountCI/FlagM/Secondary_REP.json
@@ -12,7 +12,7 @@
       "AFP",
       "CSSC"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "popcnt ax, bx": {
diff --git a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json
index 87ce82d5e..1bfd915c7 100644
--- a/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json
+++ b/unittests/InstructionCountCI/FlagM/Secondary_REP_CSSC.json
@@ -12,7 +12,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "popcnt ax, bx": {
diff --git a/unittests/InstructionCountCI/FlagM/VEX_map1.json b/unittests/InstructionCountCI/FlagM/VEX_map1.json
index e56f07d95..d00f86189 100644
--- a/unittests/InstructionCountCI/FlagM/VEX_map1.json
+++ b/unittests/InstructionCountCI/FlagM/VEX_map1.json
@@ -12,7 +12,7 @@
       "RPRES",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vucomiss xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/FlagM/VEX_map2.json b/unittests/InstructionCountCI/FlagM/VEX_map2.json
index a5bb9edcb..355395727 100644
--- a/unittests/InstructionCountCI/FlagM/VEX_map2.json
+++ b/unittests/InstructionCountCI/FlagM/VEX_map2.json
@@ -10,7 +10,7 @@
       "AFP",
       "SVEBITPERM"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vtestps xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/FlagM/VEX_map_group.json b/unittests/InstructionCountCI/FlagM/VEX_map_group.json
index 6da6503de..ceb7c12a5 100644
--- a/unittests/InstructionCountCI/FlagM/VEX_map_group.json
+++ b/unittests/InstructionCountCI/FlagM/VEX_map_group.json
@@ -9,7 +9,7 @@
     "DisabledHostFeatures": [
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "blsr eax, ebx": {
diff --git a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
index b50f0514a..985f7ec35 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Crysis2Max-fmodel.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
index 89b2d57b2..6bd9ab5e7 100644
--- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
index c724c49ea..13e1ccbf5 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
index 748675152..d0f0218b5 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
@@ -10,7 +10,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json
index 2b96554be..ddb89f012 100644
--- a/unittests/InstructionCountCI/FlagM/x87.json
+++ b/unittests/InstructionCountCI/FlagM/x87.json
@@ -11,7 +11,7 @@
       "CSSC",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fadd dword [rax]": {
@@ -2607,27 +2607,71 @@
       ]
     },
     "fxam": {
-      "ExpectedInstructionCount": 16,
+      "ExpectedInstructionCount": 60,
       "Comment": [
         "0xd9 11b 0xe5 /4"
       ],
       "ExpectedArm64ASM": [
+        "sub sp, sp, #0x60 (96)",
         "ldrb w20, [x28, #1051]",
         "add x21, x28, x20, lsl #4",
         "ldr q2, [x21, #1056]",
         "mov x21, v2.d[1]",
-        "ubfx x21, x21, #15, #1",
-        "strb w21, [x28, #1049]",
-        "ldrb w21, [x28, #1202]",
-        "lsr w20, w21, w20",
+        "ubfx x22, x21, #15, #1",
+        "strb w22, [x28, #1049]",
+        "ldrb w22, [x28, #1202]",
+        "lsr w20, w22, w20",
         "and w20, w20, #0x1",
-        "mrs x21, nzcv",
-        "cmp w20, #0x1 (1)",
-        "cset x22, ne",
-        "strb w22, [x28, #1048]",
-        "strb w20, [x28, #1050]",
-        "strb w22, [x28, #1054]",
-        "msr nzcv, x21"
+        "eor x22, x20, #0x1",
+        "mov x23, v2.d[0]",
+        "lsr x24, x23, #63",
+        "ubfx x21, x21, #0, #15",
+        "mrs x30, nzcv",
+        "cmp x21, #0x0 (0)",
+        "cset x18, eq",
+        "str w30, [sp]",
+        "mov w30, #0x7fff",
+        "cmp x21, x30",
+        "cset x21, eq",
+        "mov x30, #0x8000000000000000",
+        "cmp x23, x30",
+        "cset x30, eq",
+        "and x30, x21, x30",
+        "str w20, [sp, #32]",
+        "ubfx x20, x23, #0, #63",
+        "cmp x20, #0x0 (0)",
+        "cset x20, ne",
+        "and x21, x21, x24",
+        "and x20, x21, x20",
+        "cmp x23, #0x0 (0)",
+        "cset x21, ne",
+        "eor x23, x21, #0x1",
+        "and x23, x18, x23",
+        "and x21, x18, x21",
+        "orr x24, x18, x24",
+        "eor x24, x24, #0x1",
+        "orr x18, x23, x21",
+        "str x23, [sp, #64]",
+        "orr x23, x30, x20",
+        "orr x24, x24, x22",
+        "orr x23, x18, x23",
+        "orr x23, x23, x24",
+        "eor x23, x23, #0x1",
+        "orr x20, x20, x30",
+        "orr x20, x20, x22",
+        "orr x24, x30, x21",
+        "orr x23, x24, x23",
+        "ldr w24, [sp, #32]",
+        "and x23, x23, x24",
+        "ldr x24, [sp, #64]",
+        "orr x22, x24, x22",
+        "orr x21, x22, x21",
+        "strb w20, [x28, #1048]",
+        "strb w23, [x28, #1050]",
+        "strb w21, [x28, #1054]",
+        "ldr w20, [sp]",
+        "msr nzcv, x20",
+        "add sp, sp, #0x60 (96)"
       ]
     },
     "fld1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json
index 22bdef82a..a698d05d4 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64-Crysis2Max-fmodel.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json
index 0a9e933d6..72d1c4640 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64-HalfLife.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json
index 9edb53fbf..4c65814aa 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64-Oblivion.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json
index 35282e161..98c2afa1b 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64-Psychonauts.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Block1": {
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json
index a305add9b..c89f26586 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64.json
@@ -13,7 +13,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fadd dword [rax]": {
@@ -2006,27 +2006,57 @@
       ]
     },
     "fxam": {
-      "ExpectedInstructionCount": 16,
+      "ExpectedInstructionCount": 46,
       "Comment": [
         "0xd9 11b 0xe5 /4"
       ],
       "ExpectedArm64ASM": [
+        "sub sp, sp, #0x60 (96)",
         "ldrb w20, [x28, #1051]",
         "add x21, x28, x20, lsl #4",
         "ldr d2, [x21, #1056]",
         "mov x21, v2.d[0]",
-        "lsr x21, x21, #63",
-        "strb w21, [x28, #1049]",
-        "ldrb w21, [x28, #1202]",
-        "lsr w20, w21, w20",
+        "lsr x22, x21, #63",
+        "strb w22, [x28, #1049]",
+        "ldrb w22, [x28, #1202]",
+        "lsr w20, w22, w20",
         "and w20, w20, #0x1",
-        "mrs x21, nzcv",
-        "cmp w20, #0x1 (1)",
-        "cset x22, ne",
-        "strb w22, [x28, #1048]",
+        "eor x22, x20, #0x1",
+        "ubfx x21, x21, #0, #63",
+        "mov x23, #0x7ff0000000000000",
+        "mrs x24, nzcv",
+        "cmp x21, x23",
+        "cset x30, eq",
+        "cmp x21, x23",
+        "cset x23, hi",
+        "mov w18, #0x0",
+        "cmp x21, #0x0 (0)",
+        "cset x21, eq",
+        "str w24, [sp]",
+        "orr x24, x21, x18",
+        "orr x18, x30, x23",
+        "str x21, [sp, #32]",
+        "mov w21, #0x0",
+        "str w20, [sp, #64]",
+        "orr x20, x21, x22",
+        "orr x24, x24, x18",
+        "orr x20, x24, x20",
+        "eor x20, x20, #0x1",
+        "orr x23, x23, x30",
+        "orr x23, x23, x22",
+        "orr x24, x30, x21",
+        "orr x20, x24, x20",
+        "ldr w24, [sp, #64]",
+        "and x20, x20, x24",
+        "ldr x24, [sp, #32]",
+        "orr x22, x24, x22",
+        "orr x21, x22, x21",
+        "strb w23, [x28, #1048]",
         "strb w20, [x28, #1050]",
-        "strb w22, [x28, #1054]",
-        "msr nzcv, x21"
+        "strb w21, [x28, #1054]",
+        "ldr w20, [sp]",
+        "msr nzcv, x20",
+        "add sp, sp, #0x60 (96)"
       ]
     },
     "fld1": {
diff --git a/unittests/InstructionCountCI/H0F38.json b/unittests/InstructionCountCI/H0F38.json
index 91aa0f578..69bbefda3 100644
--- a/unittests/InstructionCountCI/H0F38.json
+++ b/unittests/InstructionCountCI/H0F38.json
@@ -10,7 +10,7 @@
       "FLAGM2",
       "CRYPTO"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pshufb mm0, mm1": {
diff --git a/unittests/InstructionCountCI/H0F3A.json b/unittests/InstructionCountCI/H0F3A.json
index 2ebc33d9c..73441990a 100644
--- a/unittests/InstructionCountCI/H0F3A.json
+++ b/unittests/InstructionCountCI/H0F3A.json
@@ -8,7 +8,7 @@
       "AFP",
       "CRYPTO"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "SSE4.2 string instructions are skipped here.",
diff --git a/unittests/InstructionCountCI/H0F3A_SVE128.json b/unittests/InstructionCountCI/H0F3A_SVE128.json
index e2aca800a..f5748682b 100644
--- a/unittests/InstructionCountCI/H0F3A_SVE128.json
+++ b/unittests/InstructionCountCI/H0F3A_SVE128.json
@@ -8,7 +8,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "dpps xmm0, xmm1, 00000000b": {
diff --git a/unittests/InstructionCountCI/MOPS/Primary.json b/unittests/InstructionCountCI/MOPS/Primary.json
index 77dd6e10d..fcfd9d683 100644
--- a/unittests/InstructionCountCI/MOPS/Primary.json
+++ b/unittests/InstructionCountCI/MOPS/Primary.json
@@ -11,7 +11,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "rep movsb": {
diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json
index eb61eba12..5b3cfd71b 100644
--- a/unittests/InstructionCountCI/Primary.json
+++ b/unittests/InstructionCountCI/Primary.json
@@ -10,7 +10,7 @@
       "FLAGM2",
       "MOPS"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "add bl, cl": {
diff --git a/unittests/InstructionCountCI/PrimaryGroup.json b/unittests/InstructionCountCI/PrimaryGroup.json
index 7cda259dc..210cac9be 100644
--- a/unittests/InstructionCountCI/PrimaryGroup.json
+++ b/unittests/InstructionCountCI/PrimaryGroup.json
@@ -9,7 +9,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "Instructions in this table that are marked optimal don't have their flag calculation part of this assumption",
diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json
index 6f11582a1..f2ef8782b 100644
--- a/unittests/InstructionCountCI/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/Primary_32Bit.json
@@ -9,7 +9,7 @@
       "FlagM",
       "FlagM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "push es": {
diff --git a/unittests/InstructionCountCI/RPRES/DDD.json b/unittests/InstructionCountCI/RPRES/DDD.json
index 5f3416e0e..e1ee21159 100644
--- a/unittests/InstructionCountCI/RPRES/DDD.json
+++ b/unittests/InstructionCountCI/RPRES/DDD.json
@@ -9,7 +9,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pfrcpv mm0, mm1": {
diff --git a/unittests/InstructionCountCI/RPRES/Secondary.json b/unittests/InstructionCountCI/RPRES/Secondary.json
index 5142a93b6..091a663b3 100644
--- a/unittests/InstructionCountCI/RPRES/Secondary.json
+++ b/unittests/InstructionCountCI/RPRES/Secondary.json
@@ -9,7 +9,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "rsqrtps xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json
index 6fe86c84e..471f64d90 100644
--- a/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json
+++ b/unittests/InstructionCountCI/RPRES/Secondary_REP_AFP.json
@@ -9,7 +9,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "rsqrtss xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json
index 15d4b0e48..c6e631c00 100644
--- a/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json
+++ b/unittests/InstructionCountCI/RPRES/VEX_map1_AFP.json
@@ -8,7 +8,7 @@
       "AFP"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vrsqrtps xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Repeat.json b/unittests/InstructionCountCI/Repeat.json
index 71decd76a..7d1608bb9 100644
--- a/unittests/InstructionCountCI/Repeat.json
+++ b/unittests/InstructionCountCI/Repeat.json
@@ -6,7 +6,7 @@
       "SVE128",
       "SVE256"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {}
 }
diff --git a/unittests/InstructionCountCI/SSE42_Strings.json b/unittests/InstructionCountCI/SSE42_Strings.json
index aeb231e99..97b74e927 100644
--- a/unittests/InstructionCountCI/SSE42_Strings.json
+++ b/unittests/InstructionCountCI/SSE42_Strings.json
@@ -33,7 +33,7 @@
       "      - 1b: ECX = MSB",
       "[7]   - Reserved"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pcmpestrm xmm0, xmm1, 0_0_00_00_00b": {
diff --git a/unittests/InstructionCountCI/Secondary.json b/unittests/InstructionCountCI/Secondary.json
index 714f34ea6..e0cf345f9 100644
--- a/unittests/InstructionCountCI/Secondary.json
+++ b/unittests/InstructionCountCI/Secondary.json
@@ -12,7 +12,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Comment": [
     "MMX instructions are defined as optimal without SRA being used for these instructions.",
diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json
index 43d8743e7..238844ddd 100644
--- a/unittests/InstructionCountCI/SecondaryGroup.json
+++ b/unittests/InstructionCountCI/SecondaryGroup.json
@@ -11,7 +11,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "sgdt [rax]": {
diff --git a/unittests/InstructionCountCI/SecondaryModRM.json b/unittests/InstructionCountCI/SecondaryModRM.json
index 8b1933524..102276a44 100644
--- a/unittests/InstructionCountCI/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/SecondaryModRM.json
@@ -11,7 +11,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "xgetbv": {
diff --git a/unittests/InstructionCountCI/Secondary_32Bit.json b/unittests/InstructionCountCI/Secondary_32Bit.json
index 8e880d33a..c672ec099 100644
--- a/unittests/InstructionCountCI/Secondary_32Bit.json
+++ b/unittests/InstructionCountCI/Secondary_32Bit.json
@@ -7,7 +7,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "push fs": {
diff --git a/unittests/InstructionCountCI/Secondary_OpSize.json b/unittests/InstructionCountCI/Secondary_OpSize.json
index c2c2ee5f4..b63e3316c 100644
--- a/unittests/InstructionCountCI/Secondary_OpSize.json
+++ b/unittests/InstructionCountCI/Secondary_OpSize.json
@@ -12,7 +12,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "movupd xmm0, xmm0": {
diff --git a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json
index 11c11062c..04e77d85b 100644
--- a/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json
+++ b/unittests/InstructionCountCI/Secondary_OpSize_FCMA.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "addsubpd xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json
index 41bac85d5..d47a65c9e 100644
--- a/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json
+++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE128.json
@@ -8,7 +8,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "psrlw xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json
index f6d499553..8886f8b85 100644
--- a/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json
+++ b/unittests/InstructionCountCI/Secondary_OpSize_SVE256.json
@@ -7,7 +7,7 @@
       "AFP"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pmulhuw xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_REP.json b/unittests/InstructionCountCI/Secondary_REP.json
index d04c53649..cf41f7c08 100644
--- a/unittests/InstructionCountCI/Secondary_REP.json
+++ b/unittests/InstructionCountCI/Secondary_REP.json
@@ -12,7 +12,7 @@
       "FRINTTS",
       "CSSC"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "movss xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_REPNE.json b/unittests/InstructionCountCI/Secondary_REPNE.json
index 748b0ed51..bba50eb2e 100644
--- a/unittests/InstructionCountCI/Secondary_REPNE.json
+++ b/unittests/InstructionCountCI/Secondary_REPNE.json
@@ -10,7 +10,7 @@
       "FCMA",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "movsd xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json
index 945b2c751..bb04cf0fd 100644
--- a/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json
+++ b/unittests/InstructionCountCI/Secondary_REPNE_FCMA.json
@@ -9,7 +9,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "addsubps xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json
index 690ad15ca..33df51ae0 100644
--- a/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json
+++ b/unittests/InstructionCountCI/Secondary_REPNE_SVE128.json
@@ -10,7 +10,7 @@
       "FCMA",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvtpd2dq xmm0, xmm1": {
diff --git a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json
index bb3aade91..d82e54d36 100644
--- a/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json
+++ b/unittests/InstructionCountCI/Secondary_REP_FRINTTS.json
@@ -12,7 +12,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "cvttss2si eax, xmm0": {
diff --git a/unittests/InstructionCountCI/Secondary_SVE128.json b/unittests/InstructionCountCI/Secondary_SVE128.json
index 5f9794fbc..be910c43a 100644
--- a/unittests/InstructionCountCI/Secondary_SVE128.json
+++ b/unittests/InstructionCountCI/Secondary_SVE128.json
@@ -8,7 +8,7 @@
       "SVE256",
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "movmskps eax, xmm0": {
diff --git a/unittests/InstructionCountCI/VEX_map1.json b/unittests/InstructionCountCI/VEX_map1.json
index b70dbb926..ef9bdc90e 100644
--- a/unittests/InstructionCountCI/VEX_map1.json
+++ b/unittests/InstructionCountCI/VEX_map1.json
@@ -13,7 +13,7 @@
       "FLAGM2",
       "FRINTTS"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vmovups xmm0, xmm0": {
diff --git a/unittests/InstructionCountCI/VEX_map1_FCMA.json b/unittests/InstructionCountCI/VEX_map1_FCMA.json
index 60ecca131..ff2cc1800 100644
--- a/unittests/InstructionCountCI/VEX_map1_FCMA.json
+++ b/unittests/InstructionCountCI/VEX_map1_FCMA.json
@@ -8,7 +8,7 @@
       "FCMA"
     ],
     "DisabledHostFeatures": [],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vaddsubpd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json
index 542ef9d79..708daffbd 100644
--- a/unittests/InstructionCountCI/VEX_map1_FRINTTS.json
+++ b/unittests/InstructionCountCI/VEX_map1_FRINTTS.json
@@ -13,7 +13,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vcvttss2si eax, xmm0": {
diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json
index 573e984e7..e4226177c 100644
--- a/unittests/InstructionCountCI/VEX_map2.json
+++ b/unittests/InstructionCountCI/VEX_map2.json
@@ -13,7 +13,7 @@
       "I8MM",
       "DOTPROD"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpshufb xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json
index 55cc06b15..c4445a29e 100644
--- a/unittests/InstructionCountCI/VEX_map2_DOTPROD.json
+++ b/unittests/InstructionCountCI/VEX_map2_DOTPROD.json
@@ -13,7 +13,7 @@
       "SVEBITPERM",
       "I8MM"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpdpbusd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/VEX_map2_I8MM.json b/unittests/InstructionCountCI/VEX_map2_I8MM.json
index 1270c3d92..d6ee94231 100644
--- a/unittests/InstructionCountCI/VEX_map2_I8MM.json
+++ b/unittests/InstructionCountCI/VEX_map2_I8MM.json
@@ -12,7 +12,7 @@
       "FLAGM2",
       "SVEBITPERM"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpdpbusd xmm0, xmm1, xmm2": {
diff --git a/unittests/InstructionCountCI/VEX_map2_svebitperm.json b/unittests/InstructionCountCI/VEX_map2_svebitperm.json
index b13bfc58a..f2ece3727 100644
--- a/unittests/InstructionCountCI/VEX_map2_svebitperm.json
+++ b/unittests/InstructionCountCI/VEX_map2_svebitperm.json
@@ -11,7 +11,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "pext eax, ebx, ecx": {
diff --git a/unittests/InstructionCountCI/VEX_map3.json b/unittests/InstructionCountCI/VEX_map3.json
index 54cbaf085..792908b41 100644
--- a/unittests/InstructionCountCI/VEX_map3.json
+++ b/unittests/InstructionCountCI/VEX_map3.json
@@ -8,7 +8,7 @@
     "DisabledHostFeatures": [
       "AFP"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpermq ymm0, ymm1, 1": {
diff --git a/unittests/InstructionCountCI/VEX_map_group.json b/unittests/InstructionCountCI/VEX_map_group.json
index 1ac81d579..352cd75b0 100644
--- a/unittests/InstructionCountCI/VEX_map_group.json
+++ b/unittests/InstructionCountCI/VEX_map_group.json
@@ -9,7 +9,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "vpsrlw xmm0, xmm1, 0": {
diff --git a/unittests/InstructionCountCI/X87ldst-SVE.json b/unittests/InstructionCountCI/X87ldst-SVE.json
index 721bc6a02..cd9001dae 100644
--- a/unittests/InstructionCountCI/X87ldst-SVE.json
+++ b/unittests/InstructionCountCI/X87ldst-SVE.json
@@ -11,7 +11,7 @@
       "FLAGM2",
       "RPRES"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fstp tword [rax]": {
diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json
index 16221d3ab..8cb59dd21 100644
--- a/unittests/InstructionCountCI/x87.json
+++ b/unittests/InstructionCountCI/x87.json
@@ -10,7 +10,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fadd dword [rax]": {
@@ -2606,27 +2606,71 @@
       ]
     },
     "fxam": {
-      "ExpectedInstructionCount": 16,
+      "ExpectedInstructionCount": 60,
       "Comment": [
         "0xd9 11b 0xe5 /4"
       ],
       "ExpectedArm64ASM": [
+        "sub sp, sp, #0x60 (96)",
         "ldrb w20, [x28, #1051]",
         "add x21, x28, x20, lsl #4",
         "ldr q2, [x21, #1056]",
         "mov x21, v2.d[1]",
-        "ubfx x21, x21, #15, #1",
-        "strb w21, [x28, #1049]",
-        "ldrb w21, [x28, #1202]",
-        "lsr w20, w21, w20",
+        "ubfx x22, x21, #15, #1",
+        "strb w22, [x28, #1049]",
+        "ldrb w22, [x28, #1202]",
+        "lsr w20, w22, w20",
         "and w20, w20, #0x1",
-        "mrs x21, nzcv",
-        "cmp w20, #0x1 (1)",
-        "cset x22, ne",
-        "strb w22, [x28, #1048]",
-        "strb w20, [x28, #1050]",
-        "strb w22, [x28, #1054]",
-        "msr nzcv, x21"
+        "eor x22, x20, #0x1",
+        "mov x23, v2.d[0]",
+        "lsr x24, x23, #63",
+        "ubfx x21, x21, #0, #15",
+        "mrs x30, nzcv",
+        "cmp x21, #0x0 (0)",
+        "cset x18, eq",
+        "str w30, [sp]",
+        "mov w30, #0x7fff",
+        "cmp x21, x30",
+        "cset x21, eq",
+        "mov x30, #0x8000000000000000",
+        "cmp x23, x30",
+        "cset x30, eq",
+        "and x30, x21, x30",
+        "str w20, [sp, #32]",
+        "ubfx x20, x23, #0, #63",
+        "cmp x20, #0x0 (0)",
+        "cset x20, ne",
+        "and x21, x21, x24",
+        "and x20, x21, x20",
+        "cmp x23, #0x0 (0)",
+        "cset x21, ne",
+        "eor x23, x21, #0x1",
+        "and x23, x18, x23",
+        "and x21, x18, x21",
+        "orr x24, x18, x24",
+        "eor x24, x24, #0x1",
+        "orr x18, x23, x21",
+        "str x23, [sp, #64]",
+        "orr x23, x30, x20",
+        "orr x24, x24, x22",
+        "orr x23, x18, x23",
+        "orr x23, x23, x24",
+        "eor x23, x23, #0x1",
+        "orr x20, x20, x30",
+        "orr x20, x20, x22",
+        "orr x24, x30, x21",
+        "orr x23, x24, x23",
+        "ldr w24, [sp, #32]",
+        "and x23, x23, x24",
+        "ldr x24, [sp, #64]",
+        "orr x22, x24, x22",
+        "orr x21, x22, x21",
+        "strb w20, [x28, #1048]",
+        "strb w23, [x28, #1050]",
+        "strb w21, [x28, #1054]",
+        "ldr w20, [sp]",
+        "msr nzcv, x20",
+        "add sp, sp, #0x60 (96)"
       ]
     },
     "fld1": {
diff --git a/unittests/InstructionCountCI/x87_32Bit.json b/unittests/InstructionCountCI/x87_32Bit.json
index aac2473a9..71f9dc405 100644
--- a/unittests/InstructionCountCI/x87_32Bit.json
+++ b/unittests/InstructionCountCI/x87_32Bit.json
@@ -10,7 +10,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "Multiple fld/fst": {
diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json
index 1b4fb9fe1..67f514b14 100644
--- a/unittests/InstructionCountCI/x87_f64.json
+++ b/unittests/InstructionCountCI/x87_f64.json
@@ -12,7 +12,7 @@
       "FLAGM",
       "FLAGM2"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fadd dword [rax]": {
@@ -2024,27 +2024,57 @@
       ]
     },
     "fxam": {
-      "ExpectedInstructionCount": 16,
+      "ExpectedInstructionCount": 46,
       "Comment": [
         "0xd9 11b 0xe5 /4"
       ],
       "ExpectedArm64ASM": [
+        "sub sp, sp, #0x60 (96)",
         "ldrb w20, [x28, #1051]",
         "add x21, x28, x20, lsl #4",
         "ldr d2, [x21, #1056]",
         "mov x21, v2.d[0]",
-        "lsr x21, x21, #63",
-        "strb w21, [x28, #1049]",
-        "ldrb w21, [x28, #1202]",
-        "lsr w20, w21, w20",
+        "lsr x22, x21, #63",
+        "strb w22, [x28, #1049]",
+        "ldrb w22, [x28, #1202]",
+        "lsr w20, w22, w20",
         "and w20, w20, #0x1",
-        "mrs x21, nzcv",
-        "cmp w20, #0x1 (1)",
-        "cset x22, ne",
-        "strb w22, [x28, #1048]",
+        "eor x22, x20, #0x1",
+        "ubfx x21, x21, #0, #63",
+        "mov x23, #0x7ff0000000000000",
+        "mrs x24, nzcv",
+        "cmp x21, x23",
+        "cset x30, eq",
+        "cmp x21, x23",
+        "cset x23, hi",
+        "mov w18, #0x0",
+        "cmp x21, #0x0 (0)",
+        "cset x21, eq",
+        "str w24, [sp]",
+        "orr x24, x21, x18",
+        "orr x18, x30, x23",
+        "str x21, [sp, #32]",
+        "mov w21, #0x0",
+        "str w20, [sp, #64]",
+        "orr x20, x21, x22",
+        "orr x24, x24, x18",
+        "orr x20, x24, x20",
+        "eor x20, x20, #0x1",
+        "orr x23, x23, x30",
+        "orr x23, x23, x22",
+        "orr x24, x30, x21",
+        "orr x20, x24, x20",
+        "ldr w24, [sp, #64]",
+        "and x20, x20, x24",
+        "ldr x24, [sp, #32]",
+        "orr x22, x24, x22",
+        "orr x21, x22, x21",
+        "strb w23, [x28, #1048]",
         "strb w20, [x28, #1050]",
-        "strb w22, [x28, #1054]",
-        "msr nzcv, x21"
+        "strb w21, [x28, #1054]",
+        "ldr w20, [sp]",
+        "msr nzcv, x20",
+        "add sp, sp, #0x60 (96)"
       ]
     },
     "fld1": {
diff --git a/unittests/InstructionCountCI/x87_f64_32Bit.json b/unittests/InstructionCountCI/x87_f64_32Bit.json
index 0d7c8290b..d88aa4261 100644
--- a/unittests/InstructionCountCI/x87_f64_32Bit.json
+++ b/unittests/InstructionCountCI/x87_f64_32Bit.json
@@ -15,7 +15,7 @@
       "SVE256",
       "CSSC"
     ],
-    "BinaryCacheVersion": 28
+    "BinaryCacheVersion": 29
   },
   "Instructions": {
     "fstp dword [ebx*4+0x204a20]": {