diff --git a/Scripts/InstructionCountParser.py b/Scripts/InstructionCountParser.py index b84905cfd..5605cebdc 100755 --- a/Scripts/InstructionCountParser.py +++ b/Scripts/InstructionCountParser.py @@ -102,7 +102,7 @@ def parse_json_data(json_data, output_binary_path): logging.info("'{}' -> '{}' -> '{}'".format(key, tmp_asm, tmp_asm_out)) with open(tmp_asm, "w") as tmp_asm_file: - tmp_asm_file.write("BITS 64;\n") + tmp_asm_file.write("BITS {};\n".format(Bitness)) tmp_asm_file.write("{}\n".format(key)) Process = subprocess.Popen(["nasm", tmp_asm, "-o", tmp_asm_out]) diff --git a/unittests/InstructionCountCI/Primary.json b/unittests/InstructionCountCI/Primary.json new file mode 100644 index 000000000..75f6d75f8 --- /dev/null +++ b/unittests/InstructionCountCI/Primary.json @@ -0,0 +1,1446 @@ +{ + "Features": { + "Bitness": 64, + "EnabledHostFeatures": [], + "DisabledHostFeatures": [ + "SVE128", + "SVE256" + ] + }, + "Instructions": { + "add bl, cl": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x00" + }, + "add bx, cx": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x01" + }, + "add ebx, ecx": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": "0x01" + }, + "add rbx, rcx": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x01" + }, + "db 0x02, 0xcb": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": [ + "0x02", + "add bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x03, 0xcb": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": [ + "0x03", + "add bx, cx but modrm.rm as source" + ] + }, + "db 0x03, 0xcb": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": [ + "0x03", + "add ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x03, 0xcb": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": [ + "0x03", + "add rbx, rcx but modrm.rm as source" + ] + }, + "add al, 1": { + "ExpectedInstructionCount": "24", + "Optimal": "No", + "Comment": "0x04" + }, + "add ax, 1": { + "ExpectedInstructionCount": "24", + "Optimal": "No", + "Comment": "0x05" + }, + "add eax, 1": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x05" + }, + "add rax, 1": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x05" + }, + "or bl, cl": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": "0x08" + }, + "or bx, cx": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": "0x09" + }, + "or ebx, ecx": { + "ExpectedInstructionCount": "10", + "Optimal": "No", + "Comment": "0x09" + }, + "or rbx, rcx": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": "0x09" + }, + "db 0x0A, 0xcb": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": [ + "0x0A", + "or bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x0B, 0xcb": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": [ + "0x0B", + "or bx, cx but modrm.rm as source" + ] + }, + "db 0x0B, 0xcb": { + "ExpectedInstructionCount": "10", + "Optimal": "No", + "Comment": [ + "0x0B", + "or ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x0B, 0xcb": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": [ + "0x0B", + "or rbx, rcx but modrm.rm as source" + ] + }, + "or al, 1": { + "ExpectedInstructionCount": "13", + "Optimal": "No", + "Comment": "0x0C" + }, + "or ax, 1": { + "ExpectedInstructionCount": "13", + "Optimal": "No", + "Comment": "0x0D" + }, + "or eax, 1": { + "ExpectedInstructionCount": "9", + "Optimal": "No", + "Comment": "0x0D" + }, + "or rax, 1": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": "0x0D" + }, + "adc bl, cl": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x10" + }, + "adc bx, cx": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x11" + }, + "adc ebx, ecx": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x11" + }, + "adc rbx, rcx": { + "ExpectedInstructionCount": "26", + "Optimal": "No", + "Comment": "0x11" + }, + "db 0x12, 0xcb": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": [ + "0x12", + "adc bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x13, 0xcb": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": [ + "0x13", + "adc bx, cx but modrm.rm as source" + ] + }, + "db 0x13, 0xcb": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": [ + "0x13", + "adc ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x13, 0xcb": { + "ExpectedInstructionCount": "26", + "Optimal": "No", + "Comment": [ + "0x13", + "adc rbx, rcx but modrm.rm as source" + ] + }, + "adc al, 1": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x14" + }, + "adc ax, 1": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x15" + }, + "adc eax, 1": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x15" + }, + "adc rax, 1": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x15" + }, + "sbb bl, cl": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x18" + }, + "sbb bx, cx": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x19" + }, + "sbb ebx, ecx": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x19" + }, + "sbb rbx, rcx": { + "ExpectedInstructionCount": "26", + "Optimal": "No", + "Comment": "0x19" + }, + "db 0x1A, 0xcb": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": [ + "0x1A", + "sbb bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x1B, 0xcb": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": [ + "0x1B", + "sbb bx, cx but modrm.rm as source" + ] + }, + "db 0x1B, 0xcb": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": [ + "0x1B", + "sbb ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x1B, 0xcb": { + "ExpectedInstructionCount": "26", + "Optimal": "No", + "Comment": [ + "0x1B", + "sbb rbx, rcx but modrm.rm as source" + ] + }, + "sbb al, 1": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x1C" + }, + "sbb ax, 1": { + "ExpectedInstructionCount": "32", + "Optimal": "No", + "Comment": "0x1D" + }, + "sbb eax, 1": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x1D" + }, + "sbb rax, 1": { + "ExpectedInstructionCount": "27", + "Optimal": "No", + "Comment": "0x1D" + }, + "and bl, cl": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": "0x20" + }, + "and bx, cx": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": "0x21" + }, + "and ebx, ecx": { + "ExpectedInstructionCount": "10", + "Optimal": "No", + "Comment": "0x21" + }, + "and rbx, rcx": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": "0x21" + }, + "db 0x22, 0xcb": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": [ + "0x22", + "and bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x23, 0xcb": { + "ExpectedInstructionCount": "14", + "Optimal": "No", + "Comment": [ + "0x23", + "and bx, cx but modrm.rm as source" + ] + }, + "db 0x23, 0xcb": { + "ExpectedInstructionCount": "10", + "Optimal": "No", + "Comment": [ + "0x23", + "and ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x23, 0xcb": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": [ + "0x23", + "and rbx, rcx but modrm.rm as source" + ] + }, + "and al, 1": { + "ExpectedInstructionCount": "13", + "Optimal": "No", + "Comment": "0x24" + }, + "and ax, 1": { + "ExpectedInstructionCount": "13", + "Optimal": "No", + "Comment": "0x25" + }, + "and eax, 1": { + "ExpectedInstructionCount": "9", + "Optimal": "No", + "Comment": "0x25" + }, + "and rax, 1": { + "ExpectedInstructionCount": "8", + "Optimal": "No", + "Comment": "0x25" + }, + "sub bl, cl": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x28" + }, + "sub bx, cx": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x29" + }, + "sub ebx, ecx": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": "0x29" + }, + "sub rbx, rcx": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x29" + }, + "db 0x2A, 0xcb": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": [ + "0x2A", + "sub bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x2B, 0xcb": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": [ + "0x2B", + "sub bx, cx but modrm.rm as source" + ] + }, + "db 0x2B, 0xcb": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": [ + "0x2B", + "sub ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x2B, 0xcb": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": [ + "0x2B", + "sub rbx, rcx but modrm.rm as source" + ] + }, + "sub al, 1": { + "ExpectedInstructionCount": "24", + "Optimal": "No", + "Comment": "0x2C" + }, + "sub ax, 1": { + "ExpectedInstructionCount": "24", + "Optimal": "No", + "Comment": "0x2D" + }, + "sub eax, 1": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x2D" + }, + "sub rax, 1": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x2D" + }, + "xor bl, cl": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x30" + }, + "xor bx, cx": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x31" + }, + "xor ebx, ecx": { + "ExpectedInstructionCount": 10, + "Optimal": "No", + "Comment": "0x31" + }, + "xor rbx, rcx": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0x31" + }, + "db 0x32, 0xcb": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": [ + "0x32", + "xor bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x33, 0xcb": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": [ + "0x33", + "xor bx, cx but modrm.rm as source" + ] + }, + "db 0x33, 0xcb": { + "ExpectedInstructionCount": 10, + "Optimal": "No", + "Comment": [ + "0x33", + "xor ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x33, 0xcb": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": [ + "0x33", + "xor rbx, rcx but modrm.rm as source" + ] + }, + "xor al, 1": { + "ExpectedInstructionCount": 13, + "Optimal": "No", + "Comment": "0x34" + }, + "xor ax, 1": { + "ExpectedInstructionCount": 13, + "Optimal": "No", + "Comment": "0x35" + }, + "xor eax, 1": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": "0x35" + }, + "xor rax, 1": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0x35" + }, + "cmp bl, cl": { + "ExpectedInstructionCount": 24, + "Optimal": "No", + "Comment": "0x38" + }, + "cmp bx, cx": { + "ExpectedInstructionCount": 24, + "Optimal": "No", + "Comment": "0x39" + }, + "cmp ebx, ecx": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": "0x39" + }, + "cmp rbx, rcx": { + "ExpectedInstructionCount": 18, + "Optimal": "Yes", + "Comment": "0x39" + }, + "db 0x3A, 0xcb": { + "ExpectedInstructionCount": 24, + "Optimal": "No", + "Comment": [ + "0x3A", + "cmp bl, cl but modrm.rm as source" + ] + }, + "db 0x66, 0x3B, 0xcb": { + "ExpectedInstructionCount": 24, + "Optimal": "No", + "Comment": [ + "0x3B", + "cmp bx, cx but modrm.rm as source" + ] + }, + "db 0x3B, 0xcb": { + "ExpectedInstructionCount": "20", + "Optimal": "No", + "Comment": [ + "0x3B", + "cmp ebx, ecx but modrm.rm as source" + ] + }, + "db 0x48, 0x3B, 0xcb": { + "ExpectedInstructionCount": 18, + "Optimal": "Yes", + "Comment": [ + "0x3B", + "cmp rbx, rcx but modrm.rm as source" + ] + }, + "cmp al, 1": { + "ExpectedInstructionCount": 23, + "Optimal": "No", + "Comment": "0x3C" + }, + "cmp ax, 1": { + "ExpectedInstructionCount": 23, + "Optimal": "No", + "Comment": "0x3D" + }, + "cmp eax, 1": { + "ExpectedInstructionCount": "19", + "Optimal": "No", + "Comment": "0x3D" + }, + "cmp rax, 1": { + "ExpectedInstructionCount": 18, + "Optimal": "Yes", + "Comment": "0x3D" + }, + "push ax": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x50" + }, + "push rax": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x50" + }, + "pop ax": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8f" + }, + "pop rax": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x8f" + }, + "movsxd rax, ebx": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x63" + }, + "push word 1": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x68" + }, + "push qword 1": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x68" + }, + "imul ax, bx, 257": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x69" + }, + "imul eax, ebx, 257": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x69" + }, + "imul rax, rbx, 257": { + "ExpectedInstructionCount": 11, + "Optimal": "No", + "Comment": "0x69" + }, + "push word -1": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x6a" + }, + "push dword -1": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x6a" + }, + "push qword -1": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x6a" + }, + "imul ax, bx, 3": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x6b" + }, + "imul eax, ebx, 3": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0x6b" + }, + "imul rax, rbx, 3": { + "ExpectedInstructionCount": 11, + "Optimal": "No", + "Comment": "0x6b" + }, + "test al, bl": { + "ExpectedInstructionCount": 13, + "Optimal": "No", + "Comment": "0x84" + }, + "test ax, bx": { + "ExpectedInstructionCount": 13, + "Optimal": "No", + "Comment": "0x84" + }, + "test eax, ebx": { + "ExpectedInstructionCount": 10, + "Optimal": "No", + "Comment": "0x84" + }, + "test rax, rbx": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0x84" + }, + "xchg bl, cl": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x86" + }, + "xchg [rax], cl": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x86" + }, + "xchg bx, cx": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x87" + }, + "xchg [rax], cx": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x87" + }, + "xchg ebx, ecx": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x87" + }, + "xchg [rax], ecx": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x87" + }, + "xchg rbx, rcx": { + "ExpectedInstructionCount": 3, + "Optimal": "Yes", + "Comment": "0x87" + }, + "xchg [rax], rcx": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x87" + }, + "mov [rax], bl": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x88" + }, + "mov [rax], bx": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x89" + }, + "mov [rax], ebx": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x89" + }, + "mov [rax], rbx": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x89" + }, + "mov bl, [rax]": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8a" + }, + "mov bx, [rax]": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8b" + }, + "mov ebx, [rax]": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8b" + }, + "mov rbx, [rax]": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8b" + }, + "mov ax, cs": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, cs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, cs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov ax, es": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, es": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, es": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov ax, ss": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, ss": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, ss": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov ax, ds": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, ds": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, ds": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov ax, gs": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, gs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, gs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov ax, fs": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov eax, fs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "mov rax, fs": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8c" + }, + "lea ax, [rbx+rcx*1 + 0]": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0x8d" + }, + "lea eax, [rbx+rcx*1 + 0]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea rax, [rbx+rcx*1 + 0]": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x8d" + }, + "lea ax, [rbx+rcx*2 + 0]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea eax, [rbx+rcx*2 + 0]": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea rax, [rbx+rcx*2 + 0]": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea ax, [rbx+rcx*4 + 0]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea eax, [rbx+rcx*4 + 0]": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea rax, [rbx+rcx*4 + 0]": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea ax, [rbx+rcx*8 + 0]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea eax, [rbx+rcx*8 + 0]": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x8d" + }, + "lea rax, [rbx+rcx*8 + 0]": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0x8d" + }, + "mov cs, ax": { + "ExpectedInstructionCount": 4, + "Optimal": "Unknown", + "Skip": "Yes", + "Comment": "0x8e" + }, + "mov es, ax": { + "ExpectedInstructionCount": 6, + "Optimal": "No", + "Comment": "0x8e" + }, + "mov ss, ax": { + "ExpectedInstructionCount": 6, + "Optimal": "No", + "Comment": "0x8e" + }, + "mov ds, ax": { + "ExpectedInstructionCount": 6, + "Optimal": "No", + "Comment": "0x8e" + }, + "mov gs, ax": { + "ExpectedInstructionCount": 0, + "Optimal": "Unknown", + "Skip": "Yes", + "Comment": "0x8e" + }, + "mov fs, ax": { + "ExpectedInstructionCount": 0, + "Optimal": "Unknown", + "Skip": "Yes", + "Comment": "0x8e" + }, + "pop word [rax]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8f" + }, + "pop qword [rax]": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x8f" + }, + "xchg ax, bx": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": "0x90" + }, + "xchg eax, ebx": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x90" + }, + "xchg rax, rbx": { + "ExpectedInstructionCount": 3, + "Optimal": "Yes", + "Comment": "0x90" + }, + "nop": { + "ExpectedInstructionCount": 0, + "Optimal": "Yes", + "Comment": "0x90" + }, + "cbw": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x98" + }, + "cwde": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x98" + }, + "cdqe": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x98" + }, + "cwd": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x98" + }, + "cdq": { + "ExpectedInstructionCount": 3, + "Optimal": "No", + "Comment": "0x98" + }, + "cqo": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0x98" + }, + "fwait": { + "ExpectedInstructionCount": 0, + "Optimal": "Yes", + "Comment": "0x9b" + }, + "pushf": { + "ExpectedInstructionCount": 41, + "Optimal": "No", + "Comment": "0x9c" + }, + "pushfq": { + "ExpectedInstructionCount": 41, + "Optimal": "No", + "Comment": "0x9c" + }, + "popf": { + "ExpectedInstructionCount": 42, + "Optimal": "No", + "Comment": "0x9d" + }, + "sahf": { + "ExpectedInstructionCount": 20, + "Optimal": "No", + "Comment": "0x9e" + }, + "lahf": { + "ExpectedInstructionCount": 16, + "Optimal": "Yes", + "Comment": "0x9f" + }, + "db 0x48, 0xa1; dq 0x00000000e0000008": { + "ExpectedInstructionCount": 5, + "Optimal": "Yes", + "Comment": [ + "mov rax, [0xe0000008]", + "0xa1" + ] + }, + "db 0x67, 0xa1; dd 0xe0000000": { + "ExpectedInstructionCount": 3, + "Optimal": "Yes", + "Comment": [ + "mov eax, [0xe0000000]", + "0xa1" + ] + }, + "db 0x48, 0xa3; dq 0x00000000e0000008": { + "ExpectedInstructionCount": 5, + "Optimal": "Yes", + "Comment": [ + "mov [0xe0000008], rax", + "0xa3" + ] + }, + "db 0x67, 0xa3; dd 0xe0000000": { + "ExpectedInstructionCount": 4, + "Optimal": "No", + "Comment": [ + "mov [0xe0000000], eax", + "0xa3" + ] + }, + "movsb": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a single sbfx", + "0xa4" + ] + }, + "movsw": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa5" + ] + }, + "movsd": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa5" + ] + }, + "movsq": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa5" + ] + }, + "rep movsb": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xa4" + }, + "rep movsw": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xa5" + }, + "rep movsd": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xa5" + }, + "rep movsq": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xa5" + }, + "cmpsb": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a single sbfx", + "0xa6" + ] + }, + "cmpsw": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa7" + ] + }, + "cmpsd": { + "ExpectedInstructionCount": 27, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa7" + ] + }, + "cmpsq": { + "ExpectedInstructionCount": 27, + "Optimal": "No", + "Comment": [ + "Direction flag increment/decrement location can be made with a tst+mov+csel triple", + "0xa7" + ] + }, + "repz cmpsb": { + "ExpectedInstructionCount": 35, + "Optimal": "No", + "Comment": "0xa6" + }, + "repz cmpsw": { + "ExpectedInstructionCount": 35, + "Optimal": "No", + "Comment": "0xa7" + }, + "repz cmpsd": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": "0xa7" + }, + "repz cmpsq": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": "0xa7" + }, + "repnz cmpsb": { + "ExpectedInstructionCount": 35, + "Optimal": "No", + "Comment": "0xa6" + }, + "repnz cmpsw": { + "ExpectedInstructionCount": 35, + "Optimal": "No", + "Comment": "0xa7" + }, + "repnz cmpsd": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": "0xa7" + }, + "repnz cmpsq": { + "ExpectedInstructionCount": 31, + "Optimal": "No", + "Comment": "0xa7" + }, + "test al, 1": { + "ExpectedInstructionCount": 12, + "Optimal": "No", + "Comment": "0xa8" + }, + "test ax, 1": { + "ExpectedInstructionCount": 12, + "Optimal": "No", + "Comment": "0xa9" + }, + "test eax, 1": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": "0xa9" + }, + "test rax, 1": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xa9" + }, + "stosb": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xaa" + }, + "stosw": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xab" + }, + "stosd": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xab" + }, + "stosq": { + "ExpectedInstructionCount": 7, + "Optimal": "No", + "Comment": "0xab" + }, + "rep stosb": { + "ExpectedInstructionCount": 17, + "Optimal": "No", + "Comment": "0xaa" + }, + "rep stosw": { + "ExpectedInstructionCount": 17, + "Optimal": "No", + "Comment": "0xab" + }, + "rep stosd": { + "ExpectedInstructionCount": 17, + "Optimal": "No", + "Comment": "0xab" + }, + "rep stosq": { + "ExpectedInstructionCount": 16, + "Optimal": "Yes", + "Comment": [ + "Unrolling the loop for faster memset can be done.", + "Taking advantage of ARM MOPs instructions can be done", + "0xab" + ] + }, + "lodsb": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xac" + }, + "lodsw": { + "ExpectedInstructionCount": 8, + "Optimal": "No", + "Comment": "0xad" + }, + "lodsd": { + "ExpectedInstructionCount": 7, + "Optimal": "No", + "Comment": "0xad" + }, + "lodsq": { + "ExpectedInstructionCount": 7, + "Optimal": "No", + "Comment": "0xad" + }, + "rep lodsb": { + "ExpectedInstructionCount": 11, + "Optimal": "No", + "Comment": "0xac" + }, + "rep lodsw": { + "ExpectedInstructionCount": 11, + "Optimal": "No", + "Comment": "0xad" + }, + "rep lodsd": { + "ExpectedInstructionCount": 10, + "Optimal": "No", + "Comment": "0xad" + }, + "rep lodsq": { + "ExpectedInstructionCount": 10, + "Optimal": "No", + "Comment": "0xad" + }, + "scasb": { + "ExpectedInstructionCount": 30, + "Optimal": "No", + "Comment": "0xae" + }, + "scasw": { + "ExpectedInstructionCount": 30, + "Optimal": "No", + "Comment": "0xaf" + }, + "scasd": { + "ExpectedInstructionCount": 26, + "Optimal": "No", + "Comment": "0xaf" + }, + "scasq": { + "ExpectedInstructionCount": 25, + "Optimal": "No", + "Comment": "0xaf" + }, + "repz scasb": { + "ExpectedInstructionCount": 34, + "Optimal": "No", + "Comment": "0xae" + }, + "repz scasw": { + "ExpectedInstructionCount": 34, + "Optimal": "No", + "Comment": "0xaf" + }, + "repz scasd": { + "ExpectedInstructionCount": 30, + "Optimal": "No", + "Comment": "0xaf" + }, + "repz scasq": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xaf" + }, + "repnz scasb": { + "ExpectedInstructionCount": 34, + "Optimal": "No", + "Comment": "0xae" + }, + "repnz scasw": { + "ExpectedInstructionCount": 34, + "Optimal": "No", + "Comment": "0xaf" + }, + "repnz scasd": { + "ExpectedInstructionCount": 30, + "Optimal": "No", + "Comment": "0xaf" + }, + "repnz scasq": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xaf" + }, + "mov al, 0xff": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0xb0" + }, + "mov al, 0x82": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0xb0" + }, + "mov ax, 0xffff": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0xb8" + }, + "mov ax, 0x4243": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0xb8" + }, + "mov eax, 0xffffffff": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": [ + "movz+movk doesn't turn in to bitfield move", + "0xb8" + ] + }, + "mov eax, 0x44454647": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0xb8" + }, + "mov rax, 0xffffffffffffffff": { + "ExpectedInstructionCount": 1, + "Optimal": "Yes", + "Comment": "0xb8" + }, + "mov rax, 0x5152535455565758": { + "ExpectedInstructionCount": 4, + "Optimal": "Yes", + "Comment": "0xb8" + }, + "xlat": { + "ExpectedInstructionCount": 3, + "Optimal": "Yes", + "Comment": "0xd7" + }, + "cmc": { + "ExpectedInstructionCount": 5, + "Optimal": "No", + "Comment": "0xf5" + }, + "clc": { + "ExpectedInstructionCount": 6, + "Optimal": "No", + "Comment": "0xf8" + }, + "stc": { + "ExpectedInstructionCount": 6, + "Optimal": "No", + "Comment": "0xf9" + }, + "cli": { + "ExpectedInstructionCount": 7, + "Optimal": "No", + "Skip": "Yes", + "Comment": "0xfa" + }, + "sti": { + "ExpectedInstructionCount": 7, + "Optimal": "No", + "Skip": "Yes", + "Comment": "0xfb" + }, + "cld": { + "ExpectedInstructionCount": 2, + "Optimal": "No", + "Comment": "0xfc" + }, + "std": { + "ExpectedInstructionCount": 2, + "Optimal": "Yes", + "Comment": "0xfd" + } + } +} diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json new file mode 100644 index 000000000..2b177f736 --- /dev/null +++ b/unittests/InstructionCountCI/Primary_32Bit.json @@ -0,0 +1,138 @@ +{ + "Features": { + "Bitness": 32, + "EnabledHostFeatures": [], + "DisabledHostFeatures": [ + "SVE128", + "SVE256" + ] + }, + "Instructions": { + "push es": { + "ExpectedInstructionCount": 5, + "Optimal": "No", + "Comment": "0x06" + }, + "pop es": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": "0x07" + }, + "push cs": { + "ExpectedInstructionCount": 5, + "Optimal": "No", + "Comment": "0x0e" + }, + "push ss": { + "ExpectedInstructionCount": 5, + "Optimal": "No", + "Comment": "0x16" + }, + "pop ss": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": "0x17" + }, + "push ds": { + "ExpectedInstructionCount": 5, + "Optimal": "No", + "Comment": "0x1e" + }, + "pop ds": { + "ExpectedInstructionCount": 9, + "Optimal": "No", + "Comment": "0x1f" + }, + "daa": { + "ExpectedInstructionCount": 70, + "Optimal": "No", + "Comment": "0x27" + }, + "das": { + "ExpectedInstructionCount": 70, + "Optimal": "No", + "Comment": "0x2f" + }, + "aaa": { + "ExpectedInstructionCount": 36, + "Optimal": "No", + "Comment": "0x37" + }, + "aas": { + "ExpectedInstructionCount": 37, + "Optimal": "No", + "Comment": "0x3f" + }, + "inc ax": { + "ExpectedInstructionCount": 27, + "Optimal": "No", + "Comment": "0x40" + }, + "inc eax": { + "ExpectedInstructionCount": 20, + "Optimal": "No", + "Comment": "0x40" + }, + "dec ax": { + "ExpectedInstructionCount": 27, + "Optimal": "No", + "Comment": "0x48" + }, + "dec eax": { + "ExpectedInstructionCount": 20, + "Optimal": "No", + "Comment": "0x48" + }, + "pusha": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x60" + }, + "pushad": { + "ExpectedInstructionCount": "25", + "Optimal": "No", + "Comment": "0x60" + }, + "popa": { + "ExpectedInstructionCount": 23, + "Optimal": "No", + "Comment": "0x61" + }, + "popad": { + "ExpectedInstructionCount": 23, + "Optimal": "No", + "Comment": "0x61" + }, + "aam": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": "0xd4" + }, + "aad": { + "ExpectedInstructionCount": 30, + "Optimal": "No", + "Comment": "0xd5" + }, + "db 0xd4, 0x40": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": [ + "aam with a different immediate byte base", + "0xd4" + ] + }, + "db 0xd5, 0x40": { + "ExpectedInstructionCount": 29, + "Optimal": "No", + "Comment": [ + "aad with a different immediate byte base", + "0xd5" + ] + }, + "salc": { + "ExpectedInstructionCount": 14, + "Optimal": "No", + "Comment": "0xd6" + } + } +} \ No newline at end of file diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json index 15a30b27d..7225af230 100644 --- a/unittests/InstructionCountCI/VEX_map2.json +++ b/unittests/InstructionCountCI/VEX_map2.json @@ -2494,4 +2494,4 @@ ] } } -} +} \ No newline at end of file