From 6341ac681455a687a5edb885ee69754059bb3d25 Mon Sep 17 00:00:00 2001
From: lioncash <mai.iam2048@gmail.com>
Date: Fri, 30 Dec 2022 12:57:15 +0000
Subject: [PATCH] OpcodeDispatcher: Handle VUNPCKHPS

---
 .../Interface/Core/OpcodeDispatcher.cpp       |  2 +
 .../Source/Interface/Core/OpcodeDispatcher.h  |  3 ++
 .../Core/OpcodeDispatcher/Vector.cpp          | 24 ++++++++++++
 .../Interface/Core/X86Tables/VEXTables.cpp    |  2 +-
 unittests/ASM/VEX/vunpckhps.asm               | 39 +++++++++++++++++++
 5 files changed, 69 insertions(+), 1 deletion(-)
 create mode 100644 unittests/ASM/VEX/vunpckhps.asm

diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
index e82faeb75..c1d085818 100644
--- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
@@ -5819,6 +5819,8 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
     {OPD(1, 0b00, 0x14), 1, &OpDispatchBuilder::VPUNPCKLOp<4>},
     {OPD(1, 0b01, 0x14), 1, &OpDispatchBuilder::VPUNPCKLOp<8>},
 
+    {OPD(1, 0b00, 0x15), 1, &OpDispatchBuilder::VPUNPCKHOp<4>},
+
     {OPD(1, 0b00, 0x16), 1, &OpDispatchBuilder::VMOVHPOp},
     {OPD(1, 0b01, 0x16), 1, &OpDispatchBuilder::VMOVHPOp},
     {OPD(1, 0b10, 0x16), 1, &OpDispatchBuilder::VMOVSHDUPOp},
diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
index 6d9224ae3..b5a22ad7a 100644
--- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
+++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher.h
@@ -492,6 +492,9 @@ public:
   void VPSRLDOp(OpcodeArgs);
   void VPSRLDQOp(OpcodeArgs);
 
+  template <size_t ElementSize>
+  void VPUNPCKHOp(OpcodeArgs);
+
   template <size_t ElementSize>
   void VPUNPCKLOp(OpcodeArgs);
 
diff --git a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
index ba426bfa8..b41f02c43 100644
--- a/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
+++ b/External/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
@@ -933,6 +933,30 @@ void OpDispatchBuilder::PUNPCKHOp<4>(OpcodeArgs);
 template
 void OpDispatchBuilder::PUNPCKHOp<8>(OpcodeArgs);
 
+template <size_t ElementSize>
+void OpDispatchBuilder::VPUNPCKHOp(OpcodeArgs) {
+  const auto SrcSize = GetSrcSize(Op);
+  const auto Is128Bit = SrcSize == Core::CPUState::XMM_SSE_REG_SIZE;
+
+  OrderedNode *Src1 = LoadSource(FPRClass, Op, Op->Src[0], Op->Flags, -1);
+  OrderedNode *Src2 = LoadSource(FPRClass, Op, Op->Src[1], Op->Flags, -1);
+
+  OrderedNode *Result{};
+  if (Is128Bit) {
+    Result = _VZip2(SrcSize, ElementSize, Src1, Src2);
+  } else {
+    OrderedNode *ZipLo = _VZip(SrcSize, ElementSize, Src1, Src2);
+    OrderedNode *ZipHi = _VZip2(SrcSize, ElementSize, Src1, Src2);
+
+    Result = _VInsElement(SrcSize, 16, 0, 1, ZipHi, ZipLo);
+  }
+
+  StoreResult(FPRClass, Op, Result, -1);
+}
+
+template
+void OpDispatchBuilder::VPUNPCKHOp<4>(OpcodeArgs);
+
 void OpDispatchBuilder::PSHUFBOp(OpcodeArgs) {
   auto Size = GetSrcSize(Op);
   OrderedNode *Dest = LoadSource(FPRClass, Op, Op->Dest, Op->Flags, -1);
diff --git a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp
index 142cdabb8..8d4987c67 100644
--- a/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp
+++ b/External/FEXCore/Source/Interface/Core/X86Tables/VEXTables.cpp
@@ -38,7 +38,7 @@ void InitializeVEXTables() {
     {OPD(1, 0b00, 0x14), 1, X86InstInfo{"VUNPCKLPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
     {OPD(1, 0b01, 0x14), 1, X86InstInfo{"VUNPCKLPD", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
 
-    {OPD(1, 0b00, 0x15), 1, X86InstInfo{"VUNPCKHPS", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
+    {OPD(1, 0b00, 0x15), 1, X86InstInfo{"VUNPCKHPS", TYPE_INST, GenFlagsSameSize(SIZE_128BIT) | FLAGS_MODRM | FLAGS_VEX_1ST_SRC | FLAGS_XMM_FLAGS, 0, nullptr}},
     {OPD(1, 0b01, 0x15), 1, X86InstInfo{"VUNPCKHPD", TYPE_UNDEC, FLAGS_NONE, 0, nullptr}},
 
     {OPD(1, 0b00, 0x16), 1, X86InstInfo{"VMOVHPS",   TYPE_INST, GenFlagsSizes(SIZE_128BIT, SIZE_64BIT) | FLAGS_MODRM | FLAGS_SF_MOD_MEM_ONLY | FLAGS_XMM_FLAGS | FLAGS_VEX_1ST_SRC, 0, nullptr}},
diff --git a/unittests/ASM/VEX/vunpckhps.asm b/unittests/ASM/VEX/vunpckhps.asm
new file mode 100644
index 000000000..7d9432b67
--- /dev/null
+++ b/unittests/ASM/VEX/vunpckhps.asm
@@ -0,0 +1,39 @@
+%ifdef CONFIG
+{
+  "HostFeatures": ["AVX"],
+  "RegData": {
+    "XMM2": ["0x7576777855565758", "0x7172737451525354", "0x0000000000000000", "0x0000000000000000"],
+    "XMM3": ["0x7576777855565758", "0x7172737451525354", "0x0000000000000000", "0x0000000000000000"],
+    "XMM4": ["0x7576777855565758", "0x7172737451525354", "0x88888888CCCCCCCC", "0x99999999DDDDDDDD"],
+    "XMM5": ["0x7576777855565758", "0x7172737451525354", "0x88888888CCCCCCCC", "0x99999999DDDDDDDD"]
+  },
+  "MemoryRegions": {
+    "0x100000000": "4096"
+  }
+}
+%endif
+
+lea rdx, [rel .data]
+
+vmovaps ymm0, [rdx]
+vmovaps ymm1, [rdx + 32]
+
+vunpckhps xmm2, xmm0, xmm1
+vunpckhps xmm3, xmm0, [rdx + 32]
+
+vunpckhps ymm4, ymm0, ymm1
+vunpckhps ymm5, ymm0, [rdx + 32]
+
+hlt
+
+align 32
+.data:
+dq 0x4142434445464748
+dq 0x5152535455565758
+dq 0xFFFFFFFFEEEEEEEE
+dq 0xDDDDDDDDCCCCCCCC
+
+dq 0x6162636465666768
+dq 0x7172737475767778
+dq 0xBBBBBBBBAAAAAAAA
+dq 0x9999999988888888