diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
index eb369e233..006a6df8e 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher.cpp
@@ -3435,7 +3435,7 @@ void OpDispatchBuilder::DAAOp(OpcodeArgs) {
   SetCurrentCodeBlock(FalseBlock);
   StartNewBlock();
   {
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(0));
+    SetAF(0);
     _Jump(EndBlock);
   }
   SetCurrentCodeBlock(TrueBlock);
@@ -3450,7 +3450,7 @@ void OpDispatchBuilder::DAAOp(OpcodeArgs) {
     // The `NewCF` will be _Constant(0) stored aboved.
     // So Or(CF, _Constant(0)) ill mean CF gets updated to the old value in the true case?
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Or(OpSize::i64Bit, CF, NewCF));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(1));
+    SetAF(1);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
@@ -3509,7 +3509,7 @@ void OpDispatchBuilder::DASOp(OpcodeArgs) {
   SetCurrentCodeBlock(FalseBlock);
   StartNewBlock();
   {
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(0));
+    SetAF(0);
     _Jump(EndBlock);
   }
   SetCurrentCodeBlock(TrueBlock);
@@ -3524,7 +3524,7 @@ void OpDispatchBuilder::DASOp(OpcodeArgs) {
     // The `NewCF` will be _Constant(0) stored aboved.
     // So Or(CF, _Constant(0)) ill mean CF gets updated to the old value in the true case?
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Or(OpSize::i64Bit, CF, NewCF));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(1));
+    SetAF(1);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
@@ -3581,7 +3581,7 @@ void OpDispatchBuilder::AAAOp(OpcodeArgs) {
     auto NewAX = _And(OpSize::i64Bit, AX, _Constant(0xFF0F));
     StoreGPRRegister(X86State::REG_RAX, NewAX, 2);
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Constant(0));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(0));
+    SetAF(0);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
@@ -3593,7 +3593,7 @@ void OpDispatchBuilder::AAAOp(OpcodeArgs) {
     auto Result = _And(OpSize::i64Bit, NewAX, _Constant(0xFF0F));
     StoreGPRRegister(X86State::REG_RAX, Result, 2);
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Constant(1));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(1));
+    SetAF(1);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
@@ -3620,7 +3620,7 @@ void OpDispatchBuilder::AASOp(OpcodeArgs) {
     auto NewAX = _And(OpSize::i64Bit, AX, _Constant(0xFF0F));
     StoreGPRRegister(X86State::REG_RAX, NewAX, 2);
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Constant(0));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(0));
+    SetAF(0);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
@@ -3632,7 +3632,7 @@ void OpDispatchBuilder::AASOp(OpcodeArgs) {
     auto Result = _And(OpSize::i64Bit, NewAX, _Constant(0xFF0F));
     StoreGPRRegister(X86State::REG_RAX, Result, 2);
     SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(_Constant(1));
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(_Constant(1));
+    SetAF(1);
     CalculateDeferredFlags();
     _Jump(EndBlock);
   }
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Flags.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Flags.cpp
index 3d9e770df..88f836ee7 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Flags.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Flags.cpp
@@ -587,7 +587,7 @@ void OpDispatchBuilder::CalculateFlags_MUL(uint8_t SrcSize, OrderedNode *Res, Or
   // Undefined
   {
     SetRFLAG<FEXCore::X86State::RFLAG_PF_LOC>(Zero);
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
   }
 
   // CF/OF
@@ -611,7 +611,7 @@ void OpDispatchBuilder::CalculateFlags_UMUL(OrderedNode *High) {
   // AF/SF/PF/ZF
   // Undefined
   {
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
     SetRFLAG<FEXCore::X86State::RFLAG_PF_LOC>(Zero);
   }
 
@@ -628,12 +628,11 @@ void OpDispatchBuilder::CalculateFlags_UMUL(OrderedNode *High) {
 }
 
 void OpDispatchBuilder::CalculateFlags_Logical(uint8_t SrcSize, OrderedNode *Res, OrderedNode *Src1, OrderedNode *Src2) {
-  auto Zero = _Constant(0);
   // AF
   {
     // Undefined
     // Set to zero anyway
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
   }
 
   CalculatePF(Res);
@@ -749,7 +748,6 @@ void OpDispatchBuilder::CalculateFlags_ShiftLeftImmediate(uint8_t SrcSize, Order
   // No flags changed if shift is zero
   if (Shift == 0) return;
 
-  auto Zero = _Constant(0);
   auto OpSize = SrcSize == 8 ? OpSize::i64Bit : OpSize::i32Bit;
 
   SetNZ_ZeroCV(SrcSize, Res);
@@ -770,7 +768,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftLeftImmediate(uint8_t SrcSize, Order
   {
     // Undefined
     // Set to zero anyway
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
   }
 
   // OF
@@ -788,8 +786,6 @@ void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize,
   // No flags changed if shift is zero
   if (Shift == 0) return;
 
-  auto Zero = _Constant(0);
-
   SetNZ_ZeroCV(SrcSize, Res);
 
   // CF
@@ -804,7 +800,7 @@ void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize,
   {
     // Undefined
     // Set to zero anyway
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
   }
 
   // OF
@@ -815,7 +811,6 @@ void OpDispatchBuilder::CalculateFlags_SignShiftRightImmediate(uint8_t SrcSize,
 
 void OpDispatchBuilder::CalculateFlags_ShiftRightImmediateCommon(uint8_t SrcSize, OrderedNode *Res, OrderedNode *Src1, uint64_t Shift) {
   const auto OpSize = SrcSize == 8 ? OpSize::i64Bit : OpSize::i32Bit;
-  auto Zero = _Constant(0);
 
   // Stash OF before overwriting it
   auto OldOF = Shift != 1 ? GetRFLAG(FEXCore::X86State::RFLAG_OF_LOC) : NULL;
@@ -833,7 +828,7 @@ void OpDispatchBuilder::CalculateFlags_ShiftRightImmediateCommon(uint8_t SrcSize
   {
     // Undefined
     // Set to zero anyway
-    SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(Zero);
+    SetAF(0);
   }
 
   // Preserve OF if it won't be written
diff --git a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
index 48d44622e..5b42b8353 100644
--- a/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
+++ b/FEXCore/Source/Interface/Core/OpcodeDispatcher/Vector.cpp
@@ -3992,7 +3992,7 @@ void OpDispatchBuilder::PTestOp(OpcodeArgs) {
   SetRFLAG<FEXCore::X86State::RFLAG_ZF_LOC>(Test1);
   SetRFLAG<FEXCore::X86State::RFLAG_CF_LOC>(Test2);
 
-  SetRFLAG<FEXCore::X86State::RFLAG_AF_LOC>(ZeroConst);
+  SetAF(0);
   SetRFLAG<FEXCore::X86State::RFLAG_SF_LOC>(ZeroConst);
   SetRFLAG<FEXCore::X86State::RFLAG_OF_LOC>(ZeroConst);
   SetRFLAG<FEXCore::X86State::RFLAG_PF_LOC>(ZeroConst);
@@ -4036,7 +4036,7 @@ void OpDispatchBuilder::VTESTOpImpl(OpcodeArgs, size_t ElementSize) {
   SetRFLAG<X86State::RFLAG_ZF_LOC>(ZFResult);
   SetRFLAG<X86State::RFLAG_CF_LOC>(CFResult);
 
-  SetRFLAG<X86State::RFLAG_AF_LOC>(ZeroConst);
+  SetAF(0);
   SetRFLAG<X86State::RFLAG_SF_LOC>(ZeroConst);
   SetRFLAG<X86State::RFLAG_OF_LOC>(ZeroConst);
   SetRFLAG<X86State::RFLAG_PF_LOC>(ZeroConst);
@@ -4759,7 +4759,7 @@ void OpDispatchBuilder::PCMPXSTRXOpImpl(OpcodeArgs, bool IsExplicit, bool IsMask
   SetRFLAG<X86State::RFLAG_CF_LOC>(GetFlagBit(18));
   SetRFLAG<X86State::RFLAG_OF_LOC>(GetFlagBit(19));
 
-  SetRFLAG<X86State::RFLAG_AF_LOC>(ZeroConst);
+  SetAF(0);
   SetRFLAG<X86State::RFLAG_PF_LOC>(ZeroConst);
 }