diff --git a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp index 47a08d597..9a424c02d 100644 --- a/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp +++ b/FEXCore/Source/Interface/Core/ArchHelpers/Arm64Emitter.cpp @@ -586,8 +586,8 @@ void Arm64Emitter::PushCalleeSavedRegisters() { {ARMEmitter::XReg::x29, ARMEmitter::XReg::x30}, }}; - for (auto& RegPair : CalleeSaved) { - stp(RegPair.first, RegPair.second, ARMEmitter::Reg::rsp, -16); + for (const auto& [rt, rt2] : CalleeSaved) { + stp(rt, rt2, ARMEmitter::Reg::rsp, -16); } // Additionally we need to store the lower 64bits of v8-v15 @@ -604,9 +604,8 @@ void Arm64Emitter::PushCalleeSavedRegisters() { // We just saved x19 so it is safe add(ARMEmitter::Size::i64Bit, ARMEmitter::Reg::r19, ARMEmitter::Reg::rsp, 0); - for (auto& RegQuad : FPRs) { - st4(ARMEmitter::SubRegSize::i64Bit, std::get<0>(RegQuad), std::get<1>(RegQuad), std::get<2>(RegQuad), std::get<3>(RegQuad), 0, - ARMEmitter::Reg::r19, 32); + for (const auto& [rt, rt2, rt3, rt4] : FPRs) { + st4(ARMEmitter::SubRegSize::i64Bit, rt, rt2, rt3, rt4, 0, ARMEmitter::Reg::r19, 32); } } @@ -616,9 +615,8 @@ void Arm64Emitter::PopCalleeSavedRegisters() { {ARMEmitter::DReg::d12, ARMEmitter::DReg::d13, ARMEmitter::DReg::d14, ARMEmitter::DReg::d15}, }}; - for (auto& RegQuad : FPRs) { - ld4(ARMEmitter::SubRegSize::i64Bit, std::get<0>(RegQuad), std::get<1>(RegQuad), std::get<2>(RegQuad), std::get<3>(RegQuad), 0, - ARMEmitter::Reg::rsp, 32); + for (const auto& [rt, rt2, rt3, rt4] : FPRs) { + ld4(ARMEmitter::SubRegSize::i64Bit, rt, rt2, rt3, rt4, 0, ARMEmitter::Reg::rsp, 32); } constexpr static std::array, 6> CalleeSaved = {{ @@ -630,8 +628,8 @@ void Arm64Emitter::PopCalleeSavedRegisters() { {ARMEmitter::XReg::x19, ARMEmitter::XReg::x20}, }}; - for (auto& RegPair : CalleeSaved) { - ldp(RegPair.first, RegPair.second, ARMEmitter::Reg::rsp, 16); + for (const auto& [rt, rt2] : CalleeSaved) { + ldp(rt, rt2, ARMEmitter::Reg::rsp, 16); } }