diff --git a/unittests/InstructionCountCI/FEXOpt/MultiInst.json b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
index a4ebd83ae..85eeb75d0 100644
--- a/unittests/InstructionCountCI/FEXOpt/MultiInst.json
+++ b/unittests/InstructionCountCI/FEXOpt/MultiInst.json
@@ -131,9 +131,9 @@
         "bfi x0, x5, #32, #32",
         "sxtw x1, w20",
         "sdiv x22, x0, x1",
-        "msub x24, x22, x1, x0",
+        "msub x21, x22, x1, x0",
         "mov w4, w22",
-        "mov w5, w24"
+        "mov w5, w21"
       ]
     },
     "unsigned div narrow 32-bit": {
@@ -156,7 +156,7 @@
     },
     "inline syscall": {
       "x86InstructionCount": 2,
-      "ExpectedInstructionCount": 106,
+      "ExpectedInstructionCount": 108,
       "Comment": [
         "Simple inline syscall check",
         "When the syscall number is a known constant that matches host semantics then it can be inlined",
@@ -220,6 +220,7 @@
         "stp x18, x30, [x0], #16",
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
+        "str x25, [x28, #1024]",
         "stp x4, x7, [x28, #288]",
         "stp x5, x6, [x28, #304]",
         "stp x8, x9, [x28, #320]",
@@ -250,6 +251,7 @@
         "mov x2, sp",
         "blr x3",
         "add sp, sp, #0x40 (64)",
+        "ldr x25, [x28, #1024]",
         "ldr w1, [x28, #1000]",
         "msr nzcv, x1",
         "add x1, x28, #0x1a0 (416)",
diff --git a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
index f2216dc3c..d6854bde2 100644
--- a/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
+++ b/unittests/InstructionCountCI/FlagM/PrimaryGroup.json
@@ -2157,10 +2157,10 @@
       "Comment": "GROUP2 0xf6 /6",
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
-        "uxth w21, w4",
-        "udiv w22, w21, w20",
-        "msub w24, w22, w20, w21",
-        "bfi x22, x24, #8, #8",
+        "uxth w23, w4",
+        "udiv w22, w23, w20",
+        "msub w21, w22, w20, w23",
+        "bfi x22, x21, #8, #8",
         "bfxil x4, x22, #0, #16"
       ]
     },
@@ -2169,11 +2169,11 @@
       "Comment": "GROUP2 0xf6 /7",
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
-        "sxth x21, w4",
+        "sxth x23, w4",
         "sxtb x20, w20",
-        "sdiv x22, x21, x20",
-        "msub x24, x22, x20, x21",
-        "bfi x22, x24, #8, #8",
+        "sdiv x22, x23, x20",
+        "msub x21, x22, x20, x23",
+        "bfi x22, x21, #8, #8",
         "bfxil x4, x22, #0, #16"
       ]
     },
@@ -2341,9 +2341,9 @@
         "uxth w0, w4",
         "bfi w0, w5, #16, #16",
         "udiv w22, w0, w20",
-        "msub w24, w22, w20, w0",
+        "msub w21, w22, w20, w0",
         "bfxil x4, x22, #0, #16",
-        "bfxil x5, x24, #0, #16"
+        "bfxil x5, x21, #0, #16"
       ]
     },
     "inc al": {
diff --git a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
index 1ce5fd6c8..2f329dd24 100644
--- a/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/FlagM/Primary_32Bit.json
@@ -58,7 +58,7 @@
         "and w21, w21, #0x1",
         "ldrb w23, [x28, #984]",
         "and w23, w23, #0xfffffffe",
-        "mrs x24, nzcv",
+        "mrs x12, nzcv",
         "cmp x21, #0x0 (0)",
         "csel x21, x23, x22, eq",
         "strb w21, [x28, #984]",
@@ -67,7 +67,7 @@
         "add x0, x28, x20, lsl #2",
         "ldr w20, [x0, #1168]",
         "str w20, [x28, #952]",
-        "msr nzcv, x24"
+        "msr nzcv, x12"
       ]
     },
     "push ds": {
@@ -135,12 +135,12 @@
         "cmp x20, #0x6 (6)",
         "csel x23, x22, x21, lo",
         "orr w23, w21, w23",
-        "sub x24, x20, #0x6 (6)",
+        "sub x12, x20, #0x6 (6)",
         "cmp x22, #0x0 (0)",
-        "csel x20, x24, x20, ne",
-        "sub x24, x20, #0x60 (96)",
+        "csel x20, x12, x20, ne",
+        "sub x12, x20, #0x60 (96)",
         "cmp x21, #0x0 (0)",
-        "csel x26, x24, x20, ne",
+        "csel x26, x12, x20, ne",
         "bfxil x4, x26, #0, #8",
         "cmn wzr, w26, lsl #24",
         "eor x20, x23, #0x1",
@@ -391,8 +391,8 @@
         "uxtb w20, w4",
         "mov w21, #0xa",
         "udiv x22, x20, x21",
-        "msub x24, x22, x21, x20",
-        "add x26, x24, x22, lsl #8",
+        "msub x12, x22, x21, x20",
+        "add x26, x12, x22, lsl #8",
         "bfxil x4, x26, #0, #16",
         "cmn wzr, w26, lsl #24",
         "cfinv"
@@ -422,8 +422,8 @@
         "uxtb w20, w4",
         "mov w21, #0x40",
         "udiv x22, x20, x21",
-        "msub x24, x22, x21, x20",
-        "add x26, x24, x22, lsl #8",
+        "msub x12, x22, x21, x20",
+        "add x26, x12, x22, lsl #8",
         "bfxil x4, x26, #0, #16",
         "cmn wzr, w26, lsl #24",
         "cfinv"
diff --git a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
index d3d50ecc1..f59ce233b 100644
--- a/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/FlagM/SecondaryModRM.json
@@ -14,7 +14,7 @@
   },
   "Instructions": {
     "xgetbv": {
-      "ExpectedInstructionCount": 50,
+      "ExpectedInstructionCount": 52,
       "Comment": "0xF 0x01 /2 RM-0",
       "ExpectedArm64ASM": [
         "sub sp, sp, #0xf0 (240)",
@@ -26,6 +26,7 @@
         "stp x18, x30, [x3], #16",
         "mrs x3, nzcv",
         "str w3, [x28, #1000]",
+        "str x25, [x28, #1024]",
         "stp x4, x7, [x28, #288]",
         "stp x5, x6, [x28, #304]",
         "stp x8, x9, [x28, #320]",
@@ -44,6 +45,7 @@
         "ldr x0, [x28, #1368]",
         "ldr x2, [x28, #1384]",
         "blr x2",
+        "ldr x25, [x28, #1024]",
         "ldr w4, [x28, #1000]",
         "msr nzcv, x4",
         "add x4, x28, #0x1a0 (416)",
diff --git a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
index 4570c3182..480ca9526 100644
--- a/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
+++ b/unittests/InstructionCountCI/FlagM/x87-HalfLife.json
@@ -495,8 +495,8 @@
         "and w23, w23, #0x7",
         "sub w20, w20, w21",
         "ldrb w21, [x28, #1298]",
-        "mov w24, #0x707",
-        "lsr w20, w24, w20",
+        "mov w12, #0x707",
+        "lsr w20, w12, w20",
         "orr w20, w21, w20",
         "strb w20, [x28, #1298]",
         "ldrb w20, [x28, #1298]",
@@ -664,10 +664,10 @@
         "ldr x30, [sp], #16",
         "mov x22, x0",
         "ubfx x23, x22, #1, #1",
-        "ubfx x24, x22, #0, #1",
+        "ubfx x12, x22, #0, #1",
         "ubfx x22, x22, #2, #1",
         "orr w23, w23, w22",
-        "orr w22, w24, w22",
+        "orr w22, w12, w22",
         "eor x23, x23, #0x1",
         "rmif x23, #63, #nzCv",
         "rmif x22, #62, #nZcv",
@@ -731,13 +731,13 @@
         "ldr x30, [sp], #16",
         "mov x22, x0",
         "ubfx x23, x22, #1, #1",
-        "ubfx x24, x22, #0, #1",
+        "ubfx x12, x22, #0, #1",
         "ubfx x22, x22, #2, #1",
         "orr w23, w23, w22",
-        "orr w24, w24, w22",
+        "orr w12, w12, w22",
         "eor x23, x23, #0x1",
         "rmif x23, #63, #nzCv",
-        "rmif x24, #62, #nZcv",
+        "rmif x12, #62, #nZcv",
         "eor w26, w22, #0x1",
         "ldrb w22, [x28, #1019]",
         "sub w22, w22, #0x2 (2)",
@@ -753,8 +753,8 @@
         "and w23, w23, #0x7",
         "sub w21, w21, w22",
         "ldrb w22, [x28, #1298]",
-        "mov w24, #0x303",
-        "lsr w21, w24, w21",
+        "mov w12, #0x303",
+        "lsr w21, w12, w21",
         "orr w21, w22, w21",
         "strb w21, [x28, #1298]",
         "ldrb w21, [x28, #1298]",
@@ -1185,20 +1185,20 @@
         "ldr x30, [sp], #16",
         "fmov d2, d0",
         "str d2, [x8]",
-        "mov w20, #0x44",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xd100",
+        "movk w20, #0x7, lsl #16",
         "mov w21, #0xd0bc",
         "movk w21, #0x6, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x7 (7)",
-        "and w20, w20, #0x7",
+        "ldrb w21, [x28, #1019]",
+        "add w21, w21, #0x7 (7)",
+        "and w21, w21, #0x7",
         "ldrb w22, [x28, #1298]",
         "mov w23, #0x1",
-        "lsl w20, w23, w20",
-        "bic w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w23, w21",
+        "bic w21, w22, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block5": {
@@ -1545,19 +1545,19 @@
         "str w4, [x8, #8]",
         "str w6, [x8, #4]",
         "str w11, [x8]",
-        "mov w20, #0xb2",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xb5b0",
+        "movk w20, #0x3, lsl #16",
         "mov w22, #0xb4fe",
         "movk w22, #0x2, lsl #16",
-        "add w22, w20, w22",
+        "sub w20, w20, w22",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x5 (5)",
-        "and w20, w20, #0x7",
+        "ldrb w22, [x28, #1019]",
+        "add w22, w22, #0x5 (5)",
+        "and w22, w22, #0x7",
         "ldrb w23, [x28, #1298]",
-        "lsl w20, w21, w20",
-        "bic w20, w23, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w21, w22",
+        "bic w21, w23, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block6": {
@@ -1892,8 +1892,8 @@
         "and w23, w23, #0x7",
         "sub w20, w20, w21",
         "ldrb w21, [x28, #1298]",
-        "mov w24, #0xf0f",
-        "lsr w20, w24, w20",
+        "mov w12, #0xf0f",
+        "lsr w20, w12, w20",
         "orr w20, w21, w20",
         "strb w20, [x28, #1298]",
         "ldrb w20, [x28, #1298]",
@@ -2393,11 +2393,11 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "mov w20, #0x24",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xd0d8",
+        "movk w20, #0x7, lsl #16",
         "mov w21, #0xd0b4",
         "movk w21, #0x6, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!"
       ]
     },
@@ -2597,11 +2597,11 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "mov w20, #0x24",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xd0d8",
+        "movk w20, #0x7, lsl #16",
         "mov w21, #0xd0b4",
         "movk w21, #0x6, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!"
       ]
     },
@@ -2750,11 +2750,11 @@
         "add w20, w6, w20",
         "ldr w4, [x20]",
         "str w4, [x8]",
-        "mov w20, #0x30",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0x9090",
+        "movk w20, #0x2, lsl #16",
         "mov w21, #0x9060",
         "movk w21, #0x1, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!"
       ]
     }
diff --git a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
index e0a57ddb5..81570ef17 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Oblivion.json
@@ -1879,9 +1879,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w24, #0xc1e0",
-        "movk w24, #0xb3, lsl #16",
-        "ldr s3, [x24]",
+        "mov w12, #0xc1e0",
+        "movk w12, #0xb3, lsl #16",
+        "ldr s3, [x12]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -1929,9 +1929,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w25, #0xc1e4",
-        "movk w25, #0xb3, lsl #16",
-        "ldr s3, [x25]",
+        "mov w13, #0xc1e4",
+        "movk w13, #0xb3, lsl #16",
+        "ldr s3, [x13]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -1979,9 +1979,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w12, #0xc1e8",
-        "movk w12, #0xb3, lsl #16",
-        "ldr s3, [x12]",
+        "mov w14, #0xc1e8",
+        "movk w14, #0xb3, lsl #16",
+        "ldr s3, [x14]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -2029,9 +2029,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w13, #0xc1ec",
-        "movk w13, #0xb3, lsl #16",
-        "ldr s3, [x13]",
+        "mov w15, #0xc1ec",
+        "movk w15, #0xb3, lsl #16",
+        "ldr s3, [x15]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -2195,9 +2195,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w14, #0xc1f0",
-        "movk w14, #0xb3, lsl #16",
-        "ldr s3, [x14]",
+        "mov w16, #0xc1f0",
+        "movk w16, #0xb3, lsl #16",
+        "ldr s3, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -2231,9 +2231,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w14, #0xc1f4",
-        "movk w14, #0xb3, lsl #16",
-        "ldr s4, [x14]",
+        "mov w16, #0xc1f4",
+        "movk w16, #0xb3, lsl #16",
+        "ldr s4, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s4",
         "ldr x0, [x28, #1424]",
@@ -2266,9 +2266,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w14, #0xc1f8",
-        "movk w14, #0xb3, lsl #16",
-        "ldr s5, [x14]",
+        "mov w16, #0xc1f8",
+        "movk w16, #0xb3, lsl #16",
+        "ldr s5, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s5",
         "ldr x0, [x28, #1424]",
@@ -2317,9 +2317,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w14, #0xc1fc",
-        "movk w14, #0xb3, lsl #16",
-        "ldr s6, [x14]",
+        "mov w16, #0xc1fc",
+        "movk w16, #0xb3, lsl #16",
+        "ldr s6, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s6",
         "ldr x0, [x28, #1424]",
@@ -2691,9 +2691,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc200",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s6, [x15]",
+        "mov w17, #0xc200",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s6, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s6",
         "ldr x0, [x28, #1424]",
@@ -2734,9 +2734,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc204",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s7, [x15]",
+        "mov w17, #0xc204",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s7, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s7",
         "ldr x0, [x28, #1424]",
@@ -3217,9 +3217,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc208",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s8, [x15]",
+        "mov w17, #0xc208",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s8, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s8",
         "ldr x0, [x28, #1424]",
@@ -4309,9 +4309,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc190",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc190",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4359,9 +4359,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc194",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc194",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4409,9 +4409,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc198",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc198",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4459,9 +4459,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc19c",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc19c",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4509,9 +4509,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1a0",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1a0",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4559,9 +4559,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1a4",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1a4",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4609,9 +4609,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1a8",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1a8",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4659,9 +4659,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1ac",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1ac",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4709,9 +4709,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1b0",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1b0",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4759,9 +4759,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1b4",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1b4",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4809,9 +4809,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1b8",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1b8",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4859,9 +4859,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1bc",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1bc",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4909,9 +4909,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1c0",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1c0",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -4959,9 +4959,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1c4",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1c4",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5009,9 +5009,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1c8",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1c8",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5059,9 +5059,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w15, #0xc1cc",
-        "movk w15, #0xb3, lsl #16",
-        "ldr s9, [x15]",
+        "mov w17, #0xc1cc",
+        "movk w17, #0xb3, lsl #16",
+        "ldr s9, [x17]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5557,7 +5557,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s9, [x24]",
+        "ldr s9, [x12]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5605,7 +5605,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s9, [x25]",
+        "ldr s9, [x13]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5653,7 +5653,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s9, [x12]",
+        "ldr s9, [x14]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5701,7 +5701,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s9, [x13]",
+        "ldr s9, [x15]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -5997,7 +5997,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s9, [x14]",
+        "ldr s9, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s9",
         "ldr x0, [x28, #1424]",
@@ -6296,7 +6296,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "ldr s3, [x14]",
+        "ldr s3, [x16]",
         "str x30, [sp, #-16]!",
         "fmov s0, s3",
         "ldr x0, [x28, #1424]",
@@ -17687,20 +17687,20 @@
         "ldr w5, [x8, #124]",
         "add w7, w8, #0x190 (400)",
         "str w5, [x8, #232]",
-        "mov w20, #0xa3f",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xdf30",
+        "movk w20, #0x71, lsl #16",
         "mov w21, #0xd4f1",
         "movk w21, #0x70, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
+        "ldrb w21, [x28, #1019]",
         "mov w22, #0x1",
-        "add w20, w20, #0x1 (1)",
-        "and w20, w20, #0x7",
+        "add w21, w21, #0x1 (1)",
+        "and w21, w21, #0x7",
         "ldrb w23, [x28, #1298]",
-        "lsl w20, w22, w20",
-        "bic w20, w23, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w22, w21",
+        "bic w21, w23, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block4": {
@@ -19784,20 +19784,20 @@
         "mov w20, #0x4157",
         "movk w20, #0x5242, lsl #16",
         "str w20, [x8, #-4]!",
-        "mov w20, #0x22",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0x7220",
+        "movk w20, #0x42, lsl #16",
         "mov w21, #0x71fe",
         "movk w21, #0x41, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x7 (7)",
-        "and w20, w20, #0x7",
+        "ldrb w21, [x28, #1019]",
+        "add w21, w21, #0x7 (7)",
+        "and w21, w21, #0x7",
         "ldrb w22, [x28, #1298]",
         "mov w23, #0x1",
-        "lsl w20, w23, w20",
-        "bic w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w23, w21",
+        "bic w21, w22, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block5": {
@@ -20208,20 +20208,20 @@
         "mov w22, #0x0",
         "cmp x20, #0x0 (0)",
         "mov w23, #0x8000",
-        "csel x24, x23, xzr, lt",
+        "csel x12, x23, xzr, lt",
         "cneg x20, x20, mi",
-        "mov w25, #0x3f",
+        "mov w13, #0x3f",
         "mov x0, #0x3f",
-        "clz x12, x20",
-        "sub x12, x0, x12",
-        "sub x12, x25, x12",
-        "lsl x13, x20, x12",
-        "mov w14, #0x403e",
-        "sub x12, x14, x12",
+        "clz x14, x20",
+        "sub x14, x0, x14",
+        "sub x14, x13, x14",
+        "lsl x15, x20, x14",
+        "mov w16, #0x403e",
+        "sub x14, x16, x14",
         "cmp x20, #0x0 (0)",
-        "csel x20, x22, x12, eq",
-        "orr x20, x24, x20",
-        "fmov d2, x13",
+        "csel x20, x22, x14, eq",
+        "orr x20, x12, x20",
+        "fmov d2, x15",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "str w4, [x8, #64]",
@@ -20262,15 +20262,15 @@
         "csel x23, x23, xzr, lt",
         "cneg x20, x20, mi",
         "mov x0, #0x3f",
-        "clz x24, x20",
-        "sub x24, x0, x24",
-        "sub x24, x25, x24",
-        "lsl x25, x20, x24",
-        "sub x24, x14, x24",
+        "clz x12, x20",
+        "sub x12, x0, x12",
+        "sub x12, x13, x12",
+        "lsl x13, x20, x12",
+        "sub x12, x16, x12",
         "cmp x20, #0x0 (0)",
-        "csel x20, x22, x24, eq",
+        "csel x20, x22, x12, eq",
         "orr x20, x23, x20",
-        "fmov d2, x25",
+        "fmov d2, x13",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "str x30, [sp, #-16]!",
@@ -20291,20 +20291,20 @@
         "str s2, [x8, #56]",
         "ldr s2, [x8, #56]",
         "str s2, [x8]",
-        "mov w20, #0x5e",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xeb0",
+        "movk w20, #0x42, lsl #16",
         "mov w21, #0xe52",
         "movk w21, #0x41, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x6 (6)",
-        "and w20, w20, #0x7",
+        "ldrb w21, [x28, #1019]",
+        "add w21, w21, #0x6 (6)",
+        "and w21, w21, #0x7",
         "ldrb w22, [x28, #1298]",
         "mov w23, #0x1",
-        "lsl w20, w23, w20",
-        "bic w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w23, w21",
+        "bic w21, w22, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block6": {
@@ -20649,20 +20649,20 @@
         "ldr x30, [sp], #16",
         "fmov s2, s0",
         "str s2, [x8]",
-        "mov w20, #0x31",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0x4370",
+        "movk w20, #0x79, lsl #16",
         "mov w21, #0x433f",
         "movk w21, #0x78, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x7 (7)",
-        "and w20, w20, #0x7",
+        "ldrb w21, [x28, #1019]",
+        "add w21, w21, #0x7 (7)",
+        "and w21, w21, #0x7",
         "ldrb w22, [x28, #1298]",
         "mov w23, #0x1",
-        "lsl w20, w23, w20",
-        "bic w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w23, w21",
+        "bic w21, w22, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block7": {
@@ -22884,8 +22884,8 @@
         "fmov s2, s0",
         "str s2, [x8, #96]",
         "ldrb w23, [x28, #1298]",
-        "lsl w24, w22, w20",
-        "bic w23, w23, w24",
+        "lsl w12, w22, w20",
+        "bic w23, w23, w12",
         "strb w23, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -22904,8 +22904,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w23, [x28, #1298]",
-        "lsl w24, w22, w20",
-        "orr w23, w23, w24",
+        "lsl w12, w22, w20",
+        "orr w23, w23, w12",
         "strb w23, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
@@ -22928,13 +22928,13 @@
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
-        "ldrb w24, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w24, w24, w25",
-        "strb w24, [x28, #1298]",
-        "add w24, w20, #0x1 (1)",
-        "and w24, w24, #0x7",
-        "add x0, x28, x24, lsl #4",
+        "ldrb w12, [x28, #1298]",
+        "lsl w13, w22, w20",
+        "orr w12, w12, w13",
+        "strb w12, [x28, #1298]",
+        "add w12, w20, #0x1 (1)",
+        "and w12, w12, #0x7",
+        "add x0, x28, x12, lsl #4",
         "ldr q2, [x0, #1040]",
         "add x0, x28, x20, lsl #4",
         "ldr q3, [x0, #1040]",
@@ -22958,16 +22958,16 @@
         "ldr x30, [sp], #16",
         "fmov s2, s0",
         "str s2, [x8, #80]",
-        "ldrb w24, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w24, w24, w25",
-        "strb w24, [x28, #1298]",
+        "ldrb w12, [x28, #1298]",
+        "lsl w13, w22, w20",
+        "bic w12, w12, w13",
+        "strb w12, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "mov w24, #0x7b78",
-        "movk w24, #0xa7, lsl #16",
-        "ldr d2, [x24]",
+        "mov w12, #0x7b78",
+        "movk w12, #0xa7, lsl #16",
+        "ldr d2, [x12]",
         "str x30, [sp, #-16]!",
         "fmov d0, d2",
         "ldr x0, [x28, #1440]",
@@ -22997,10 +22997,10 @@
         "ldr x30, [sp], #16",
         "fmov s2, s0",
         "str s2, [x8, #100]",
-        "ldrb w25, [x28, #1298]",
-        "lsl w12, w22, w20",
-        "bic w25, w25, w12",
-        "strb w25, [x28, #1298]",
+        "ldrb w13, [x28, #1298]",
+        "lsl w14, w22, w20",
+        "bic w13, w13, w14",
+        "strb w13, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
@@ -23017,10 +23017,10 @@
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
-        "ldrb w25, [x28, #1298]",
-        "lsl w12, w22, w20",
-        "orr w25, w25, w12",
-        "strb w25, [x28, #1298]",
+        "ldrb w13, [x28, #1298]",
+        "lsl w14, w22, w20",
+        "orr w13, w13, w14",
+        "strb w13, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
         "str x30, [sp, #-16]!",
@@ -23031,10 +23031,10 @@
         "ldr x30, [sp], #16",
         "fmov s2, s0",
         "str s2, [x8, #56]",
-        "ldrb w25, [x28, #1298]",
-        "lsl w12, w22, w20",
-        "bic w25, w25, w12",
-        "strb w25, [x28, #1298]",
+        "ldrb w13, [x28, #1298]",
+        "lsl w14, w22, w20",
+        "bic w13, w13, w14",
+        "strb w13, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
@@ -23051,10 +23051,10 @@
         "strb w20, [x28, #1019]",
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
-        "ldrb w25, [x28, #1298]",
-        "lsl w12, w22, w20",
-        "orr w25, w25, w12",
-        "strb w25, [x28, #1298]",
+        "ldrb w13, [x28, #1298]",
+        "lsl w14, w22, w20",
+        "orr w13, w13, w14",
+        "strb w13, [x28, #1298]",
         "ldr d2, [x21]",
         "str x30, [sp, #-16]!",
         "fmov d0, d2",
@@ -23069,8 +23069,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w21, w21, w25",
+        "lsl w13, w22, w20",
+        "orr w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w21, w20, #0x1 (1)",
         "and w21, w21, #0x7",
@@ -23099,8 +23099,8 @@
         "fmov s2, s0",
         "str s2, [x8, #60]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23119,8 +23119,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w21, w21, w25",
+        "lsl w13, w22, w20",
+        "orr w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
@@ -23130,8 +23130,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w21, w21, w25",
+        "lsl w13, w22, w20",
+        "orr w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
@@ -23150,8 +23150,8 @@
         "add x0, x28, x21, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23178,8 +23178,8 @@
         "fmov s2, s0",
         "str s2, [x8, #64]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23233,8 +23233,8 @@
         "fmov s2, s0",
         "str s2, [x8, #68]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23271,8 +23271,8 @@
         "add x0, x28, x21, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23288,8 +23288,8 @@
         "fmov s2, s0",
         "str s2, [x8, #72]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "bic w21, w21, w25",
+        "lsl w13, w22, w20",
+        "bic w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
@@ -23308,8 +23308,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w21, w21, w25",
+        "lsl w13, w22, w20",
+        "orr w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
@@ -23319,8 +23319,8 @@
         "add x0, x28, x20, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w21, [x28, #1298]",
-        "lsl w25, w22, w20",
-        "orr w21, w21, w25",
+        "lsl w13, w22, w20",
+        "orr w21, w21, w13",
         "strb w21, [x28, #1298]",
         "add x0, x28, x20, lsl #4",
         "ldr q2, [x0, #1040]",
@@ -23365,7 +23365,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "ldr d2, [x24]",
+        "ldr d2, [x12]",
         "str x30, [sp, #-16]!",
         "fmov d0, d2",
         "ldr x0, [x28, #1440]",
@@ -26524,23 +26524,23 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v2.16b, v0.16b",
-        "mov w20, #0x1f",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0x2c30",
+        "movk w20, #0x99, lsl #16",
         "mov w21, #0x2c11",
         "movk w21, #0x98, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
-        "ldrb w20, [x28, #1019]",
+        "ldrb w21, [x28, #1019]",
         "mov w22, #0x1",
-        "sub w20, w20, #0x1 (1)",
-        "and w20, w20, #0x7",
-        "strb w20, [x28, #1019]",
-        "add x0, x28, x20, lsl #4",
+        "sub w21, w21, #0x1 (1)",
+        "and w21, w21, #0x7",
+        "strb w21, [x28, #1019]",
+        "add x0, x28, x21, lsl #4",
         "str q2, [x0, #1040]",
         "ldrb w23, [x28, #1298]",
-        "lsl w20, w22, w20",
-        "orr w20, w23, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w22, w21",
+        "orr w21, w23, w21",
+        "strb w21, [x28, #1298]"
       ]
     },
     "Block10": {
@@ -26976,11 +26976,11 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "mov w20, #0xc5",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0x3aa0",
+        "movk w20, #0x7a, lsl #16",
         "mov w21, #0x39db",
         "movk w21, #0x79, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!"
       ]
     }
diff --git a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
index 4bcc9a349..440e106d9 100644
--- a/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
+++ b/unittests/InstructionCountCI/FlagM/x87-Psychonauts.json
@@ -10280,11 +10280,11 @@
         "stur w4, [x9, #-92]",
         "sub w4, w9, #0xfc (252)",
         "str w4, [x8]",
-        "mov w20, #0x140",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xba1a",
+        "movk w20, #0x81a, lsl #16",
         "mov w21, #0xb8da",
         "movk w21, #0x819, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
         "cfinv"
       ]
@@ -24096,11 +24096,11 @@
         "fmov s2, s0",
         "str s2, [x8, #4]",
         "str w6, [x8]",
-        "mov w20, #0x462",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xd57a",
+        "movk w20, #0x819, lsl #16",
         "mov w21, #0xd118",
         "movk w21, #0x818, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
         "strb wzr, [x28, #1298]"
       ]
@@ -26736,11 +26736,11 @@
         "fmov s2, s0",
         "str s2, [x8, #4]",
         "str w6, [x8]",
-        "mov w20, #0x46f",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xd57a",
+        "movk w20, #0x819, lsl #16",
         "mov w21, #0xd10b",
         "movk w21, #0x818, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
         "strb wzr, [x28, #1298]"
       ]
@@ -35885,9 +35885,9 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v3.16b, v0.16b",
-        "mov w24, #0x314c",
-        "movk w24, #0x855, lsl #16",
-        "ldr s4, [x24]",
+        "mov w12, #0x314c",
+        "movk w12, #0x855, lsl #16",
+        "ldr s4, [x12]",
         "str x30, [sp, #-16]!",
         "fmov s0, s4",
         "ldr x0, [x28, #1424]",
@@ -36389,7 +36389,7 @@
         "blr x0",
         "ldr x30, [sp], #16",
         "mov v3.16b, v0.16b",
-        "ldr s4, [x24]",
+        "ldr s4, [x12]",
         "str x30, [sp, #-16]!",
         "fmov s0, s4",
         "ldr x0, [x28, #1424]",
@@ -36950,21 +36950,21 @@
         "str s2, [x4]",
         "ldr w4, [x9, #8]",
         "str w4, [x8]",
-        "mov w20, #0x47c",
-        "movk w20, #0x1, lsl #16",
+        "mov w20, #0xde98",
+        "movk w20, #0x817, lsl #16",
         "mov w21, #0xda1c",
         "movk w21, #0x816, lsl #16",
-        "add w21, w20, w21",
+        "sub w20, w20, w21",
         "str w20, [x8, #-4]!",
         "cfinv",
-        "ldrb w20, [x28, #1019]",
-        "add w20, w20, #0x5 (5)",
-        "and w20, w20, #0x7",
+        "ldrb w21, [x28, #1019]",
+        "add w21, w21, #0x5 (5)",
+        "and w21, w21, #0x7",
         "ldrb w22, [x28, #1298]",
         "mov w23, #0x1",
-        "lsl w20, w23, w20",
-        "bic w20, w22, w20",
-        "strb w20, [x28, #1298]"
+        "lsl w21, w23, w21",
+        "bic w21, w22, w21",
+        "strb w21, [x28, #1298]"
       ]
     }
   }
diff --git a/unittests/InstructionCountCI/FlagM/x87.json b/unittests/InstructionCountCI/FlagM/x87.json
index e482162d7..369f5abae 100644
--- a/unittests/InstructionCountCI/FlagM/x87.json
+++ b/unittests/InstructionCountCI/FlagM/x87.json
@@ -4165,16 +4165,16 @@
         "cneg x20, x20, mi",
         "mov w24, #0x3f",
         "mov x0, #0x3f",
-        "clz x25, x20",
-        "sub x25, x0, x25",
-        "sub x24, x24, x25",
-        "lsl x25, x20, x24",
-        "mov w30, #0x403e",
-        "sub x24, x30, x24",
+        "clz x30, x20",
+        "sub x30, x0, x30",
+        "sub x24, x24, x30",
+        "lsl x30, x20, x24",
+        "mov w18, #0x403e",
+        "sub x24, x18, x24",
         "cmp x20, #0x0 (0)",
         "csel x20, x22, x24, eq",
         "orr x20, x23, x20",
-        "fmov d2, x25",
+        "fmov d2, x30",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "ldrb w20, [x28, #1019]",
@@ -7264,7 +7264,7 @@
     },
     "fld and fnstsw": {
       "x86InstructionCount": 5,
-      "ExpectedInstructionCount": 82,
+      "ExpectedInstructionCount": 83,
       "x86Insts": [
         "fld dword [rax]",
         "fld dword [rax + 4]",
@@ -7324,24 +7324,24 @@
         "and w24, w24, #0x7",
         "add x0, x28, x24, lsl #4",
         "str q2, [x0, #1040]",
-        "sub w25, w20, w21",
-        "ldrb w30, [x28, #1298]",
-        "mov w18, #0xf0f",
-        "lsr w25, w18, w25",
-        "orr w25, w30, w25",
-        "strb w25, [x28, #1298]",
-        "lsl x25, x21, #11",
-        "ldrb w30, [x28, #1016]",
-        "orr x25, x25, x30, lsl #8",
-        "ldrb w30, [x28, #1017]",
-        "orr x25, x25, x30, lsl #9",
-        "ldrb w30, [x28, #1018]",
-        "orr x25, x25, x30, lsl #10",
-        "ldrb w30, [x28, #1022]",
-        "orr x25, x25, x30, lsl #14",
-        "ldrb w30, [x28, #1008]",
-        "orr x25, x25, x30",
-        "strh w25, [x6]",
+        "sub w30, w20, w21",
+        "ldrb w18, [x28, #1298]",
+        "mov w20, #0xf0f",
+        "lsr w30, w20, w30",
+        "orr w30, w18, w30",
+        "strb w30, [x28, #1298]",
+        "lsl x30, x21, #11",
+        "ldrb w18, [x28, #1016]",
+        "orr x30, x30, x18, lsl #8",
+        "ldrb w18, [x28, #1017]",
+        "orr x30, x30, x18, lsl #9",
+        "ldrb w18, [x28, #1018]",
+        "orr x30, x30, x18, lsl #10",
+        "ldrb w18, [x28, #1022]",
+        "orr x30, x30, x18, lsl #14",
+        "ldrb w18, [x28, #1008]",
+        "orr x30, x30, x18",
+        "strh w30, [x6]",
         "add x0, x28, x21, lsl #4",
         "str q5, [x0, #1040]",
         "add x0, x28, x22, lsl #4",
@@ -7350,10 +7350,11 @@
         "str q3, [x0, #1040]",
         "add x0, x28, x24, lsl #4",
         "str q2, [x0, #1040]",
-        "sub w20, w20, w21",
-        "ldrb w21, [x28, #1298]",
-        "lsr w20, w18, w20",
-        "orr w20, w21, w20",
+        "mov w22, #0x8",
+        "sub w21, w22, w21",
+        "ldrb w22, [x28, #1298]",
+        "lsr w20, w20, w21",
+        "orr w20, w22, w20",
         "strb w20, [x28, #1298]"
       ]
     },
@@ -10307,16 +10308,16 @@
         "cneg x20, x20, mi",
         "mov w24, #0x3f",
         "mov x0, #0x3f",
-        "clz x25, x20",
-        "sub x25, x0, x25",
-        "sub x24, x24, x25",
-        "lsl x25, x20, x24",
-        "mov w30, #0x403e",
-        "sub x24, x30, x24",
+        "clz x30, x20",
+        "sub x30, x0, x30",
+        "sub x24, x24, x30",
+        "lsl x30, x20, x24",
+        "mov w18, #0x403e",
+        "sub x24, x18, x24",
         "cmp x20, #0x0 (0)",
         "csel x20, x22, x24, eq",
         "orr x20, x23, x20",
-        "fmov d2, x25",
+        "fmov d2, x30",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "ldrb w20, [x28, #1019]",
@@ -10347,8 +10348,8 @@
         "tst x21, #0x7fff",
         "mov w23, #0x1",
         "cset x24, eq",
-        "mov w25, #0x400e",
-        "cmp x21, x25",
+        "mov w30, #0x400e",
+        "cmp x21, x30",
         "cset x21, hs",
         "orr x21, x24, x21",
         "strb w21, [x28, #1008]",
@@ -10415,8 +10416,8 @@
         "tst x21, #0x7fff",
         "mov w23, #0x1",
         "cset x24, eq",
-        "mov w25, #0x400e",
-        "cmp x21, x25",
+        "mov w30, #0x400e",
+        "cmp x21, x30",
         "cset x21, hs",
         "orr x21, x24, x21",
         "strb w21, [x28, #1008]",
diff --git a/unittests/InstructionCountCI/FlagM/x87_f64.json b/unittests/InstructionCountCI/FlagM/x87_f64.json
index 0da107ebf..545582584 100644
--- a/unittests/InstructionCountCI/FlagM/x87_f64.json
+++ b/unittests/InstructionCountCI/FlagM/x87_f64.json
@@ -88,11 +88,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -674,11 +674,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -708,11 +708,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w23, w21",
@@ -742,11 +742,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -776,11 +776,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -810,11 +810,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -844,11 +844,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -878,11 +878,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -912,11 +912,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -2726,11 +2726,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -3480,11 +3480,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w24, w21, w20",
         "bic w23, w23, w24",
@@ -4676,11 +4676,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -6735,11 +6735,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6769,11 +6769,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w23, w21",
@@ -6803,11 +6803,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6837,11 +6837,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6871,11 +6871,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6905,11 +6905,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6939,11 +6939,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6973,11 +6973,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -7065,11 +7065,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -7579,11 +7579,11 @@
         "cset w23, vs",
         "axflag",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w24, w21, w20",
         "bic w23, w23, w24",
diff --git a/unittests/InstructionCountCI/H0F38.json b/unittests/InstructionCountCI/H0F38.json
index ebdabfbe5..22885bafc 100644
--- a/unittests/InstructionCountCI/H0F38.json
+++ b/unittests/InstructionCountCI/H0F38.json
@@ -757,18 +757,18 @@
         "add w22, w22, w23",
         "mov w23, v17.s[3]",
         "mov w24, v17.s[2]",
-        "mov w25, v16.s[3]",
-        "and w30, w24, w25",
-        "orr w25, w24, w25",
-        "and w25, w23, w25",
-        "orr w25, w25, w30",
-        "add w25, w22, w25",
-        "ror w30, w23, #2",
-        "eor w30, w30, w23, ror #13",
-        "eor w30, w30, w23, ror #22",
-        "add w25, w25, w30",
-        "mov w30, v16.s[2]",
-        "add w22, w22, w30",
+        "mov w30, v16.s[3]",
+        "and w18, w24, w30",
+        "orr w30, w24, w30",
+        "and w30, w23, w30",
+        "orr w30, w30, w18",
+        "add w30, w22, w30",
+        "ror w18, w23, #2",
+        "eor w18, w18, w23, ror #13",
+        "eor w18, w18, w23, ror #22",
+        "add w30, w30, w18",
+        "mov w18, v16.s[2]",
+        "add w22, w22, w18",
         "and w20, w22, w20",
         "bic w21, w21, w22",
         "eor w20, w20, w21",
@@ -782,18 +782,18 @@
         "add w20, w20, w21",
         "and w21, w23, w24",
         "orr w23, w23, w24",
-        "and w23, w25, w23",
+        "and w23, w30, w23",
         "orr w21, w23, w21",
         "add w21, w20, w21",
-        "ror w23, w25, #2",
-        "eor w23, w23, w25, ror #13",
-        "eor w23, w23, w25, ror #22",
+        "ror w23, w30, #2",
+        "eor w23, w23, w30, ror #13",
+        "eor w23, w23, w30, ror #22",
         "add w21, w21, w23",
         "mov w23, v16.s[3]",
         "add w20, w20, w23",
         "mov v2.16b, v16.16b",
         "mov v2.s[3], w21",
-        "mov v2.s[2], w25",
+        "mov v2.s[2], w30",
         "mov v2.s[1], w20",
         "mov v16.16b, v2.16b",
         "mov v16.s[0], w22"
@@ -810,29 +810,29 @@
         "mov w22, v16.s[2]",
         "mov w23, v16.s[1]",
         "mov w24, v16.s[0]",
-        "ror w25, w20, #7",
-        "ror w30, w20, #18",
-        "eor w25, w25, w30",
+        "ror w30, w20, #7",
+        "ror w18, w20, #18",
+        "eor w30, w30, w18",
         "lsr w20, w20, #3",
-        "eor w20, w25, w20",
+        "eor w20, w30, w20",
         "add w20, w21, w20",
-        "ror w25, w21, #7",
-        "ror w30, w21, #18",
-        "eor w25, w25, w30",
+        "ror w30, w21, #7",
+        "ror w18, w21, #18",
+        "eor w30, w30, w18",
         "lsr w21, w21, #3",
-        "eor w21, w25, w21",
+        "eor w21, w30, w21",
         "add w21, w22, w21",
-        "ror w25, w22, #7",
-        "ror w30, w22, #18",
-        "eor w25, w25, w30",
+        "ror w30, w22, #7",
+        "ror w18, w22, #18",
+        "eor w30, w30, w18",
         "lsr w22, w22, #3",
-        "eor w22, w25, w22",
+        "eor w22, w30, w22",
         "add w22, w23, w22",
-        "ror w25, w23, #7",
-        "ror w30, w23, #18",
-        "eor w25, w25, w30",
+        "ror w30, w23, #7",
+        "ror w18, w23, #18",
+        "eor w30, w30, w18",
         "lsr w23, w23, #3",
-        "eor w23, w25, w23",
+        "eor w23, w30, w23",
         "add w23, w24, w23",
         "mov v2.16b, v16.16b",
         "mov v2.s[3], w20",
@@ -873,10 +873,10 @@
         "add w22, w22, w23",
         "mov w23, v16.s[3]",
         "ror w24, w21, #17",
-        "ror w25, w21, #19",
-        "eor w24, w24, w25",
-        "lsr w25, w21, #10",
-        "eor w24, w24, w25",
+        "ror w30, w21, #19",
+        "eor w24, w24, w30",
+        "lsr w30, w21, #10",
+        "eor w24, w24, w30",
         "add w23, w23, w24",
         "mov v2.16b, v16.16b",
         "mov v2.s[3], w23",
diff --git a/unittests/InstructionCountCI/H0F3A.json b/unittests/InstructionCountCI/H0F3A.json
index e15852ead..91d92f28a 100644
--- a/unittests/InstructionCountCI/H0F3A.json
+++ b/unittests/InstructionCountCI/H0F3A.json
@@ -1350,7 +1350,7 @@
       ]
     },
     "sha1rnds4 xmm0, xmm1, 00b": {
-      "ExpectedInstructionCount": 51,
+      "ExpectedInstructionCount": 57,
       "Comment": [
         "0x66 0x0f 0x3a 0xcc"
       ],
@@ -1361,55 +1361,61 @@
         "mov w22, v16.s[3]",
         "mov w23, v16.s[2]",
         "mov w24, v16.s[1]",
-        "mov w25, v16.s[0]",
-        "and w30, w23, w24",
-        "bic w18, w25, w23",
-        "eor w30, w30, w18",
+        "mov w30, v16.s[0]",
+        "and w18, w23, w24",
+        "bic w20, w30, w23",
+        "eor w20, w18, w20",
         "ror w18, w22, #27",
-        "add w30, w30, w18",
-        "add w21, w30, w21",
-        "add w21, w21, w20",
+        "add w20, w20, w18",
+        "add w20, w20, w21",
+        "mov w21, #0x7999",
+        "movk w21, #0x5a82, lsl #16",
+        "add w20, w20, w21",
         "ror w23, w23, #2",
-        "mov w30, v17.s[2]",
-        "add w25, w30, w25",
-        "and w30, w22, w23",
-        "bic w18, w24, w22",
-        "eor w30, w30, w18",
+        "mov w18, v17.s[2]",
+        "add w30, w18, w30",
+        "and w18, w22, w23",
+        "bic w21, w24, w22",
+        "eor w21, w18, w21",
+        "ror w18, w20, #27",
+        "add w21, w21, w18",
+        "add w21, w21, w30",
+        "mov w30, #0x7999",
+        "movk w30, #0x5a82, lsl #16",
+        "add w21, w21, w30",
+        "ror w22, w22, #2",
+        "mov w18, v17.s[1]",
+        "add w24, w18, w24",
+        "and w18, w20, w22",
+        "bic w30, w23, w20",
+        "eor w30, w18, w30",
         "ror w18, w21, #27",
         "add w30, w30, w18",
-        "add w25, w30, w25",
-        "add w25, w25, w20",
-        "ror w22, w22, #2",
-        "mov w30, v17.s[1]",
         "add w24, w30, w24",
-        "and w30, w21, w22",
-        "bic w18, w23, w21",
-        "eor w30, w30, w18",
-        "ror w18, w25, #27",
-        "add w30, w30, w18",
-        "add w24, w30, w24",
-        "add w24, w24, w20",
-        "ror w21, w21, #2",
-        "mov w30, v17.s[0]",
-        "add w23, w30, w23",
-        "and w30, w25, w21",
-        "bic w22, w22, w25",
-        "eor w22, w30, w22",
-        "ror w30, w24, #27",
-        "add w22, w22, w30",
+        "mov w30, #0x7999",
+        "movk w30, #0x5a82, lsl #16",
+        "add w24, w24, w30",
+        "ror w20, w20, #2",
+        "mov w18, v17.s[0]",
+        "add w23, w18, w23",
+        "and w18, w21, w20",
+        "bic w22, w22, w21",
+        "eor w22, w18, w22",
+        "ror w18, w24, #27",
+        "add w22, w22, w18",
         "add w22, w22, w23",
-        "add w20, w22, w20",
-        "ror w22, w25, #2",
+        "add w22, w22, w30",
+        "ror w21, w21, #2",
         "mov v2.16b, v16.16b",
-        "mov v2.s[3], w20",
+        "mov v2.s[3], w22",
         "mov v2.s[2], w24",
-        "mov v2.s[1], w22",
+        "mov v2.s[1], w21",
         "mov v16.16b, v2.16b",
-        "mov v16.s[0], w21"
+        "mov v16.s[0], w20"
       ]
     },
     "sha1rnds4 xmm0, xmm1, 01b": {
-      "ExpectedInstructionCount": 47,
+      "ExpectedInstructionCount": 53,
       "Comment": [
         "0x66 0x0f 0x3a 0xcc"
       ],
@@ -1420,51 +1426,57 @@
         "mov w22, v16.s[3]",
         "mov w23, v16.s[2]",
         "mov w24, v16.s[1]",
-        "mov w25, v16.s[0]",
-        "eor w30, w23, w24",
-        "eor w30, w30, w25",
-        "ror w18, w22, #27",
-        "add w30, w30, w18",
-        "add w21, w30, w21",
-        "add w21, w21, w20",
+        "mov w30, v16.s[0]",
+        "eor w18, w23, w24",
+        "eor w18, w18, w30",
+        "ror w20, w22, #27",
+        "add w20, w18, w20",
+        "add w20, w20, w21",
+        "mov w21, #0xeba1",
+        "movk w21, #0x6ed9, lsl #16",
+        "add w20, w20, w21",
         "ror w23, w23, #2",
-        "mov w30, v17.s[2]",
-        "add w25, w30, w25",
-        "eor w30, w22, w23",
-        "eor w30, w30, w24",
-        "ror w18, w21, #27",
-        "add w30, w30, w18",
-        "add w25, w30, w25",
-        "add w25, w25, w20",
+        "mov w18, v17.s[2]",
+        "add w30, w18, w30",
+        "eor w18, w22, w23",
+        "eor w18, w18, w24",
+        "ror w21, w20, #27",
+        "add w21, w18, w21",
+        "add w21, w21, w30",
+        "mov w30, #0xeba1",
+        "movk w30, #0x6ed9, lsl #16",
+        "add w21, w21, w30",
         "ror w22, w22, #2",
-        "mov w30, v17.s[1]",
+        "mov w18, v17.s[1]",
+        "add w24, w18, w24",
+        "eor w18, w20, w22",
+        "eor w18, w18, w23",
+        "ror w30, w21, #27",
+        "add w30, w18, w30",
         "add w24, w30, w24",
-        "eor w30, w21, w22",
-        "eor w30, w30, w23",
-        "ror w18, w25, #27",
-        "add w30, w30, w18",
-        "add w24, w30, w24",
-        "add w24, w24, w20",
-        "ror w21, w21, #2",
-        "mov w30, v17.s[0]",
-        "add w23, w30, w23",
-        "eor w30, w25, w21",
-        "eor w22, w30, w22",
-        "ror w30, w24, #27",
-        "add w22, w22, w30",
+        "mov w30, #0xeba1",
+        "movk w30, #0x6ed9, lsl #16",
+        "add w24, w24, w30",
+        "ror w20, w20, #2",
+        "mov w18, v17.s[0]",
+        "add w23, w18, w23",
+        "eor w18, w21, w20",
+        "eor w22, w18, w22",
+        "ror w18, w24, #27",
+        "add w22, w22, w18",
         "add w22, w22, w23",
-        "add w20, w22, w20",
-        "ror w22, w25, #2",
+        "add w22, w22, w30",
+        "ror w21, w21, #2",
         "mov v2.16b, v16.16b",
-        "mov v2.s[3], w20",
+        "mov v2.s[3], w22",
         "mov v2.s[2], w24",
-        "mov v2.s[1], w22",
+        "mov v2.s[1], w21",
         "mov v16.16b, v2.16b",
-        "mov v16.s[0], w21"
+        "mov v16.s[0], w20"
       ]
     },
     "sha1rnds4 xmm0, xmm1, 10b": {
-      "ExpectedInstructionCount": 55,
+      "ExpectedInstructionCount": 61,
       "Comment": [
         "0x66 0x0f 0x3a 0xcc"
       ],
@@ -1475,59 +1487,65 @@
         "mov w22, v16.s[3]",
         "mov w23, v16.s[2]",
         "mov w24, v16.s[1]",
-        "mov w25, v16.s[0]",
-        "and w30, w24, w25",
-        "orr w18, w24, w25",
-        "and w18, w23, w18",
-        "orr w30, w18, w30",
+        "mov w30, v16.s[0]",
+        "and w18, w24, w30",
+        "orr w20, w24, w30",
+        "and w20, w23, w20",
+        "orr w20, w20, w18",
         "ror w18, w22, #27",
-        "add w30, w30, w18",
-        "add w21, w30, w21",
-        "add w21, w21, w20",
+        "add w20, w20, w18",
+        "add w20, w20, w21",
+        "mov w21, #0xbcdc",
+        "movk w21, #0x8f1b, lsl #16",
+        "add w20, w20, w21",
         "ror w23, w23, #2",
-        "mov w30, v17.s[2]",
-        "add w25, w30, w25",
-        "and w30, w23, w24",
-        "orr w18, w23, w24",
-        "and w18, w22, w18",
-        "orr w30, w18, w30",
+        "mov w18, v17.s[2]",
+        "add w30, w18, w30",
+        "and w18, w23, w24",
+        "orr w21, w23, w24",
+        "and w21, w22, w21",
+        "orr w21, w21, w18",
+        "ror w18, w20, #27",
+        "add w21, w21, w18",
+        "add w21, w21, w30",
+        "mov w30, #0xbcdc",
+        "movk w30, #0x8f1b, lsl #16",
+        "add w21, w21, w30",
+        "ror w22, w22, #2",
+        "mov w18, v17.s[1]",
+        "add w24, w18, w24",
+        "and w18, w22, w23",
+        "orr w30, w22, w23",
+        "and w30, w20, w30",
+        "orr w30, w30, w18",
         "ror w18, w21, #27",
         "add w30, w30, w18",
-        "add w25, w30, w25",
-        "add w25, w25, w20",
-        "ror w22, w22, #2",
-        "mov w30, v17.s[1]",
         "add w24, w30, w24",
-        "and w30, w22, w23",
-        "orr w18, w22, w23",
-        "and w18, w21, w18",
-        "orr w30, w18, w30",
-        "ror w18, w25, #27",
-        "add w30, w30, w18",
-        "add w24, w30, w24",
-        "add w24, w24, w20",
-        "ror w21, w21, #2",
-        "mov w30, v17.s[0]",
-        "add w23, w30, w23",
-        "and w30, w21, w22",
-        "orr w22, w21, w22",
-        "and w22, w25, w22",
-        "orr w22, w22, w30",
-        "ror w30, w24, #27",
-        "add w22, w22, w30",
+        "mov w30, #0xbcdc",
+        "movk w30, #0x8f1b, lsl #16",
+        "add w24, w24, w30",
+        "ror w20, w20, #2",
+        "mov w18, v17.s[0]",
+        "add w23, w18, w23",
+        "and w18, w20, w22",
+        "orr w22, w20, w22",
+        "and w22, w21, w22",
+        "orr w22, w22, w18",
+        "ror w18, w24, #27",
+        "add w22, w22, w18",
         "add w22, w22, w23",
-        "add w20, w22, w20",
-        "ror w22, w25, #2",
+        "add w22, w22, w30",
+        "ror w21, w21, #2",
         "mov v2.16b, v16.16b",
-        "mov v2.s[3], w20",
+        "mov v2.s[3], w22",
         "mov v2.s[2], w24",
-        "mov v2.s[1], w22",
+        "mov v2.s[1], w21",
         "mov v16.16b, v2.16b",
-        "mov v16.s[0], w21"
+        "mov v16.s[0], w20"
       ]
     },
     "sha1rnds4 xmm0, xmm1, 11b": {
-      "ExpectedInstructionCount": 47,
+      "ExpectedInstructionCount": 53,
       "Comment": [
         "0x66 0x0f 0x3a 0xcc"
       ],
@@ -1538,47 +1556,53 @@
         "mov w22, v16.s[3]",
         "mov w23, v16.s[2]",
         "mov w24, v16.s[1]",
-        "mov w25, v16.s[0]",
-        "eor w30, w23, w24",
-        "eor w30, w30, w25",
-        "ror w18, w22, #27",
-        "add w30, w30, w18",
-        "add w21, w30, w21",
-        "add w21, w21, w20",
+        "mov w30, v16.s[0]",
+        "eor w18, w23, w24",
+        "eor w18, w18, w30",
+        "ror w20, w22, #27",
+        "add w20, w18, w20",
+        "add w20, w20, w21",
+        "mov w21, #0xc1d6",
+        "movk w21, #0xca62, lsl #16",
+        "add w20, w20, w21",
         "ror w23, w23, #2",
-        "mov w30, v17.s[2]",
-        "add w25, w30, w25",
-        "eor w30, w22, w23",
-        "eor w30, w30, w24",
-        "ror w18, w21, #27",
-        "add w30, w30, w18",
-        "add w25, w30, w25",
-        "add w25, w25, w20",
+        "mov w18, v17.s[2]",
+        "add w30, w18, w30",
+        "eor w18, w22, w23",
+        "eor w18, w18, w24",
+        "ror w21, w20, #27",
+        "add w21, w18, w21",
+        "add w21, w21, w30",
+        "mov w30, #0xc1d6",
+        "movk w30, #0xca62, lsl #16",
+        "add w21, w21, w30",
         "ror w22, w22, #2",
-        "mov w30, v17.s[1]",
+        "mov w18, v17.s[1]",
+        "add w24, w18, w24",
+        "eor w18, w20, w22",
+        "eor w18, w18, w23",
+        "ror w30, w21, #27",
+        "add w30, w18, w30",
         "add w24, w30, w24",
-        "eor w30, w21, w22",
-        "eor w30, w30, w23",
-        "ror w18, w25, #27",
-        "add w30, w30, w18",
-        "add w24, w30, w24",
-        "add w24, w24, w20",
-        "ror w21, w21, #2",
-        "mov w30, v17.s[0]",
-        "add w23, w30, w23",
-        "eor w30, w25, w21",
-        "eor w22, w30, w22",
-        "ror w30, w24, #27",
-        "add w22, w22, w30",
+        "mov w30, #0xc1d6",
+        "movk w30, #0xca62, lsl #16",
+        "add w24, w24, w30",
+        "ror w20, w20, #2",
+        "mov w18, v17.s[0]",
+        "add w23, w18, w23",
+        "eor w18, w21, w20",
+        "eor w22, w18, w22",
+        "ror w18, w24, #27",
+        "add w22, w22, w18",
         "add w22, w22, w23",
-        "add w20, w22, w20",
-        "ror w22, w25, #2",
+        "add w22, w22, w30",
+        "ror w21, w21, #2",
         "mov v2.16b, v16.16b",
-        "mov v2.s[3], w20",
+        "mov v2.s[3], w22",
         "mov v2.s[2], w24",
-        "mov v2.s[1], w22",
+        "mov v2.s[1], w21",
         "mov v16.16b, v2.16b",
-        "mov v16.s[0], w21"
+        "mov v16.s[0], w20"
       ]
     }
   }
diff --git a/unittests/InstructionCountCI/PrimaryGroup.json b/unittests/InstructionCountCI/PrimaryGroup.json
index 18ef5898b..15a445cd9 100644
--- a/unittests/InstructionCountCI/PrimaryGroup.json
+++ b/unittests/InstructionCountCI/PrimaryGroup.json
@@ -2549,10 +2549,10 @@
       "Comment": "GROUP2 0xf6 /6",
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
-        "uxth w21, w4",
-        "udiv w22, w21, w20",
-        "msub w24, w22, w20, w21",
-        "bfi x22, x24, #8, #8",
+        "uxth w23, w4",
+        "udiv w22, w23, w20",
+        "msub w21, w22, w20, w23",
+        "bfi x22, x21, #8, #8",
         "bfxil x4, x22, #0, #16"
       ]
     },
@@ -2561,11 +2561,11 @@
       "Comment": "GROUP2 0xf6 /7",
       "ExpectedArm64ASM": [
         "uxtb w20, w6",
-        "sxth x21, w4",
+        "sxth x23, w4",
         "sxtb x20, w20",
-        "sdiv x22, x21, x20",
-        "msub x24, x22, x20, x21",
-        "bfi x22, x24, #8, #8",
+        "sdiv x22, x23, x20",
+        "msub x21, x22, x20, x23",
+        "bfi x22, x21, #8, #8",
         "bfxil x4, x22, #0, #16"
       ]
     },
@@ -2760,9 +2760,9 @@
         "uxth w0, w4",
         "bfi w0, w5, #16, #16",
         "udiv w22, w0, w20",
-        "msub w24, w22, w20, w0",
+        "msub w21, w22, w20, w0",
         "bfxil x4, x22, #0, #16",
-        "bfxil x5, x24, #0, #16"
+        "bfxil x5, x21, #0, #16"
       ]
     },
     "div ebx": {
@@ -2808,9 +2808,9 @@
         "bfi w0, w5, #16, #16",
         "sxth w1, w20",
         "sdiv w22, w0, w1",
-        "msub w24, w22, w1, w0",
+        "msub w21, w22, w1, w0",
         "bfxil x4, x22, #0, #16",
-        "bfxil x5, x24, #0, #16"
+        "bfxil x5, x21, #0, #16"
       ]
     },
     "idiv ebx": {
@@ -2822,9 +2822,9 @@
         "bfi x0, x5, #32, #32",
         "sxtw x1, w20",
         "sdiv x22, x0, x1",
-        "msub x24, x22, x1, x0",
+        "msub x21, x22, x1, x0",
         "mov w4, w22",
-        "mov w5, w24"
+        "mov w5, w21"
       ]
     },
     "idiv rbx": {
diff --git a/unittests/InstructionCountCI/Primary_32Bit.json b/unittests/InstructionCountCI/Primary_32Bit.json
index 741e7d376..4fd2b60ff 100644
--- a/unittests/InstructionCountCI/Primary_32Bit.json
+++ b/unittests/InstructionCountCI/Primary_32Bit.json
@@ -57,7 +57,7 @@
         "and w21, w21, #0x1",
         "ldrb w23, [x28, #984]",
         "and w23, w23, #0xfffffffe",
-        "mrs x24, nzcv",
+        "mrs x12, nzcv",
         "cmp x21, #0x0 (0)",
         "csel x21, x23, x22, eq",
         "strb w21, [x28, #984]",
@@ -66,7 +66,7 @@
         "add x0, x28, x20, lsl #2",
         "ldr w20, [x0, #1168]",
         "str w20, [x28, #952]",
-        "msr nzcv, x24"
+        "msr nzcv, x12"
       ]
     },
     "push ds": {
@@ -136,12 +136,12 @@
         "cmp x20, #0x6 (6)",
         "csel x23, x22, x21, lo",
         "orr w23, w21, w23",
-        "sub x24, x20, #0x6 (6)",
+        "sub x12, x20, #0x6 (6)",
         "cmp x22, #0x0 (0)",
-        "csel x20, x24, x20, ne",
-        "sub x24, x20, #0x60 (96)",
+        "csel x20, x12, x20, ne",
+        "sub x12, x20, #0x60 (96)",
         "cmp x21, #0x0 (0)",
-        "csel x26, x24, x20, ne",
+        "csel x26, x12, x20, ne",
         "bfxil x4, x26, #0, #8",
         "cmn wzr, w26, lsl #24",
         "eor x20, x23, #0x1",
@@ -316,8 +316,8 @@
         "uxtb w20, w4",
         "mov w21, #0xa",
         "udiv x22, x20, x21",
-        "msub x24, x22, x21, x20",
-        "add x26, x24, x22, lsl #8",
+        "msub x12, x22, x21, x20",
+        "add x26, x12, x22, lsl #8",
         "bfxil x4, x26, #0, #16",
         "cmn wzr, w26, lsl #24",
         "mrs x20, nzcv",
@@ -351,8 +351,8 @@
         "uxtb w20, w4",
         "mov w21, #0x40",
         "udiv x22, x20, x21",
-        "msub x24, x22, x21, x20",
-        "add x26, x24, x22, lsl #8",
+        "msub x12, x22, x21, x20",
+        "add x26, x12, x22, lsl #8",
         "bfxil x4, x26, #0, #16",
         "cmn wzr, w26, lsl #24",
         "mrs x20, nzcv",
diff --git a/unittests/InstructionCountCI/SecondaryGroup.json b/unittests/InstructionCountCI/SecondaryGroup.json
index 2ec5d7c91..f938adbb1 100644
--- a/unittests/InstructionCountCI/SecondaryGroup.json
+++ b/unittests/InstructionCountCI/SecondaryGroup.json
@@ -1024,11 +1024,12 @@
       ]
     },
     "rdpid eax": {
-      "ExpectedInstructionCount": 18,
+      "ExpectedInstructionCount": 20,
       "Comment": "GROUP9 0xF3 0x0F 0xC7 /7",
       "ExpectedArm64ASM": [
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
+        "str x25, [x28, #1024]",
         "str x8, [x28, #320]",
         "mov w0, #0x100",
         "str x0, [x28, #1312]",
@@ -1039,6 +1040,7 @@
         "svc #0x0",
         "ldp w0, w1, [sp]",
         "sub sp, sp, #0x10 (16)",
+        "ldr x25, [x28, #1024]",
         "ldr w8, [x28, #1000]",
         "msr nzcv, x8",
         "ldr x8, [x28, #320]",
@@ -1048,11 +1050,12 @@
       ]
     },
     "rdpid rax": {
-      "ExpectedInstructionCount": 18,
+      "ExpectedInstructionCount": 20,
       "Comment": "GROUP9 0xF3 0x0F 0xC7 /7",
       "ExpectedArm64ASM": [
         "mrs x0, nzcv",
         "str w0, [x28, #1000]",
+        "str x25, [x28, #1024]",
         "str x8, [x28, #320]",
         "mov w0, #0x100",
         "str x0, [x28, #1312]",
@@ -1063,6 +1066,7 @@
         "svc #0x0",
         "ldp w0, w1, [sp]",
         "sub sp, sp, #0x10 (16)",
+        "ldr x25, [x28, #1024]",
         "ldr w8, [x28, #1000]",
         "msr nzcv, x8",
         "ldr x8, [x28, #320]",
diff --git a/unittests/InstructionCountCI/SecondaryModRM.json b/unittests/InstructionCountCI/SecondaryModRM.json
index f9fd7a8a8..035bcef85 100644
--- a/unittests/InstructionCountCI/SecondaryModRM.json
+++ b/unittests/InstructionCountCI/SecondaryModRM.json
@@ -14,7 +14,7 @@
   },
   "Instructions": {
     "xgetbv": {
-      "ExpectedInstructionCount": 50,
+      "ExpectedInstructionCount": 52,
       "Comment": "0xF 0x01 /2 RM-0",
       "ExpectedArm64ASM": [
         "sub sp, sp, #0xf0 (240)",
@@ -26,6 +26,7 @@
         "stp x18, x30, [x3], #16",
         "mrs x3, nzcv",
         "str w3, [x28, #1000]",
+        "str x25, [x28, #1024]",
         "stp x4, x7, [x28, #288]",
         "stp x5, x6, [x28, #304]",
         "stp x8, x9, [x28, #320]",
@@ -44,6 +45,7 @@
         "ldr x0, [x28, #1368]",
         "ldr x2, [x28, #1384]",
         "blr x2",
+        "ldr x25, [x28, #1024]",
         "ldr w4, [x28, #1000]",
         "msr nzcv, x4",
         "add x4, x28, #0x1a0 (416)",
diff --git a/unittests/InstructionCountCI/x87.json b/unittests/InstructionCountCI/x87.json
index baa35ced0..5b4555b06 100644
--- a/unittests/InstructionCountCI/x87.json
+++ b/unittests/InstructionCountCI/x87.json
@@ -4164,16 +4164,16 @@
         "cneg x20, x20, mi",
         "mov w24, #0x3f",
         "mov x0, #0x3f",
-        "clz x25, x20",
-        "sub x25, x0, x25",
-        "sub x24, x24, x25",
-        "lsl x25, x20, x24",
-        "mov w30, #0x403e",
-        "sub x24, x30, x24",
+        "clz x30, x20",
+        "sub x30, x0, x30",
+        "sub x24, x24, x30",
+        "lsl x30, x20, x24",
+        "mov w18, #0x403e",
+        "sub x24, x18, x24",
         "cmp x20, #0x0 (0)",
         "csel x20, x22, x24, eq",
         "orr x20, x23, x20",
-        "fmov d2, x25",
+        "fmov d2, x30",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "ldrb w20, [x28, #1019]",
@@ -10243,16 +10243,16 @@
         "cneg x20, x20, mi",
         "mov w24, #0x3f",
         "mov x0, #0x3f",
-        "clz x25, x20",
-        "sub x25, x0, x25",
-        "sub x24, x24, x25",
-        "lsl x25, x20, x24",
-        "mov w30, #0x403e",
-        "sub x24, x30, x24",
+        "clz x30, x20",
+        "sub x30, x0, x30",
+        "sub x24, x24, x30",
+        "lsl x30, x20, x24",
+        "mov w18, #0x403e",
+        "sub x24, x18, x24",
         "cmp x20, #0x0 (0)",
         "csel x20, x22, x24, eq",
         "orr x20, x23, x20",
-        "fmov d2, x25",
+        "fmov d2, x30",
         "fmov v2.D[1], x20",
         "msr nzcv, x21",
         "ldrb w20, [x28, #1019]",
@@ -10283,8 +10283,8 @@
         "tst x21, #0x7fff",
         "mov w23, #0x1",
         "cset x24, eq",
-        "mov w25, #0x400e",
-        "cmp x21, x25",
+        "mov w30, #0x400e",
+        "cmp x21, x30",
         "cset x21, hs",
         "orr x21, x24, x21",
         "strb w21, [x28, #1008]",
@@ -10351,8 +10351,8 @@
         "tst x21, #0x7fff",
         "mov w23, #0x1",
         "cset x24, eq",
-        "mov w25, #0x400e",
-        "cmp x21, x25",
+        "mov w30, #0x400e",
+        "cmp x21, x30",
         "cset x21, hs",
         "orr x21, x24, x21",
         "strb w21, [x28, #1008]",
@@ -10617,9 +10617,9 @@
         "orr w23, w23, w22",
         "orr w24, w24, w22",
         "eor x23, x23, #0x1",
-        "mrs x25, nzcv",
-        "bfi w25, w23, #29, #1",
-        "bfi w25, w24, #30, #1",
+        "mrs x30, nzcv",
+        "bfi w30, w23, #29, #1",
+        "bfi w30, w24, #30, #1",
         "eor w26, w22, #0x1",
         "ldrb w22, [x28, #1298]",
         "lsl w21, w21, w20",
@@ -10628,7 +10628,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "msr nzcv, x25"
+        "msr nzcv, x30"
       ]
     },
     "fucomip st2": {
@@ -10951,9 +10951,9 @@
         "orr w23, w23, w22",
         "orr w24, w24, w22",
         "eor x23, x23, #0x1",
-        "mrs x25, nzcv",
-        "bfi w25, w23, #29, #1",
-        "bfi w25, w24, #30, #1",
+        "mrs x30, nzcv",
+        "bfi w30, w23, #29, #1",
+        "bfi w30, w24, #30, #1",
         "eor w26, w22, #0x1",
         "ldrb w22, [x28, #1298]",
         "lsl w21, w21, w20",
@@ -10962,7 +10962,7 @@
         "add w20, w20, #0x1 (1)",
         "and w20, w20, #0x7",
         "strb w20, [x28, #1019]",
-        "msr nzcv, x25"
+        "msr nzcv, x30"
       ]
     },
     "fcomip st2": {
diff --git a/unittests/InstructionCountCI/x87_f64.json b/unittests/InstructionCountCI/x87_f64.json
index 1647df1ef..1a5a11734 100644
--- a/unittests/InstructionCountCI/x87_f64.json
+++ b/unittests/InstructionCountCI/x87_f64.json
@@ -87,13 +87,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -682,13 +682,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -717,13 +717,13 @@
         "fcmp d3, d2",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w23, w21",
@@ -752,13 +752,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -787,13 +787,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -822,13 +822,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -857,13 +857,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -892,13 +892,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -927,13 +927,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -2744,13 +2744,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -3499,13 +3499,13 @@
         "fcmp d3, d2",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w24, w21, w20",
         "bic w23, w23, w24",
@@ -4713,13 +4713,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -6781,13 +6781,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6816,13 +6816,13 @@
         "fcmp d3, d2",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w21, w21, w20",
         "bic w21, w23, w21",
@@ -6851,13 +6851,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6886,13 +6886,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6921,13 +6921,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6956,13 +6956,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -6991,13 +6991,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -7026,13 +7026,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w20",
         "bic w22, w23, w22",
@@ -7120,13 +7120,13 @@
         "mov w22, #0x1",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w22, w22, w21",
         "bic w22, w23, w22",
@@ -7635,13 +7635,13 @@
         "fcmp d3, d2",
         "cset w23, vs",
         "cset w24, lo",
-        "cset w25, eq",
+        "cset w30, eq",
         "orr w24, w24, w23",
-        "orr w25, w25, w23",
+        "orr w30, w30, w23",
         "strb w24, [x28, #1016]",
         "strb wzr, [x28, #1017]",
         "strb w23, [x28, #1018]",
-        "strb w25, [x28, #1022]",
+        "strb w30, [x28, #1022]",
         "ldrb w23, [x28, #1298]",
         "lsl w24, w21, w20",
         "bic w23, w23, w24",