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OpcodeDispatcher: add cache
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
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7d939a3b3d
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7 files changed
+211
-52
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@@ -3366,8 +3366,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
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auto Src2 = _LoadMem(GPRClass, Size, Dest_RSI, Size);
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// We'll calculate PF/AF after the loop, so use them as temporaries here.
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_StoreRegister(Src1, Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize());
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_StoreRegister(Src2, Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize());
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StoreRegister(Core::CPUState::PF_AS_GREG, false, Src1);
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StoreRegister(Core::CPUState::AF_AS_GREG, false, Src2);
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Ref TailCounter = LoadGPRRegister(X86State::REG_RCX);
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@@ -3406,8 +3406,8 @@ void OpDispatchBuilder::CMPSOp(OpcodeArgs) {
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// Make sure to start a new block after ending this one
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{
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// Grab the sources from the last iteration so we can set flags.
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auto Src1 = _LoadRegister(Core::CPUState::PF_AS_GREG, GPRClass, CTX->GetGPRSize());
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auto Src2 = _LoadRegister(Core::CPUState::AF_AS_GREG, GPRClass, CTX->GetGPRSize());
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auto Src1 = LoadGPR(Core::CPUState::PF_AS_GREG);
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auto Src2 = LoadGPR(Core::CPUState::AF_AS_GREG);
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GenerateFlags_SUB(Op, Src2, Src1);
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}
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auto Jump_ = Jump();
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@@ -4362,7 +4362,7 @@ Ref OpDispatchBuilder::LoadSource_WithOpSize(RegisterClassType Class, const X86T
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const auto highIndex = Operand.Data.GPR.HighBits ? 1 : 0;
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if (gpr >= FEXCore::X86State::REG_MM_0) {
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A.Base = _LoadContext(OpSize, FPRClass, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0]));
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A.Base = LoadContext(MM0Index + gpr - FEXCore::X86State::REG_MM_0);
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} else if (gpr >= FEXCore::X86State::REG_XMM_0) {
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const auto gprIndex = gpr - X86State::REG_XMM_0;
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@@ -4399,7 +4399,7 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset
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if (Size == -1) {
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Size = GPRSize;
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}
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Ref Reg = _LoadRegister(GPR, GPRClass, GPRSize);
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Ref Reg = LoadGPR(GPR);
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if ((!AllowUpperGarbage && (Size != GPRSize)) || Offset != 0) {
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// Extract the subregister if requested.
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@@ -4413,11 +4413,6 @@ Ref OpDispatchBuilder::LoadGPRRegister(uint32_t GPR, int8_t Size, uint8_t Offset
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return Reg;
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}
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Ref OpDispatchBuilder::LoadXMMRegister(uint32_t XMM) {
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const auto VectorSize = CTX->HostFeatures.SupportsSVE256 ? 32 : 16;
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return _LoadRegister(XMM, FPRClass, VectorSize);
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}
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void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Size, uint8_t Offset) {
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const uint8_t GPRSize = CTX->GetGPRSize();
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if (Size == -1) {
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@@ -4427,16 +4422,14 @@ void OpDispatchBuilder::StoreGPRRegister(uint32_t GPR, const Ref Src, int8_t Siz
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Ref Reg = Src;
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if (Size != GPRSize || Offset != 0) {
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// Need to do an insert if not automatic size or zero offset.
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Reg = LoadGPRRegister(GPR);
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Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, Reg, Src);
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Reg = _Bfi(IR::SizeToOpSize(GPRSize), Size * 8, Offset, LoadGPRRegister(GPR), Src);
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}
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_StoreRegister(Reg, GPR, GPRClass, GPRSize);
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StoreRegister(GPR, false, Reg);
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}
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void OpDispatchBuilder::StoreXMMRegister(uint32_t XMM, const Ref Src) {
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const auto VectorSize = CTX->HostFeatures.SupportsSVE256 ? 32 : 16;
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_StoreRegister(Src, XMM, FPRClass, VectorSize);
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StoreRegister(XMM, true, Src);
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}
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Ref OpDispatchBuilder::LoadSource(RegisterClassType Class, const X86Tables::DecodedOp& Op, const X86Tables::DecodedOperand& Operand,
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@@ -4455,7 +4448,8 @@ void OpDispatchBuilder::StoreResult_WithOpSize(FEXCore::IR::RegisterClassType Cl
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const auto gpr = Operand.Data.GPR.GPR;
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if (gpr >= FEXCore::X86State::REG_MM_0) {
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_StoreContext(OpSize, Class, Src, offsetof(FEXCore::Core::CPUState, mm[gpr - FEXCore::X86State::REG_MM_0]));
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LOGMAN_THROW_A_FMT(OpSize == 8, "full");
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StoreContext(MM0Index + gpr - FEXCore::X86State::REG_MM_0, Src);
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} else if (gpr >= FEXCore::X86State::REG_XMM_0) {
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const auto gprIndex = gpr - X86State::REG_XMM_0;
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const auto VectorSize = CTX->HostFeatures.SupportsSVE256 ? 32 : 16;
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@@ -4543,6 +4537,8 @@ void OpDispatchBuilder::ResetWorkingList() {
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DecodeFailure = false;
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ShouldDump = false;
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CurrentCodeBlock = nullptr;
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RegCache.Written = 0;
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RegCache.Cached = 0;
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}
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void OpDispatchBuilder::UnhandledOp(OpcodeArgs) {
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