From b47a36a47b89e1d768176c2c1cdca8df30c612b5 Mon Sep 17 00:00:00 2001 From: "Pierre-Loup A. Griffais" Date: Fri, 21 Aug 2026 15:47:49 -0700 Subject: [PATCH] DiskCache: add some SHM stats --- FEXCore/Source/Interface/Core/Core.cpp | 3 +++ FEXCore/include/FEXCore/Utils/SHMStats.h | 5 +++++ 2 files changed, 8 insertions(+) diff --git a/FEXCore/Source/Interface/Core/Core.cpp b/FEXCore/Source/Interface/Core/Core.cpp index f62aa5771..366986f53 100644 --- a/FEXCore/Source/Interface/Core/Core.cpp +++ b/FEXCore/Source/Interface/Core/Core.cpp @@ -865,6 +865,7 @@ uintptr_t ContextImpl::CompileBlock(FEXCore::Core::CpuStateFrame* Frame, uint64_ bool DiskCacheHitRelocationsApplied = false; bool LoadDiskCacheCode = true; if (Region && Region->FileStartVA != 0) { + FEXCORE_PROFILE_ACCUMULATION(Thread, AccumulatedDiskCacheLookupTime); Hit = DiskCache.Lookup(Thread, *Region, GuestRIP); if (Hit) { DiskCacheHitRelocationsApplied = CodeCache.ApplyCodeRelocations(GuestRIP, std::as_writable_bytes(Hit->HostCode), Hit->Relocations, 0, false); @@ -888,10 +889,12 @@ uintptr_t ContextImpl::CompileBlock(FEXCore::Core::CpuStateFrame* Frame, uint64_ } uint64_t ModuleOffset = GuestRIP - Region->FileStartVA; + FEXCORE_PROFILE_INSTANT_INCREMENT(Thread, AccumulatedDiskCacheHitCount, 1); return reinterpret_cast(LoadedCode.EntryPoints[ModuleOffset]); } } } + FEXCORE_PROFILE_INSTANT_INCREMENT(Thread, AccumulatedDiskCacheMissCount, 1); } // Accumulate a JIT count now, as even if another thread raced us, it should count as a compile. diff --git a/FEXCore/include/FEXCore/Utils/SHMStats.h b/FEXCore/include/FEXCore/Utils/SHMStats.h index e5f07cc51..c5844fe10 100644 --- a/FEXCore/include/FEXCore/Utils/SHMStats.h +++ b/FEXCore/include/FEXCore/Utils/SHMStats.h @@ -70,6 +70,11 @@ struct ThreadStats { uint64_t AccumulatedCacheWriteLockTime; uint64_t AccumulatedJITCount; + + uint64_t AccumulatedDiskCacheHitCount; + uint64_t AccumulatedDiskCacheMissCount; + uint64_t AccumulatedDiskCacheLookupTime; + uint64_t Padding; }; // Ensure 16-byte alignment to take advantage of ARM single-copy atomicity.