diff --git a/unittests/InstructionCountCI/FlagM/VEX_map2.json b/unittests/InstructionCountCI/FlagM/VEX_map2.json
index 75bb9401e..3d24e6060 100644
--- a/unittests/InstructionCountCI/FlagM/VEX_map2.json
+++ b/unittests/InstructionCountCI/FlagM/VEX_map2.json
@@ -472,75 +472,47 @@
       ]
     },
     "pdep eax, ebx, ecx": {
-      "ExpectedInstructionCount": 29,
+      "ExpectedInstructionCount": 14,
       "Comment": [
         "Map 2 0b11 0xf5 32-bit"
       ],
       "ExpectedArm64ASM": [
-        "mov w20, w7",
-        "mov w21, w5",
-        "cbz w21, #+0x68",
-        "mov w3, wzr",
-        "mrs x0, nzcv",
-        "str w0, [x28, #728]",
-        "stp x4, x5, [x28, #8]",
-        "str x6, [x28, #24]",
-        "mov w4, w20",
-        "mov w5, w21",
-        "mov w6, wzr",
-        "rbit w0, w5",
-        "clz w0, w0",
-        "lsr w1, w4, w3",
-        "and w1, w1, #0x1",
-        "sub w2, w5, #0x1 (1)",
-        "add w3, w3, #0x1 (1)",
-        "ands w5, w5, w2",
-        "lsl w0, w1, w0",
-        "orr w6, w6, w0",
-        "b.ne #-0x24",
-        "mov w3, w6",
-        "ldr w4, [x28, #728]",
-        "msr nzcv, x4",
-        "ldp x4, x5, [x28, #8]",
-        "ldr x6, [x28, #24]",
-        "mov w4, w3",
-        "b #+0x8",
-        "mov w4, wzr"
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov w4, #0x0",
+        "cbz w5, #+0x2c",
+        "neg w2, w1",
+        "and w2, w2, w1",
+        "sbfx w3, w0, #0, #1",
+        "eor w1, w1, w2",
+        "and w2, w3, w2",
+        "neg w3, w1",
+        "orr w4, w4, w2",
+        "lsr w0, w0, #1",
+        "and w2, w1, w3",
+        "cbnz w2, #-0x1c"
       ]
     },
     "pdep rax, rbx, rcx": {
-      "ExpectedInstructionCount": 27,
+      "ExpectedInstructionCount": 14,
       "Comment": [
         "Map 2 0b11 0xf5 64-bit"
       ],
       "ExpectedArm64ASM": [
-        "cbz x5, #+0x68",
-        "mov x3, xzr",
-        "mrs x0, nzcv",
-        "str w0, [x28, #728]",
-        "stp x4, x5, [x28, #8]",
-        "str x6, [x28, #24]",
-        "mov x4, x7",
-        "mov x5, x5",
-        "mov x6, xzr",
-        "rbit x0, x5",
-        "clz x0, x0",
-        "lsr x1, x4, x3",
-        "and x1, x1, #0x1",
-        "sub x2, x5, #0x1 (1)",
-        "add x3, x3, #0x1 (1)",
-        "ands x5, x5, x2",
-        "lsl x0, x1, x0",
-        "orr x6, x6, x0",
-        "b.ne #-0x24",
-        "mov x3, x6",
-        "ldr w4, [x28, #728]",
-        "msr nzcv, x4",
-        "ldp x4, x5, [x28, #8]",
-        "ldr x6, [x28, #24]",
-        "mov x4, x3",
-        "b #+0x8",
-        "mov x4, xzr"
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x4, #0x0",
+        "cbz x5, #+0x2c",
+        "neg x2, x1",
+        "and x2, x2, x1",
+        "sbfx x3, x0, #0, #1",
+        "eor x1, x1, x2",
+        "and x2, x3, x2",
+        "neg x3, x1",
+        "orr x4, x4, x2",
+        "lsr x0, x0, #1",
+        "and x2, x1, x3",
+        "cbnz x2, #-0x1c"
       ]
     },
     "bextr eax, ebx, ecx": {
diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json
index 336a21492..953e7cd37 100644
--- a/unittests/InstructionCountCI/VEX_map2.json
+++ b/unittests/InstructionCountCI/VEX_map2.json
@@ -3329,75 +3329,47 @@
       ]
     },
     "pdep eax, ebx, ecx": {
-      "ExpectedInstructionCount": 29,
+      "ExpectedInstructionCount": 14,
       "Comment": [
         "Map 2 0b11 0xf5 32-bit"
       ],
       "ExpectedArm64ASM": [
-        "mov w20, w7",
-        "mov w21, w5",
-        "cbz w21, #+0x68",
-        "mov w3, wzr",
-        "mrs x0, nzcv",
-        "str w0, [x28, #728]",
-        "stp x4, x5, [x28, #8]",
-        "str x6, [x28, #24]",
-        "mov w4, w20",
-        "mov w5, w21",
-        "mov w6, wzr",
-        "rbit w0, w5",
-        "clz w0, w0",
-        "lsr w1, w4, w3",
-        "and w1, w1, #0x1",
-        "sub w2, w5, #0x1 (1)",
-        "add w3, w3, #0x1 (1)",
-        "ands w5, w5, w2",
-        "lsl w0, w1, w0",
-        "orr w6, w6, w0",
-        "b.ne #-0x24",
-        "mov w3, w6",
-        "ldr w4, [x28, #728]",
-        "msr nzcv, x4",
-        "ldp x4, x5, [x28, #8]",
-        "ldr x6, [x28, #24]",
-        "mov w4, w3",
-        "b #+0x8",
-        "mov w4, wzr"
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov w4, #0x0",
+        "cbz w5, #+0x2c",
+        "neg w2, w1",
+        "and w2, w2, w1",
+        "sbfx w3, w0, #0, #1",
+        "eor w1, w1, w2",
+        "and w2, w3, w2",
+        "neg w3, w1",
+        "orr w4, w4, w2",
+        "lsr w0, w0, #1",
+        "and w2, w1, w3",
+        "cbnz w2, #-0x1c"
       ]
     },
     "pdep rax, rbx, rcx": {
-      "ExpectedInstructionCount": 27,
+      "ExpectedInstructionCount": 14,
       "Comment": [
         "Map 2 0b11 0xf5 64-bit"
       ],
       "ExpectedArm64ASM": [
-        "cbz x5, #+0x68",
-        "mov x3, xzr",
-        "mrs x0, nzcv",
-        "str w0, [x28, #728]",
-        "stp x4, x5, [x28, #8]",
-        "str x6, [x28, #24]",
-        "mov x4, x7",
-        "mov x5, x5",
-        "mov x6, xzr",
-        "rbit x0, x5",
-        "clz x0, x0",
-        "lsr x1, x4, x3",
-        "and x1, x1, #0x1",
-        "sub x2, x5, #0x1 (1)",
-        "add x3, x3, #0x1 (1)",
-        "ands x5, x5, x2",
-        "lsl x0, x1, x0",
-        "orr x6, x6, x0",
-        "b.ne #-0x24",
-        "mov x3, x6",
-        "ldr w4, [x28, #728]",
-        "msr nzcv, x4",
-        "ldp x4, x5, [x28, #8]",
-        "ldr x6, [x28, #24]",
-        "mov x4, x3",
-        "b #+0x8",
-        "mov x4, xzr"
+        "mov x0, x7",
+        "mov x1, x5",
+        "mov x4, #0x0",
+        "cbz x5, #+0x2c",
+        "neg x2, x1",
+        "and x2, x2, x1",
+        "sbfx x3, x0, #0, #1",
+        "eor x1, x1, x2",
+        "and x2, x3, x2",
+        "neg x3, x1",
+        "orr x4, x4, x2",
+        "lsr x0, x0, #1",
+        "and x2, x1, x3",
+        "cbnz x2, #-0x1c"
       ]
     },
     "mulx eax, ebx, ecx": {