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FEXCore: Disable 48-bit VA optimization
This breaks relocations currently due to not handling negatives and also an interesting overwriting problem. Not that big of a deal, it's only a minor optimization anyway. Fixes #5227
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@@ -633,9 +633,10 @@ bool CodeCache::ApplyCodeRelocations(uint64_t GuestEntry, std::span<std::byte> C
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if (Pointer == ~0ULL) {
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return false;
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}
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// Pointers are required to fit within 48-bit VA space.
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// TODO: Pointers are required to fit within 48-bit VA space.
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// But forcing 6-byte broke relocations.
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Emitter.LoadConstant(ARMEmitter::Size::i64Bit, ARMEmitter::Register(Reloc.NamedThunkMove.RegisterIndex), Pointer,
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CPU::Arm64Emitter::PadType::DOPAD, 6);
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CPU::Arm64Emitter::PadType::DOPAD);
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break;
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}
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case FEXCore::CPU::RelocationTypes::RELOC_GUEST_RIP_LITERAL: {
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@@ -644,9 +645,9 @@ bool CodeCache::ApplyCodeRelocations(uint64_t GuestEntry, std::span<std::byte> C
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}
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case FEXCore::CPU::RelocationTypes::RELOC_GUEST_RIP_MOVE: {
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uint64_t Pointer = Reloc.GuestRIP.GuestRIP + GuestEntry;
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// Pointers are required to fit within 48-bit VA space.
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Emitter.LoadConstant(ARMEmitter::Size::i64Bit, ARMEmitter::Register(Reloc.GuestRIP.RegisterIndex), Pointer,
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CPU::Arm64Emitter::PadType::DOPAD, 6);
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// TODO: Pointers are required to fit within 48-bit VA space.
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// But forcing 6-byte broke relocations.
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Emitter.LoadConstant(ARMEmitter::Size::i64Bit, ARMEmitter::Register(Reloc.GuestRIP.RegisterIndex), Pointer, CPU::Arm64Emitter::PadType::DOPAD);
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break;
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}
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