diff --git a/unittests/InstructionCountCI/VEX_map2.json b/unittests/InstructionCountCI/VEX_map2.json index cd0076dc5..f581f206f 100644 --- a/unittests/InstructionCountCI/VEX_map2.json +++ b/unittests/InstructionCountCI/VEX_map2.json @@ -4074,675 +4074,1211 @@ ] }, "vfmaddsub132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x96 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2384]", + "eor v2.16b, v17.16b, v2.16b", + "fmla v2.4s, v16.4s, v18.4s", + "mov v16.16b, v2.16b" ] }, "vfmaddsub132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0x96 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1840]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z17.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmaddsub132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x96 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2416]", + "eor v2.16b, v17.16b, v2.16b", + "fmla v2.2d, v16.2d, v18.2d", + "mov v16.16b, v2.16b" ] }, "vfmaddsub132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0x96 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1856]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z17.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfmsubadd132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x97 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2448]", + "eor v2.16b, v17.16b, v2.16b", + "fmla v2.4s, v16.4s, v18.4s", + "mov v16.16b, v2.16b" ] }, "vfmsubadd132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0x97 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1872]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z17.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmsubadd132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x97 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2480]", + "eor v2.16b, v17.16b, v2.16b", + "fmla v2.2d, v16.2d, v18.2d", + "mov v16.16b, v2.16b" ] }, "vfmsubadd132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0x97 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1888]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z17.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfmadd132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x98 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmla v0.4s, v16.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x98 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fmla z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmadd132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x98 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmla v0.2d, v16.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x98 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fmla z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfmadd132ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x99 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmla v0.4s, v16.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd132sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x99 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmla v0.2d, v16.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9a 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.s, p6/m, z16.s, z18.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9a 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmsub132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9a 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.d, p6/m, z16.d, z18.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9a 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfmsub132ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9b 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.s, p6/m, z16.s, z18.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub132sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9b 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmls z0.d, p6/m, z16.d, z18.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9c 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmls v0.4s, v16.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9c 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fmls z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfnmadd132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9c 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmls v0.2d, v16.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9c 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fmls z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfnmadd132ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9d 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmls v0.4s, v16.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd132sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9d 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v17.16b", + "fmls v0.2d, v16.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub132ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9e 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.s, p6/m, z16.s, z18.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub132ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9e 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.s, p7/m, z16.s, z18.s", + "mov z16.d, z0.d" ] }, "vfnmsub132pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0x9e 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.d, p6/m, z16.d, z18.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub132pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0x9e 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.d, p7/m, z16.d, z18.d", + "mov z16.d, z0.d" ] }, "vfnmsub132ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9f 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.s, p6/m, z16.s, z18.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub132sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0x9f 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z17.d", + "fnmla z0.d, p6/m, z16.d, z18.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa8 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmla v0.4s, v17.4s, v16.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xa8 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fmla z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfmadd213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa8 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmla v0.2d, v17.2d, v16.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xa8 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fmla z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfmadd213ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xa9 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmla v0.4s, v17.4s, v16.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd213sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xa9 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmla v0.2d, v17.2d, v16.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xaa 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.s, p6/m, z17.s, z16.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xaa 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfmsub213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xaa 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.d, p6/m, z17.d, z16.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xaa 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfmsub213ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xab 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.s, p6/m, z17.s, z16.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub213sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xab 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmls z0.d, p6/m, z17.d, z16.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xac 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmls v0.4s, v17.4s, v16.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xac 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fmls z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfnmadd213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xac 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmls v0.2d, v17.2d, v16.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xac 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fmls z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfnmadd213ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xad 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmls v0.4s, v17.4s, v16.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd213sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xad 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v18.16b", + "fmls v0.2d, v17.2d, v16.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xae 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.s, p6/m, z17.s, z16.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xae 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfnmsub213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xae 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.d, p6/m, z17.d, z16.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 3, "Comment": [ "Map 2 0b01 0xae 256-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfnmsub213ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xaf 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.s, p6/m, z17.s, z16.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub213sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xaf 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z18.d", + "fnmla z0.d, p6/m, z17.d, z16.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb8 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmla v0.4s, v17.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xb8 256-bit" + ], + "ExpectedArm64ASM": [ + "fmla z16.s, p7/m, z17.s, z18.s" ] }, "vfmadd231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb8 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmla v0.2d, v17.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xb8 256-bit" + ], + "ExpectedArm64ASM": [ + "fmla z16.d, p7/m, z17.d, z18.d" ] }, "vfmadd231ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xb9 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmla v0.4s, v17.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmadd231sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xb9 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmla v0.2d, v17.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xba 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmls z0.s, p6/m, z17.s, z18.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xba 256-bit" + ], + "ExpectedArm64ASM": [ + "fnmls z16.s, p7/m, z17.s, z18.s" ] }, "vfmsub231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xba 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmls z0.d, p6/m, z17.d, z18.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfmsub231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xba 256-bit" + ], + "ExpectedArm64ASM": [ + "fnmls z16.d, p7/m, z17.d, z18.d" ] }, "vfmsub231ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbb 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmls z0.s, p6/m, z17.s, z18.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmsub231sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbb 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmls z0.d, p6/m, z17.d, z18.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xbc 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmls v0.4s, v17.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xbc 256-bit" + ], + "ExpectedArm64ASM": [ + "fmls z16.s, p7/m, z17.s, z18.s" ] }, "vfnmadd231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xbc 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmls v0.2d, v17.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xbc 256-bit" + ], + "ExpectedArm64ASM": [ + "fmls z16.d, p7/m, z17.d, z18.d" ] }, "vfnmadd231ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbd 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmls v0.4s, v17.4s, v18.4s", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmadd231sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbd 128-bit" + ], + "ExpectedArm64ASM": [ + "mov v0.16b, v16.16b", + "fmls v0.2d, v17.2d, v18.2d", + "mov v2.16b, v0.16b", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xbe 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmla z0.s, p6/m, z17.s, z18.s", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xbe 256-bit" + ], + "ExpectedArm64ASM": [ + "fnmla z16.s, p7/m, z17.s, z18.s" ] }, "vfnmsub231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xbe 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmla z0.d, p6/m, z17.d, z18.d", + "mov z2.d, z0.d", + "mov v16.16b, v2.16b" ] }, "vfnmsub231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 1, "Comment": [ "Map 2 0b01 0xbe 256-bit" + ], + "ExpectedArm64ASM": [ + "fnmla z16.d, p7/m, z17.d, z18.d" ] }, "vfnmsub231ss xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbf 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmla z0.s, p6/m, z17.s, z18.s", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.s[0], v2.s[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfnmsub231sd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 7, "Comment": [ "Map 2 0b01 0xbf 128-bit" + ], + "ExpectedArm64ASM": [ + "mov z0.d, z16.d", + "fnmla z0.d, p6/m, z17.d, z18.d", + "mov z2.d, z0.d", + "mov v0.16b, v16.16b", + "mov v0.d[0], v2.d[0]", + "mov v2.16b, v0.16b", + "mov v16.16b, v2.16b" ] }, "vfmaddsub213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa6 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2384]", + "eor v2.16b, v18.16b, v2.16b", + "fmla v2.4s, v17.4s, v16.4s", + "mov v16.16b, v2.16b" ] }, "vfmaddsub213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xa6 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1840]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z18.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfmaddsub213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa6 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2416]", + "eor v2.16b, v18.16b, v2.16b", + "fmla v2.2d, v17.2d, v16.2d", + "mov v16.16b, v2.16b" ] }, "vfmaddsub213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xa6 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1856]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z18.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfmsubadd213ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa7 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2448]", + "eor v2.16b, v18.16b, v2.16b", + "fmla v2.4s, v17.4s, v16.4s", + "mov v16.16b, v2.16b" ] }, "vfmsubadd213ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xa7 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1872]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z18.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z17.s, z16.s", + "mov z16.d, z0.d" ] }, "vfmsubadd213pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xa7 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2480]", + "eor v2.16b, v18.16b, v2.16b", + "fmla v2.2d, v17.2d, v16.2d", + "mov v16.16b, v2.16b" ] }, "vfmsubadd213pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xa7 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1888]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z18.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z17.d, z16.d", + "mov z16.d, z0.d" ] }, "vfmaddsub231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb6 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2384]", + "eor v2.16b, v16.16b, v2.16b", + "fmla v2.4s, v17.4s, v18.4s", + "mov v16.16b, v2.16b" ] }, "vfmaddsub231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xb6 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1840]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z16.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z17.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmaddsub231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb6 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2416]", + "eor v2.16b, v16.16b, v2.16b", + "fmla v2.2d, v17.2d, v18.2d", + "mov v16.16b, v2.16b" ] }, "vfmaddsub231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xb6 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1856]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z16.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z17.d, z18.d", + "mov z16.d, z0.d" ] }, "vfmsubadd231ps xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb7 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2448]", + "eor v2.16b, v16.16b, v2.16b", + "fmla v2.4s, v17.4s, v18.4s", + "mov v16.16b, v2.16b" ] }, "vfmsubadd231ps ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xb7 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1872]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z16.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.s, p7/m, z17.s, z18.s", + "mov z16.d, z0.d" ] }, "vfmsubadd231pd xmm0, xmm1, xmm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 4, "Comment": [ "Map 2 0b01 0xb7 128-bit" + ], + "ExpectedArm64ASM": [ + "ldr q2, [x28, #2480]", + "eor v2.16b, v16.16b, v2.16b", + "fmla v2.2d, v17.2d, v18.2d", + "mov v16.16b, v2.16b" ] }, "vfmsubadd231pd ymm0, ymm1, ymm2": { - "ExpectedInstructionCount": -1, - "Skip": "Yes", + "ExpectedInstructionCount": 6, "Comment": [ "Map 2 0b01 0xb7 256-bit" + ], + "ExpectedArm64ASM": [ + "ldr x0, [x28, #1888]", + "ld1b {z2.b}, p7/z, [x0]", + "eor z2.d, z16.d, z2.d", + "mov z0.d, z2.d", + "fmla z0.d, p7/m, z17.d, z18.d", + "mov z16.d, z0.d" ] }, "vaesimc xmm0, xmm1": {