diff --git a/FEXCore/Source/Interface/Config/Config.json.in b/FEXCore/Source/Interface/Config/Config.json.in
index 6507854b9..5a8ff1f2e 100644
--- a/FEXCore/Source/Interface/Config/Config.json.in
+++ b/FEXCore/Source/Interface/Config/Config.json.in
@@ -59,7 +59,9 @@
           "ENABLEWFXT": "enablewfxt",
           "DISABLEWFXT": "disablewfxt",
           "ENABLE3DNOW": "enable3dnow",
-          "DISABLE3DNOW": "disable3dnow"
+          "DISABLE3DNOW": "disable3dnow",
+          "ENABLESSE4A": "enablesse4a",
+          "DISABLESSE4A": "disablesse4a"
         },
         "Desc": [
           "Allows controlling of the CPU features in the JIT.",
@@ -82,7 +84,8 @@
           "\t{enable,disable}svebitperm: Will force enable or disable svebitperm even if the host doesn't support it",
           "\t{enable,disable}preserveallabi: Will force enable or disable preserve_all abi even if the host doesn't support it",
           "\t{enable,disable}wfxt: Will force enable or disable wfxt even if the host doesn't support it",
-          "\t{enable,disable}3dnow: Will force enable or disable 3DNow even if the host doesn't support it"
+          "\t{enable,disable}3dnow: Will force enable or disable 3DNow! even if the host doesn't support it",
+          "\t{enable,disable}sse4a: Will force enable or disable SSE4a even if the host doesn't support it"
         ]
       },
       "SmallTSCScale": {
diff --git a/FEXCore/Source/Interface/Core/CPUID.cpp b/FEXCore/Source/Interface/Core/CPUID.cpp
index e9c9895ff..d6f3d6cbf 100644
--- a/FEXCore/Source/Interface/Core/CPUID.cpp
+++ b/FEXCore/Source/Interface/Core/CPUID.cpp
@@ -909,38 +909,38 @@ FEXCore::CPUID::FunctionResults CPUIDEmu::Function_8000_0001h(uint32_t Leaf) con
 
   Res.eax = FAMILY_IDENTIFIER;
 
-  Res.ecx = (1 << 0) |  // LAHF/SAHF
-            (1 << 1) |  // 0 = Single core product, 1 = multi core product
-            (0 << 2) |  // SVM
-            (1 << 3) |  // Extended APIC register space
-            (0 << 4) |  // LOCK MOV CR0 means MOV CR8
-            (1 << 5) |  // ABM instructions
-            (0 << 6) |  // SSE4a
-            (0 << 7) |  // Misaligned SSE mode
-            (1 << 8) |  // PREFETCHW
-            (0 << 9) |  // OS visible workaround support
-            (0 << 10) | // Instruction based sampling support
-            (0 << 11) | // XOP
-            (0 << 12) | // SKINIT
-            (0 << 13) | // Watchdog timer support
-            (0 << 14) | // Reserved
-            (0 << 15) | // Lightweight profiling support
-            (0 << 16) | // FMA4
-            (1 << 17) | // Translation cache extension
-            (0 << 18) | // Reserved
-            (0 << 19) | // Reserved
-            (0 << 20) | // Reserved
-            (0 << 21) | // XOP-TBM
-            (0 << 22) | // Topology extensions support
-            (0 << 23) | // Core performance counter extensions
-            (0 << 24) | // NB performance counter extensions
-            (0 << 25) | // Reserved
-            (0 << 26) | // Data breakpoints extensions
-            (0 << 27) | // Performance TSC
-            (0 << 28) | // L2 perf counter extensions
-            (0 << 29) | // MONITORX
-            (0 << 30) | // Reserved
-            (0 << 31);  // Reserved
+  Res.ecx = (1 << 0) |                               // LAHF/SAHF
+            (1 << 1) |                               // 0 = Single core product, 1 = multi core product
+            (0 << 2) |                               // SVM
+            (1 << 3) |                               // Extended APIC register space
+            (0 << 4) |                               // LOCK MOV CR0 means MOV CR8
+            (1 << 5) |                               // ABM instructions
+            (CTX->HostFeatures.SupportsSSE4a << 6) | // SSE4a
+            (0 << 7) |                               // Misaligned SSE mode
+            (1 << 8) |                               // PREFETCHW
+            (0 << 9) |                               // OS visible workaround support
+            (0 << 10) |                              // Instruction based sampling support
+            (0 << 11) |                              // XOP
+            (0 << 12) |                              // SKINIT
+            (0 << 13) |                              // Watchdog timer support
+            (0 << 14) |                              // Reserved
+            (0 << 15) |                              // Lightweight profiling support
+            (0 << 16) |                              // FMA4
+            (1 << 17) |                              // Translation cache extension
+            (0 << 18) |                              // Reserved
+            (0 << 19) |                              // Reserved
+            (0 << 20) |                              // Reserved
+            (0 << 21) |                              // XOP-TBM
+            (0 << 22) |                              // Topology extensions support
+            (0 << 23) |                              // Core performance counter extensions
+            (0 << 24) |                              // NB performance counter extensions
+            (0 << 25) |                              // Reserved
+            (0 << 26) |                              // Data breakpoints extensions
+            (0 << 27) |                              // Performance TSC
+            (0 << 28) |                              // L2 perf counter extensions
+            (0 << 29) |                              // MONITORX
+            (0 << 30) |                              // Reserved
+            (0 << 31);                               // Reserved
 
   Res.edx = (1 << 0) |                                // FPU
             (1 << 1) |                                // Virtual mode extensions
diff --git a/FEXCore/include/FEXCore/Core/HostFeatures.h b/FEXCore/include/FEXCore/Core/HostFeatures.h
index c109b4ea2..e5f9e99e1 100644
--- a/FEXCore/include/FEXCore/Core/HostFeatures.h
+++ b/FEXCore/include/FEXCore/Core/HostFeatures.h
@@ -40,6 +40,7 @@ struct HostFeatures {
   bool SupportsECV {};
   bool SupportsWFXT {};
   bool Supports3DNow {};
+  bool SupportsSSE4a {};
 
   // Float exception behaviour
   bool SupportsAFP {};
diff --git a/Source/Common/HostFeatures.cpp b/Source/Common/HostFeatures.cpp
index 9e925d498..a562acb60 100644
--- a/Source/Common/HostFeatures.cpp
+++ b/Source/Common/HostFeatures.cpp
@@ -436,6 +436,7 @@ static void OverrideFeatures(FEXCore::HostFeatures* Features, uint64_t ForceSVEW
   ENABLE_DISABLE_OPTION(SupportsPreserveAllABI, PRESERVEALLABI, PRESERVEALLABI);
   ENABLE_DISABLE_OPTION(SupportsWFXT, WFXT, WFXT);
   ENABLE_DISABLE_OPTION(Supports3DNow, 3DNOW, 3DNOW);
+  ENABLE_DISABLE_OPTION(SupportsSSE4a, SSE4A, SSE4A);
   GET_SINGLE_OPTION(Crypto, CRYPTO);
 
 #undef ENABLE_DISABLE_OPTION