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https://github.com/FEX-Emu/FEX.git
synced 2026-10-14 13:00:41 +02:00
OpcodeDispatcher: Handle SSE vector moves into themselves a little better
Obviously, it's silly to do this, but we should still be generating optimal code for this case (which is none at all).
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ef321e4bf8
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2b67f87054
6 files changed
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@@ -6089,7 +6089,7 @@ void OpDispatchBuilder::InstallHostSpecificOpcodeHandlers() {
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{OPD(1, 0b01, 0xEE), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VSMAX, 2>},
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{OPD(1, 0b01, 0xEF), 1, &OpDispatchBuilder::AVXVectorALUOp<IR::OP_VXOR, 16>},
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{OPD(1, 0b11, 0xF0), 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{OPD(1, 0b11, 0xF0), 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{OPD(1, 0b01, 0xF1), 1, &OpDispatchBuilder::VPSLLOp<2>},
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{OPD(1, 0b01, 0xF2), 1, &OpDispatchBuilder::VPSLLOp<4>},
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{OPD(1, 0b01, 0xF3), 1, &OpDispatchBuilder::VPSLLOp<8>},
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@@ -6410,9 +6410,9 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0x3F, 1, &OpDispatchBuilder::ThunkOp},
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{0x40, 16, &OpDispatchBuilder::CMOVOp},
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{0x6E, 1, &OpDispatchBuilder::MOVBetweenGPR_FPR},
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{0x6F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x6F, 1, &OpDispatchBuilder::MOVQMMXOp},
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{0x7E, 1, &OpDispatchBuilder::MOVBetweenGPR_FPR},
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{0x7F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x7F, 1, &OpDispatchBuilder::MOVQMMXOp},
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{0x80, 16, &OpDispatchBuilder::CondJUMPOp},
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{0x90, 16, &OpDispatchBuilder::SETccOp},
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{0xA0, 1, &OpDispatchBuilder::PUSHSegmentOp<FEXCore::X86Tables::DecodeFlags::FLAG_FS_PREFIX>},
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@@ -6441,12 +6441,12 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0xC8, 8, &OpDispatchBuilder::BSWAPOp},
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// SSE
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{0x10, 2, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x10, 2, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0x12, 2, &OpDispatchBuilder::MOVLPOp},
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{0x14, 1, &OpDispatchBuilder::PUNPCKLOp<4>},
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{0x15, 1, &OpDispatchBuilder::PUNPCKHOp<4>},
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{0x16, 2, &OpDispatchBuilder::MOVHPDOp},
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{0x28, 2, &OpDispatchBuilder::MOVAPS_MOVAPDOp},
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{0x28, 2, &OpDispatchBuilder::MOVVectorAlignedOp},
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{0x2A, 1, &OpDispatchBuilder::InsertMMX_To_XMM_Vector_CVT_Int_To_Float},
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{0x2B, 1, &OpDispatchBuilder::MOVVectorNTOp},
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{0x2C, 1, &OpDispatchBuilder::XMM_To_MMX_Vector_CVT_Float_To_Int<4, false, false>},
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@@ -6689,10 +6689,10 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0x5D, 1, &OpDispatchBuilder::VectorScalarInsertALUOp<IR::OP_VFMINSCALARINSERT, 4>},
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{0x5E, 1, &OpDispatchBuilder::VectorScalarInsertALUOp<IR::OP_VFDIVSCALARINSERT, 4>},
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{0x5F, 1, &OpDispatchBuilder::VectorScalarInsertALUOp<IR::OP_VFMAXSCALARINSERT, 4>},
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{0x6F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x6F, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0x70, 1, &OpDispatchBuilder::PSHUFWOp<false>},
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{0x7E, 1, &OpDispatchBuilder::MOVQOp},
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{0x7F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x7F, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0xB8, 1, &OpDispatchBuilder::PopcountOp},
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{0xBC, 1, &OpDispatchBuilder::TZCNT},
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{0xBD, 1, &OpDispatchBuilder::LZCNT},
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@@ -6706,7 +6706,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0x12, 1, &OpDispatchBuilder::MOVDDUPOp},
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{0x19, 7, &OpDispatchBuilder::NOPOp},
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{0x2A, 1, &OpDispatchBuilder::InsertCVTGPR_To_FPR<8>},
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{0x2B, 1, &OpDispatchBuilder::MOVVectorOp},
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{0x2B, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0x2C, 1, &OpDispatchBuilder::CVTFPR_To_GPR<8, false>},
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{0x2D, 1, &OpDispatchBuilder::CVTFPR_To_GPR<8, true>},
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{0x51, 1, &OpDispatchBuilder::VectorScalarUnaryInsertALUOp<IR::OP_VFSQRTSCALARINSERT, 8>},
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@@ -6725,17 +6725,17 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0xD6, 1, &OpDispatchBuilder::MOVQ2DQ<false>},
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{0xC2, 1, &OpDispatchBuilder::InsertScalarFCMPOp<8>},
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{0xE6, 1, &OpDispatchBuilder::Vector_CVT_Float_To_Int<8, true, true>},
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{0xF0, 1, &OpDispatchBuilder::MOVVectorOp},
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{0xF0, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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};
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constexpr std::tuple<uint8_t, uint8_t, FEXCore::X86Tables::OpDispatchPtr> OpSizeModOpTable[] = {
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{0x10, 2, &OpDispatchBuilder::MOVVectorOp},
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{0x10, 2, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0x12, 2, &OpDispatchBuilder::MOVLPOp},
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{0x14, 1, &OpDispatchBuilder::PUNPCKLOp<8>},
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{0x15, 1, &OpDispatchBuilder::PUNPCKHOp<8>},
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{0x16, 2, &OpDispatchBuilder::MOVHPDOp},
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{0x19, 7, &OpDispatchBuilder::NOPOp},
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{0x28, 2, &OpDispatchBuilder::MOVAPS_MOVAPDOp},
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{0x28, 2, &OpDispatchBuilder::MOVVectorAlignedOp},
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{0x2A, 1, &OpDispatchBuilder::MMX_To_XMM_Vector_CVT_Int_To_Float},
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{0x2B, 1, &OpDispatchBuilder::MOVVectorNTOp},
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{0x2C, 1, &OpDispatchBuilder::XMM_To_MMX_Vector_CVT_Float_To_Int<8, true, false>},
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@@ -6772,7 +6772,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0x6C, 1, &OpDispatchBuilder::PUNPCKLOp<8>},
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{0x6D, 1, &OpDispatchBuilder::PUNPCKHOp<8>},
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{0x6E, 1, &OpDispatchBuilder::MOVBetweenGPR_FPR},
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{0x6F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x6F, 1, &OpDispatchBuilder::MOVVectorAlignedOp},
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{0x70, 1, &OpDispatchBuilder::PSHUFDOp},
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{0x74, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VCMPEQ, 1>},
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@@ -6782,7 +6782,7 @@ void InstallOpcodeHandlers(Context::OperatingMode Mode) {
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{0x7C, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VFADDP, 8>},
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{0x7D, 1, &OpDispatchBuilder::HSUBP<8>},
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{0x7E, 1, &OpDispatchBuilder::MOVBetweenGPR_FPR},
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{0x7F, 1, &OpDispatchBuilder::MOVUPS_MOVUPDOp},
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{0x7F, 1, &OpDispatchBuilder::MOVVectorAlignedOp},
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{0xC2, 1, &OpDispatchBuilder::VFCMPOp<8>},
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{0xC4, 1, &OpDispatchBuilder::PINSROp<2>},
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{0xC5, 1, &OpDispatchBuilder::PExtrOp<2>},
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@@ -7558,8 +7558,8 @@ constexpr uint16_t PF_F2 = 3;
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{0xA0, 1, &OpDispatchBuilder::VPFCMPOp<2>},
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{0xA4, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VFMAX, 4>},
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// Can be treated as a move
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{0xA6, 1, &OpDispatchBuilder::MOVVectorOp},
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{0xA7, 1, &OpDispatchBuilder::MOVVectorOp},
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{0xA6, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0xA7, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0xAA, 1, &OpDispatchBuilder::VectorALUROp<IR::OP_VFSUB, 4>},
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{0xAE, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VFADDP, 4>},
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@@ -7567,7 +7567,7 @@ constexpr uint16_t PF_F2 = 3;
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{0xB0, 1, &OpDispatchBuilder::VPFCMPOp<0>},
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{0xB4, 1, &OpDispatchBuilder::VectorALUOp<IR::OP_VFMUL, 4>},
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// Can be treated as a move
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{0xB6, 1, &OpDispatchBuilder::MOVVectorOp},
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{0xB6, 1, &OpDispatchBuilder::MOVVectorUnalignedOp},
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{0xB7, 1, &OpDispatchBuilder::PMULHRWOp},
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{0xBB, 1, &OpDispatchBuilder::PSWAPDOp},
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