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FEXCore: Switch ENTRY_FILL_SRA_SINGLE_INST_REG to TMP2

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Will allow this to be taken as the second dispatcher argument
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Billy Laws committed 2025-07-23 18:29:12 +01:00
1 parent fe61aabc52
commit 287344986c
3 files changed
+4 -3
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Source/Windows/ARM64EC/Module.S
+1 -1
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@@ -49,7 +49,7 @@ BeginSimulation:
bl "#SyncThreadContext"
ldr x17, [x18, #0x1788] // TEB->ChpeV2CpuAreaInfo
ldr x16, [x17, #0x48] // ChpeV2CpuAreaInfo->EmulatorData[3] - DispatcherLoopTopEnterECFillSRA
mov x10, #0 // Zero ENTRY_FILL_SRA_SINGLE_INST_REG to avoid single step
mov x11, #0 // Zero ENTRY_FILL_SRA_SINGLE_INST_REG to avoid single step
br x16 // DispatcherLoopTopEnterECFillSRA(SingleInst:x10, CPUArea:x17)
// Called into by FEXCore