diff --git a/CodeEmitter/CodeEmitter/SVEOps.inl b/CodeEmitter/CodeEmitter/SVEOps.inl index b6bbd2744..2b5837279 100644 --- a/CodeEmitter/CodeEmitter/SVEOps.inl +++ b/CodeEmitter/CodeEmitter/SVEOps.inl @@ -2134,7 +2134,13 @@ public: // SVE2 Crypto Extensions // SVE2 crypto unary operations - // XXX: + void aesimc(ZRegister zdn, ZRegister zn) { + SVE2CryptoUnaryOperation(1, zdn, zn); + } + void aesmc(ZRegister zdn, ZRegister zn) { + SVE2CryptoUnaryOperation(0, zdn, zn); + } + // SVE2 crypto destructive binary operations // XXX: // SVE2 crypto constructive binary operations @@ -3892,6 +3898,15 @@ private: dc32(Instr); } + void SVE2CryptoUnaryOperation(uint32_t op, ZRegister zdn, ZRegister zn) { + LOGMAN_THROW_A_FMT(zdn == zn, "zdn and zn must be the same register"); + + uint32_t Instr = 0b0100'0101'0010'0000'1110'0000'0000'0000; + Instr |= op << 10; + Instr |= zdn.Idx(); + dc32(Instr); + } + void SVE2BitwisePermute(SubRegSize size, uint32_t opc, ZRegister zd, ZRegister zn, ZRegister zm) { LOGMAN_THROW_A_FMT(size != SubRegSize::i128Bit, "Can't use 128-bit element size"); diff --git a/FEXCore/unittests/Emitter/SVE_Tests.cpp b/FEXCore/unittests/Emitter/SVE_Tests.cpp index a313ff270..24c7ec152 100644 --- a/FEXCore/unittests/Emitter/SVE_Tests.cpp +++ b/FEXCore/unittests/Emitter/SVE_Tests.cpp @@ -3377,7 +3377,11 @@ TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE2 Histogram Computation - S TEST_SINGLE(histseg(ZReg::z30, ZReg::z29, ZReg::z28), "histseg z30.b, z29.b, z28.b"); } TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE2 crypto unary operations") { - // TODO: Implement in emitter. + TEST_SINGLE(aesimc(ZReg::z7, ZReg::z7), "aesimc z7.b, z7.b"); + TEST_SINGLE(aesimc(ZReg::z31, ZReg::z31), "aesimc z31.b, z31.b"); + + TEST_SINGLE(aesmc(ZReg::z7, ZReg::z7), "aesmc z7.b, z7.b"); + TEST_SINGLE(aesmc(ZReg::z31, ZReg::z31), "aesmc z31.b, z31.b"); } TEST_CASE_METHOD(TestDisassembler, "Emitter: SVE: SVE2 crypto destructive binary operations") { // TODO: Implement in emitter.